Similar to of_find_compatible_node(), of_find_matching_node() and
for_each_matching_node() allow you to iterate over the device tree
looking for specific nodes, except that they take of_device_id
tables instead of strings.
This also moves of_match_node() from driver/of/device.c to
driver/of/base.c to colocate it with the of_find_matching_node which
depends on it.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Move electra-ide glue over to the new pata_of_platform framework, and
add the quirks needed to that driver.
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit 473980a993 added a call to clear
the SLB shadow buffer before registering it. Unfortunately this means
that we clear out the entries that slb_initialize has previously set in
there. On POWER6, the hypervisor uses the SLB shadow buffer when doing
partition switches, and that means that after the next partition switch,
each non-boot CPU has no SLB entries to map the kernel text and data,
which causes it to crash.
This fixes it by reverting most of 473980a9 and instead clearing the
3rd entry explicitly in slb_initialize. This fixes the problem that
473980a9 was trying to solve, but without breaking POWER6.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Commit 5d2efba64b changed our iommu code
so that it always uses an iommu page size of 4kB. That means with our
current code, drivers may do a dma_map_sg() of a 64kB page and obtain
a dma_addr_t that is only 4k aligned.
This works fine in most cases except for some infiniband HW it seems,
where they tell the HW about the page size and it ignores the low bits
of the DMA address.
This works around it by making our IOMMU code enforce a PAGE_SIZE alignment
for mappings of objects that are page aligned in the first place and whose
size is larger or equal to a page.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Before we register the SLB shadow buffer, we need to invalidate the
entries in the buffer, otherwise we can end up stale entries from when
we previously offlined the CPU.
This does this invalidate as well as unregistering the buffer with
PHYP before we offline the cpu. Tested and fixes crashes seen on
970MP (thanks to tonyb) and POWER5.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The new network driver fec_mpc52xx will not work on efika because the
firmware does not provide all required properties.
http://www.powerdeveloper.org/asset/by-id/46 has a Forth script to
create more properties. But only the phy stuff is required to get a
working network.
This should go into the kernel because its appearently
impossible to boot the script via tftp and then load the real boot
binary (yaboot or zimage).
Signed-off-by: Olaf Hering <olaf@aepfle.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Missed this one in the boot loader before.
Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Includes both flavors of plb, opb, dcr, and a pseudo 'compound' bus
for representing compound peripherals containing more than one logical
device.
Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
These values now match what is generated by the uboot BSP generator.
Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Because of how big mapping the config space is (1M per bus), we limit how
many busses we support for now. In the long run, we could replace that
with something akin to kmap_atomic instead.
This patch changes the limit from currently 16 to 64.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This patch adds support for 405GPr processors with optional
new mode strapping. ibm405gp_fixup_clocks() can now be used
for 405GP and 405GPr CPUs.
This is in preparation of porting the cpci405 platform support
from arch/ppc to arch/powerpc.
This patch also adds ibm405ep_fixup_clocks() to support
405EP CPUs from the boot wrapper.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Enable EMAC driver for Sequoia (and while we're in there, disable
Macintosh drivers for Sequoia and Bamboo).
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Somehow the EMAC support was dropped (or never really added) to the
Kilauea defconfig file. This patch finally adds EMAC support.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
The logic that checks to see if a machine check is caused by an NMI will
always match when NMI hasn't been initialized, since the mpic routine
will return NO_IRQ (and that's what the nmi_virq value is as well).
Signed-off-by: Olof Johansson <olof@lixom.net>
Commit aed3a8c9bb introduced a
definition of notify_spus_active in .../cell/spu_syscalls.c, and
another definition under #ifndef MODULE in .../cell/spufs/sched.c.
The latter is not necessary and causes the build to fail when
CONFIG_SPU_FS=y, so this removes it. It also removes the export
of do_notify_spus_active, which is unnecessary.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
This reverts commit 553aa7659b at Ben H's
request, because it confused IORESOURCE_* flags with command register
bits.
Requested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Enable MSI now that we have an implementation, and enable CONFIG_MD and
the raid options by default as well.
Signed-off-by: Olof Johansson <olof@lixom.net>
By default the OpenPIC on PWRficient will bias to one core (since that
will improve changes of the other core being able to stay idle/powered
down). However, this conflicts with most irq load balancing schemes,
since setting an interrupt to be delivered to either core doesn't really
result in the load being shared. It also doesn't work well with the
soft irq disable feature of PPC, since EE will stay on until the first
interrupt is taken while soft disabled.
Set the gconf0 config bit that enables even distribution of interrupts
among the two cores.
Signed-off-by: Olof Johansson <olof@lixom.net>
Some PWRficient-based boards have a NMI button that's wired up to a GPIO
as interrupt source. By configuring the openpic accordingly, these get
delivered as a machine check with high priority, instead of as an external
interrupt.
The device tree contains a property "nmi-source" in the openpic node
for these systems, and it's the (hwirq) source for the input.
Also, for these interrupts, the IACK is read from another register than
the regular (MCACK instead), but they are EOI'd as usual. So implement
said function for the mpic driver.
Finally, move a couple of external function defines to include/ instead
of local under sysdev. Being able to mask/unmask and eoi directly saves
us from setting up a dummy irq handler that will never be called.
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix a bug in the printing of the os-area magic numbers which assumed
that magic numbers were zero terminated strings. The magic numbers
are represented in memory as integers. If the os-area sections are
not initialized correctly they could contained random data that would
be printed to the display. Also unify the handling of header and db
magic numbers and make both of type array of u8.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This removes an OProfile dependency on the spufs module. This
dependency was causing a problem for multiplatform systems that are
built with support for Oprofile on Cell but try to load the oprofile
module on a non-Cell system.
Signed-off-by: Bob Nelson <rrnelson@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Acked-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Some machine_xx_initcall macros were recently added that check for the machine
type before calling the function. This converts the 4xx platforms to use those
for bus probing.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Remove the declarations for isa_io_base and isa_mem_base as they are declared
in pci-common.c now.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
The e200 and e500 platforms are separated in various parts of the kernel with
ifdefs, most notably reg_booke.h and traps.c. The new machine_check rework
requires them to be similarly separated in cputable.c to avoid compile errors.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Enable PCI support for these eval boards among other things. Also selects
PCI for Rainier in the Kconfig file.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This patch adds basic support for the AMCC Makalu board to arch/powerpc.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Currently we have some limitations in the 4xx PCIe driver and can't
support all possible PCIe busses. But the current limits in the
dts file are quite low (only 16 busses per RC). This patch increases
the number to 64 per RC.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Renaming the CPU nodes with generic names put the CPU model in
the "model" property and thus broke the PowerPC 440EP(x)/440GR(x)
identical PVR workaround. The updates it to use the new model property
for CPU identification.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Recent DTC versions disallow certain special characters in full paths without
being quoted with {}. That however breaks compatibility with older DTC
versions. Work around this by renaming the CPU nodes for the 4xx files to a
generic node name, and specify the processor type in the model property of the
CPU node.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This patch sets the ibpre flag (Inbound Presence) for the 405EX
in the 4xx PCIe driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
The recent changes from Benjamin Herrenschmidt to the ibm_newemac now
make it possible to support other 4xx variants by just defining the
correct properties in the device tree. In this case of the 405EX we
need to define "has-mdio" in the RGMII node and "has-inverted-stacr-oc"
and "has-new-stacr-staopc" in the EMAC node same as on the 440EPx.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
For EMAC support, 405EX needs to be defined to enable the corresponding
EMAC features (IBM_NEW_EMAC_EMAC4, etc.).
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
A small error caused a header file to be removed making sequoia support no
longer compile. Fix it.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
The mechanism to do the setup for 440A cores changed recently. This fixes
the 440grx setup function to call __fixup_440A_mcheck.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This is a UIC cascade handler rework to use set_irq_chained_handler() for
cascade, just like othe ppc platforms do. With current implementation we have
additional redirection for irq handler and we call generic_handle_irq twice
(once for the primary uic and the other time for handling cascade interrupt).
This causes Ingo's realtime support patch to stop working on 4xx.
Not sure of any other possible problems though, but with
set_irq_chained_handler() we can abolish "struct irqaction cascade" from the
chip descriptor and call generic_handle_irq() once, directly for cascade irq.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Cyrill Gorcunov