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537 lines
14 KiB
537 lines
14 KiB
/*
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* Copyright 2020 Google LLC
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*
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* drivers/mmc/host/cmdq-crypto.c - Qualcomm Technologies, Inc.
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*
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* Original source is taken from:
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* https://android.googlesource.com/kernel/common/+/4bac1109a10c55d49c0aa4f7ebdc4bc53cc368e8
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* The driver caters to crypto engine support for UFS controllers.
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* The crypto engine programming sequence, HW functionality and register
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* offset is almost same in UFS and eMMC controllers.
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*/
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#include <crypto/algapi.h>
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#include "cmdq_hci-crypto.h"
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#include "../core/queue.h"
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static bool cmdq_cap_idx_valid(struct cmdq_host *host, unsigned int cap_idx)
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{
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return cap_idx < host->crypto_capabilities.num_crypto_cap;
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}
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static u8 get_data_unit_size_mask(unsigned int data_unit_size)
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{
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if (data_unit_size < 512 || data_unit_size > 65536 ||
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!is_power_of_2(data_unit_size))
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return 0;
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return data_unit_size / 512;
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}
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static size_t get_keysize_bytes(enum cmdq_crypto_key_size size)
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{
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switch (size) {
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case CMDQ_CRYPTO_KEY_SIZE_128:
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return 16;
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case CMDQ_CRYPTO_KEY_SIZE_192:
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return 24;
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case CMDQ_CRYPTO_KEY_SIZE_256:
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return 32;
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case CMDQ_CRYPTO_KEY_SIZE_512:
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return 64;
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default:
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return 0;
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}
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}
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int cmdq_crypto_cap_find(void *host_p, enum blk_crypto_mode_num crypto_mode,
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unsigned int data_unit_size)
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{
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struct cmdq_host *host = host_p;
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enum cmdq_crypto_alg cmdq_alg;
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u8 data_unit_mask;
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int cap_idx;
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enum cmdq_crypto_key_size cmdq_key_size;
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union cmdq_crypto_cap_entry *ccap_array = host->crypto_cap_array;
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if (!cmdq_host_is_crypto_supported(host))
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return -EINVAL;
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switch (crypto_mode) {
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case BLK_ENCRYPTION_MODE_AES_256_XTS:
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cmdq_alg = CMDQ_CRYPTO_ALG_AES_XTS;
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cmdq_key_size = CMDQ_CRYPTO_KEY_SIZE_256;
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break;
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default:
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return -EINVAL;
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}
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data_unit_mask = get_data_unit_size_mask(data_unit_size);
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for (cap_idx = 0; cap_idx < host->crypto_capabilities.num_crypto_cap;
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cap_idx++) {
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if (ccap_array[cap_idx].algorithm_id == cmdq_alg &&
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(ccap_array[cap_idx].sdus_mask & data_unit_mask) &&
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ccap_array[cap_idx].key_size == cmdq_key_size)
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return cap_idx;
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}
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return -EINVAL;
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}
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EXPORT_SYMBOL(cmdq_crypto_cap_find);
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/**
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* cmdq_crypto_cfg_entry_write_key - Write a key into a crypto_cfg_entry
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*
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* Writes the key with the appropriate format - for AES_XTS,
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* the first half of the key is copied as is, the second half is
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* copied with an offset halfway into the cfg->crypto_key array.
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* For the other supported crypto algs, the key is just copied.
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*
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* @cfg: The crypto config to write to
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* @key: The key to write
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* @cap: The crypto capability (which specifies the crypto alg and key size)
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*
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* Returns 0 on success, or -EINVAL
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*/
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static int cmdq_crypto_cfg_entry_write_key(union cmdq_crypto_cfg_entry *cfg,
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const u8 *key,
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union cmdq_crypto_cap_entry cap)
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{
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size_t key_size_bytes = get_keysize_bytes(cap.key_size);
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if (key_size_bytes == 0)
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return -EINVAL;
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switch (cap.algorithm_id) {
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case CMDQ_CRYPTO_ALG_AES_XTS:
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key_size_bytes *= 2;
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if (key_size_bytes > CMDQ_CRYPTO_KEY_MAX_SIZE)
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return -EINVAL;
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memcpy(cfg->crypto_key, key, key_size_bytes/2);
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memcpy(cfg->crypto_key + CMDQ_CRYPTO_KEY_MAX_SIZE/2,
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key + key_size_bytes/2, key_size_bytes/2);
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return 0;
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case CMDQ_CRYPTO_ALG_BITLOCKER_AES_CBC:
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/* fall through */
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case CMDQ_CRYPTO_ALG_AES_ECB:
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/* fall through */
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case CMDQ_CRYPTO_ALG_ESSIV_AES_CBC:
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memcpy(cfg->crypto_key, key, key_size_bytes);
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return 0;
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}
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return -EINVAL;
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}
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static void cmdq_program_key(struct cmdq_host *host,
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const union cmdq_crypto_cfg_entry *cfg,
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int slot)
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{
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int i;
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u32 slot_offset = host->crypto_cfg_register + slot * sizeof(*cfg);
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if (host->crypto_vops && host->crypto_vops->program_key)
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host->crypto_vops->program_key(host, cfg, slot);
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/* Clear the dword 16 */
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cmdq_writel(host, 0, slot_offset + 16 * sizeof(cfg->reg_val[0]));
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/* Ensure that CFGE is cleared before programming the key */
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wmb();
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for (i = 0; i < 16; i++) {
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cmdq_writel(host, le32_to_cpu(cfg->reg_val[i]),
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slot_offset + i * sizeof(cfg->reg_val[0]));
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/* Spec says each dword in key must be written sequentially */
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wmb();
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}
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/* Write dword 17 */
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cmdq_writel(host, le32_to_cpu(cfg->reg_val[17]),
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slot_offset + 17 * sizeof(cfg->reg_val[0]));
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/* Dword 16 must be written last */
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wmb();
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/* Write dword 16 */
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cmdq_writel(host, le32_to_cpu(cfg->reg_val[16]),
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slot_offset + 16 * sizeof(cfg->reg_val[0]));
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/*Ensure that dword 16 is written */
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wmb();
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}
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static void cmdq_crypto_clear_keyslot(struct cmdq_host *host, int slot)
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{
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union cmdq_crypto_cfg_entry cfg = { {0} };
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cmdq_program_key(host, &cfg, slot);
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}
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static void cmdq_crypto_clear_all_keyslots(struct cmdq_host *host)
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{
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int slot;
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for (slot = 0; slot < cmdq_num_keyslots(host); slot++)
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cmdq_crypto_clear_keyslot(host, slot);
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}
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static int cmdq_crypto_keyslot_program(struct keyslot_manager *ksm,
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const struct blk_crypto_key *key,
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unsigned int slot)
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{
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struct cmdq_host *host = keyslot_manager_private(ksm);
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int err = 0;
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u8 data_unit_mask;
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union cmdq_crypto_cfg_entry cfg;
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int cap_idx;
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cap_idx = cmdq_crypto_cap_find(host, key->crypto_mode,
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key->data_unit_size);
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if (!cmdq_is_crypto_enabled(host) ||
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!cmdq_keyslot_valid(host, slot) ||
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!cmdq_cap_idx_valid(host, cap_idx))
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return -EINVAL;
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data_unit_mask = get_data_unit_size_mask(key->data_unit_size);
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if (!(data_unit_mask & host->crypto_cap_array[cap_idx].sdus_mask))
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return -EINVAL;
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memset(&cfg, 0, sizeof(cfg));
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cfg.data_unit_size = data_unit_mask;
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cfg.crypto_cap_idx = cap_idx;
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cfg.config_enable |= CMDQ_CRYPTO_CONFIGURATION_ENABLE;
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err = cmdq_crypto_cfg_entry_write_key(&cfg, key->raw,
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host->crypto_cap_array[cap_idx]);
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if (err)
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return err;
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cmdq_program_key(host, &cfg, slot);
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memzero_explicit(&cfg, sizeof(cfg));
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return 0;
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}
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static int cmdq_crypto_keyslot_evict(struct keyslot_manager *ksm,
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const struct blk_crypto_key *key,
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unsigned int slot)
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{
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struct cmdq_host *host = keyslot_manager_private(ksm);
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if (!cmdq_is_crypto_enabled(host) ||
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!cmdq_keyslot_valid(host, slot))
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return -EINVAL;
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/*
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* Clear the crypto cfg on the device. Clearing CFGE
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* might not be sufficient, so just clear the entire cfg.
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*/
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cmdq_crypto_clear_keyslot(host, slot);
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return 0;
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}
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/* Functions implementing eMMC v5.2 specification behaviour */
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void cmdq_crypto_enable_spec(struct cmdq_host *host)
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{
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if (!cmdq_host_is_crypto_supported(host))
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return;
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host->caps |= CMDQ_CAP_CRYPTO_SUPPORT;
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}
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EXPORT_SYMBOL(cmdq_crypto_enable_spec);
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void cmdq_crypto_disable_spec(struct cmdq_host *host)
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{
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host->caps &= ~CMDQ_CAP_CRYPTO_SUPPORT;
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}
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EXPORT_SYMBOL(cmdq_crypto_disable_spec);
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static const struct keyslot_mgmt_ll_ops cmdq_ksm_ops = {
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.keyslot_program = cmdq_crypto_keyslot_program,
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.keyslot_evict = cmdq_crypto_keyslot_evict,
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};
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enum blk_crypto_mode_num cmdq_crypto_blk_crypto_mode_num_for_alg_dusize(
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enum cmdq_crypto_alg cmdq_crypto_alg,
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enum cmdq_crypto_key_size key_size)
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{
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/*
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* Currently the only mode that eMMC and blk-crypto both support.
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*/
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if (cmdq_crypto_alg == CMDQ_CRYPTO_ALG_AES_XTS &&
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key_size == CMDQ_CRYPTO_KEY_SIZE_256)
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return BLK_ENCRYPTION_MODE_AES_256_XTS;
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return BLK_ENCRYPTION_MODE_INVALID;
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}
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/**
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* cmdq_host_init_crypto - Read crypto capabilities, init crypto fields in host
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* @host: Per adapter instance
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*
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* Returns 0 on success. Returns -ENODEV if such capabilities don't exist, and
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* -ENOMEM upon OOM.
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*/
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int cmdq_host_init_crypto_spec(struct cmdq_host *host,
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const struct keyslot_mgmt_ll_ops *ksm_ops)
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{
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int cap_idx = 0;
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int err = 0;
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unsigned int crypto_modes_supported[BLK_ENCRYPTION_MODE_MAX];
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enum blk_crypto_mode_num blk_mode_num;
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/* Default to disabling crypto */
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host->caps &= ~CMDQ_CAP_CRYPTO_SUPPORT;
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if (!(cmdq_readl(host, CQCAP) & CQ_CAP_CS)) {
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pr_err("%s no crypto capability\n", __func__);
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err = -ENODEV;
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goto out;
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}
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/*
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* Crypto Capabilities should never be 0, because the
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* config_array_ptr > 04h. So we use a 0 value to indicate that
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* crypto init failed, and can't be enabled.
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*/
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host->crypto_capabilities.reg_val = cmdq_readl(host, CQ_CCAP);
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host->crypto_cfg_register =
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(u32)host->crypto_capabilities.config_array_ptr * 0x100;
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host->crypto_cap_array =
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devm_kcalloc(mmc_dev(host->mmc),
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host->crypto_capabilities.num_crypto_cap,
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sizeof(host->crypto_cap_array[0]), GFP_KERNEL);
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if (!host->crypto_cap_array) {
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err = -ENOMEM;
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pr_err("%s no memory cap\n", __func__);
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goto out;
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}
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memset(crypto_modes_supported, 0, sizeof(crypto_modes_supported));
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/*
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* Store all the capabilities now so that we don't need to repeatedly
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* access the device each time we want to know its capabilities
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*/
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for (cap_idx = 0; cap_idx < host->crypto_capabilities.num_crypto_cap;
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cap_idx++) {
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host->crypto_cap_array[cap_idx].reg_val =
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cpu_to_le32(cmdq_readl(host,
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CQ_CRYPTOCAP +
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cap_idx * sizeof(__le32)));
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blk_mode_num = cmdq_crypto_blk_crypto_mode_num_for_alg_dusize(
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host->crypto_cap_array[cap_idx].algorithm_id,
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host->crypto_cap_array[cap_idx].key_size);
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if (blk_mode_num == BLK_ENCRYPTION_MODE_INVALID)
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continue;
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crypto_modes_supported[blk_mode_num] |=
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host->crypto_cap_array[cap_idx].sdus_mask * 512;
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}
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cmdq_crypto_clear_all_keyslots(host);
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host->ksm = keyslot_manager_create(host->mmc->parent,
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cmdq_num_keyslots(host), ksm_ops,
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BLK_CRYPTO_FEATURE_STANDARD_KEYS,
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crypto_modes_supported, host);
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if (!host->ksm) {
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err = -ENOMEM;
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goto out_free_caps;
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}
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/*
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* In case host controller supports cryptographic operations
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* then, it uses 128bit task descriptor. Upper 64 bits of task
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* descriptor would be used to pass crypto specific informaton.
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*/
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host->caps |= CMDQ_TASK_DESC_SZ_128;
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return 0;
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out_free_caps:
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devm_kfree(mmc_dev(host->mmc), host->crypto_cap_array);
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out:
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// TODO: print error?
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/* Indicate that init failed by setting crypto_capabilities to 0 */
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host->crypto_capabilities.reg_val = 0;
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return err;
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}
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EXPORT_SYMBOL(cmdq_host_init_crypto_spec);
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void cmdq_crypto_setup_rq_keyslot_manager_spec(struct cmdq_host *host,
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struct request_queue *q)
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{
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if (!cmdq_host_is_crypto_supported(host) || !q)
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return;
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q->ksm = host->ksm;
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}
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EXPORT_SYMBOL(cmdq_crypto_setup_rq_keyslot_manager_spec);
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void cmdq_crypto_destroy_rq_keyslot_manager_spec(struct cmdq_host *host,
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struct request_queue *q)
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{
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keyslot_manager_destroy(host->ksm);
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}
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EXPORT_SYMBOL(cmdq_crypto_destroy_rq_keyslot_manager_spec);
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int cmdq_prepare_crypto_desc_spec(struct cmdq_host *host,
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struct mmc_request *mrq,
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u64 *ice_ctx)
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{
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struct bio_crypt_ctx *bc;
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struct request *req = mrq->req;
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if (!req->bio ||
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!bio_crypt_should_process(req)) {
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*ice_ctx = 0;
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return 0;
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}
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if (WARN_ON(!cmdq_is_crypto_enabled(host))) {
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/*
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* Upper layer asked us to do inline encryption
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* but that isn't enabled, so we fail this request.
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*/
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return -EINVAL;
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}
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bc = req->bio->bi_crypt_context;
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if (!cmdq_keyslot_valid(host, bc->bc_keyslot))
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return -EINVAL;
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if (ice_ctx) {
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*ice_ctx = DATA_UNIT_NUM(bc->bc_dun[0]) |
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CRYPTO_CONFIG_INDEX(bc->bc_keyslot) |
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CRYPTO_ENABLE(true);
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}
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return 0;
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}
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EXPORT_SYMBOL(cmdq_prepare_crypto_desc_spec);
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/* Crypto Variant Ops Support */
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void cmdq_crypto_enable(struct cmdq_host *host)
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{
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if (host->crypto_vops && host->crypto_vops->enable)
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return host->crypto_vops->enable(host);
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return cmdq_crypto_enable_spec(host);
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}
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void cmdq_crypto_disable(struct cmdq_host *host)
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{
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if (host->crypto_vops && host->crypto_vops->disable)
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return host->crypto_vops->disable(host);
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return cmdq_crypto_disable_spec(host);
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}
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int cmdq_host_init_crypto(struct cmdq_host *host)
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{
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if (host->crypto_vops && host->crypto_vops->host_init_crypto)
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return host->crypto_vops->host_init_crypto(host,
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&cmdq_ksm_ops);
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return cmdq_host_init_crypto_spec(host, &cmdq_ksm_ops);
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}
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void cmdq_crypto_setup_rq_keyslot_manager(struct cmdq_host *host,
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struct request_queue *q)
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{
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if (host->crypto_vops && host->crypto_vops->setup_rq_keyslot_manager)
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return host->crypto_vops->setup_rq_keyslot_manager(host, q);
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return cmdq_crypto_setup_rq_keyslot_manager_spec(host, q);
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}
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void cmdq_crypto_destroy_rq_keyslot_manager(struct cmdq_host *host,
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struct request_queue *q)
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{
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if (host->crypto_vops && host->crypto_vops->destroy_rq_keyslot_manager)
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return host->crypto_vops->destroy_rq_keyslot_manager(host, q);
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return cmdq_crypto_destroy_rq_keyslot_manager_spec(host, q);
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}
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int cmdq_crypto_get_ctx(struct cmdq_host *host,
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struct mmc_request *mrq,
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u64 *ice_ctx)
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{
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if (host->crypto_vops && host->crypto_vops->prepare_crypto_desc)
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return host->crypto_vops->prepare_crypto_desc(host, mrq,
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ice_ctx);
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return cmdq_prepare_crypto_desc_spec(host, mrq, ice_ctx);
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}
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int cmdq_complete_crypto_desc(struct cmdq_host *host,
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struct mmc_request *mrq,
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u64 *ice_ctx)
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{
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if (host->crypto_vops && host->crypto_vops->complete_crypto_desc)
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return host->crypto_vops->complete_crypto_desc(host, mrq,
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ice_ctx);
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return 0;
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}
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void cmdq_crypto_debug(struct cmdq_host *host)
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{
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if (host->crypto_vops && host->crypto_vops->debug)
|
|
host->crypto_vops->debug(host);
|
|
}
|
|
|
|
void cmdq_crypto_set_vops(struct cmdq_host *host,
|
|
struct cmdq_host_crypto_variant_ops *crypto_vops)
|
|
{
|
|
if (host)
|
|
host->crypto_vops = crypto_vops;
|
|
}
|
|
|
|
int cmdq_crypto_suspend(struct cmdq_host *host)
|
|
{
|
|
if (host->crypto_vops && host->crypto_vops->suspend)
|
|
return host->crypto_vops->suspend(host);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int cmdq_crypto_resume(struct cmdq_host *host)
|
|
{
|
|
if (host->crypto_vops && host->crypto_vops->resume)
|
|
return host->crypto_vops->resume(host);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int cmdq_crypto_reset(struct cmdq_host *host)
|
|
{
|
|
if (host->crypto_vops && host->crypto_vops->reset)
|
|
return host->crypto_vops->reset(host);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int cmdq_crypto_recovery_finish(struct cmdq_host *host)
|
|
{
|
|
if (host->crypto_vops && host->crypto_vops->recovery_finish)
|
|
return host->crypto_vops->recovery_finish(host);
|
|
|
|
/* Reset/Recovery might clear all keys, so reprogram all the keys. */
|
|
keyslot_manager_reprogram_all_keys(host->ksm);
|
|
|
|
return 0;
|
|
}
|
|
|