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349 lines
7.0 KiB
349 lines
7.0 KiB
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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&tlmm {
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ioexp_intr_active: ioexp_intr_active {
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mux {
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pins = "gpio84";
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function = "gpio";
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};
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config {
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pins = "gpio84";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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ioexp_reset_active: ioexp_reset_active {
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mux {
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pins = "gpio30";
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function = "gpio";
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};
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config {
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pins = "gpio30";
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drive-strength = <2>;
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bias-disable;
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output-high;
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};
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};
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};
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&sde_dp0 {
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qcom,ext-disp = <&ext_disp>;
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qcom,dp-hpd-gpio = <&ioexp 8 0>;
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qcom,mst-fixed-topology-ports = <1 2>;
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qcom,core-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,core-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "refgen";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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&sde_dp1 {
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qcom,ext-disp = <&ext_disp>;
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qcom,dp-hpd-gpio = <&ioexp 9 0>;
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qcom,core-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,core-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "refgen";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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&sde_edp {
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qcom,ext-disp = <&ext_disp>;
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qcom,dp-hpd-gpio = <&ioexp 11 0>;
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qcom,core-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,core-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "refgen";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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&qupv3_se15_i2c {
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status = "ok";
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pinctrl-0 = <&qupv3_se15_i2c_active
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&ioexp_intr_active
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&ioexp_reset_active>;
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ioexp: gpio@3e {
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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compatible = "semtech,sx1509q";
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reg = <0x3e>;
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interrupt-parent = <&tlmm>;
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interrupts = <84 0>;
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gpio-controller;
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interrupt-controller;
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semtech,probe-reset;
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pinctrl-names = "default";
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pinctrl-0 = <&dsi1_hpd_cfg_pins
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&dsi1_cdet_cfg_pins
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&dsi2_hpd_cfg_pins
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&dsi2_cdet_cfg_pins
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&dp0_hpd_cfg_pins
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&dp1_hpd_cfg_pins
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&edp_hpd_cfg_pins>;
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dsi1_hpd_cfg_pins: gpio0-cfg {
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pins = "gpio0";
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bias-pull-up;
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};
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dsi1_cdet_cfg_pins: gpio1-cfg {
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pins = "gpio1";
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bias-pull-down;
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};
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dsi2_hpd_cfg_pins: gpio2-cfg {
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pins = "gpio2";
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bias-pull-up;
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};
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dsi2_cdet_cfg_pins: gpio3-cfg {
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pins = "gpio3";
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bias-pull-down;
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};
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dp0_hpd_cfg_pins: gpio8-cfg {
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pins = "gpio8";
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bias-pull-down;
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};
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dp1_hpd_cfg_pins: gpio9-cfg {
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pins = "gpio9";
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bias-pull-down;
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};
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edp_hpd_cfg_pins: gpio11-cfg {
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pins = "gpio11";
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bias-pull-down;
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};
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};
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i2c-mux@77 {
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compatible = "nxp,pca9542";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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anx_7625_1: anx7625@2c {
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compatible = "analogix,anx7625";
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reg = <0x2c>;
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interrupt-parent = <&ioexp>;
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interrupts = <0 0>;
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cbl_det-gpio = <&ioexp 1 0>;
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power_en-gpio = <&tlmm 83 0>;
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reset_n-gpio = <&tlmm 49 0>;
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};
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};
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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anx_7625_2: anx7625@2c {
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compatible = "analogix,anx7625";
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reg = <0x2c>;
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interrupt-parent = <&ioexp>;
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interrupts = <2 0>;
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cbl_det-gpio = <&ioexp 3 0>;
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power_en-gpio = <&tlmm 87 0>;
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reset_n-gpio = <&tlmm 29 0>;
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};
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};
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};
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};
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&anx_7625_1 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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anx_7625_1_in: endpoint {
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remote-endpoint = <&dsi_anx_7625_1_out>;
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};
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};
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};
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};
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&anx_7625_2 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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anx_7625_2_in: endpoint {
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remote-endpoint = <&dsi_anx_7625_2_out>;
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};
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};
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};
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};
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#include "dsi-panel-ext-bridge-1080p.dtsi"
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&dsi_ext_bridge_1080p {
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qcom,mdss-dsi-ext-bridge = <0>;
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qcom,mdss-dsi-display-timings {
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timing@0{
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qcom,mdss-dsi-panel-phy-timings = [00 1E 08 07 24 22
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08 08 05 02 04 00 19 17];
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};
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};
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};
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&soc {
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dsi_anx_7625_1: qcom,dsi-display@17 {
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label = "dsi_anx_7625_1";
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qcom,dsi-display-active;
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qcom,display-type = "primary";
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qcom,dsi-ctrl-num = <0>;
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qcom,dsi-phy-num = <0>;
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
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qcom,dsi-panel = <&dsi_ext_bridge_1080p>;
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};
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dsi_anx_7625_2: qcom,dsi-display@18 {
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label = "dsi_anx_7625_2";
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qcom,dsi-display-active;
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qcom,display-type = "secondary";
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qcom,dsi-ctrl-num = <1>;
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qcom,dsi-phy-num = <1>;
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qcom,dsi-select-clocks = "mux_byte_clk1", "mux_pixel_clk1";
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qcom,dsi-panel = <&dsi_ext_bridge_1080p>;
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};
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dsi_dp1: qcom,dsi-display@1 {
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compatible = "qcom,dsi-display";
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label = "primary";
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qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
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qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
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clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
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<&mdss_dsi0_pll PCLK_MUX_0_CLK>,
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<&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
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<&mdss_dsi1_pll PCLK_MUX_1_CLK>,
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<&clock_rpmh RPMH_CXO_CLK>;
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clock-names = "mux_byte_clk0", "mux_pixel_clk0",
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"mux_byte_clk1", "mux_pixel_clk1", "xo_clk";
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qcom,dsi-display-list =
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<&dsi_anx_7625_1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi_anx_7625_1_out: endpoint {
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remote-endpoint = <&anx_7625_1_in>;
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};
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};
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};
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};
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dsi_dp2: qcom,dsi-display@2 {
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compatible = "qcom,dsi-display";
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label = "secondary";
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qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
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qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
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clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
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<&mdss_dsi0_pll PCLK_MUX_0_CLK>,
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<&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,
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<&mdss_dsi1_pll PCLK_MUX_1_CLK>,
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<&clock_rpmh RPMH_CXO_CLK>;
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clock-names = "mux_byte_clk0", "mux_pixel_clk0",
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"mux_byte_clk1", "mux_pixel_clk1", "xo_clk";
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qcom,dsi-display-list =
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<&dsi_anx_7625_2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi_anx_7625_2_out: endpoint {
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remote-endpoint = <&anx_7625_2_in>;
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};
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};
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};
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};
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sde_wb: qcom,wb-display@0 {
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compatible = "qcom,wb-display";
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cell-index = <0>;
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label = "wb_display";
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};
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ext_disp: qcom,msm-ext-disp {
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compatible = "qcom,msm-ext-disp";
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ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {
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compatible = "qcom,msm-ext-disp-audio-codec-rx";
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};
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};
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};
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&mdss_mdp {
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qcom,sde-ctl-display-pref = "primary", "none", "none",
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"none", "none";
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qcom,sde-mixer-display-pref = "primary", "none", "none",
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"none", "none", "none";
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};
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