/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include #include &tlmm { ioexp_intr_active: ioexp_intr_active { mux { pins = "gpio84"; function = "gpio"; }; config { pins = "gpio84"; drive-strength = <2>; bias-pull-up; }; }; ioexp_reset_active: ioexp_reset_active { mux { pins = "gpio30"; function = "gpio"; }; config { pins = "gpio30"; drive-strength = <2>; bias-disable; output-high; }; }; }; &sde_dp0 { qcom,ext-disp = <&ext_disp>; qcom,dp-hpd-gpio = <&ioexp 8 0>; qcom,mst-fixed-topology-ports = <1 2>; qcom,core-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,core-supply-entry@0 { reg = <0>; qcom,supply-name = "refgen"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; &sde_dp1 { qcom,ext-disp = <&ext_disp>; qcom,dp-hpd-gpio = <&ioexp 9 0>; qcom,core-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,core-supply-entry@0 { reg = <0>; qcom,supply-name = "refgen"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; &sde_edp { qcom,ext-disp = <&ext_disp>; qcom,dp-hpd-gpio = <&ioexp 11 0>; qcom,core-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,core-supply-entry@0 { reg = <0>; qcom,supply-name = "refgen"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; &qupv3_se15_i2c { status = "ok"; pinctrl-0 = <&qupv3_se15_i2c_active &ioexp_intr_active &ioexp_reset_active>; ioexp: gpio@3e { #gpio-cells = <2>; #interrupt-cells = <2>; compatible = "semtech,sx1509q"; reg = <0x3e>; interrupt-parent = <&tlmm>; interrupts = <84 0>; gpio-controller; interrupt-controller; semtech,probe-reset; pinctrl-names = "default"; pinctrl-0 = <&dsi1_hpd_cfg_pins &dsi1_cdet_cfg_pins &dsi2_hpd_cfg_pins &dsi2_cdet_cfg_pins &dp0_hpd_cfg_pins &dp1_hpd_cfg_pins &edp_hpd_cfg_pins>; dsi1_hpd_cfg_pins: gpio0-cfg { pins = "gpio0"; bias-pull-up; }; dsi1_cdet_cfg_pins: gpio1-cfg { pins = "gpio1"; bias-pull-down; }; dsi2_hpd_cfg_pins: gpio2-cfg { pins = "gpio2"; bias-pull-up; }; dsi2_cdet_cfg_pins: gpio3-cfg { pins = "gpio3"; bias-pull-down; }; dp0_hpd_cfg_pins: gpio8-cfg { pins = "gpio8"; bias-pull-down; }; dp1_hpd_cfg_pins: gpio9-cfg { pins = "gpio9"; bias-pull-down; }; edp_hpd_cfg_pins: gpio11-cfg { pins = "gpio11"; bias-pull-down; }; }; i2c-mux@77 { compatible = "nxp,pca9542"; reg = <0x77>; #address-cells = <1>; #size-cells = <0>; i2c@0 { #address-cells = <1>; #size-cells = <0>; reg = <0>; anx_7625_1: anx7625@2c { compatible = "analogix,anx7625"; reg = <0x2c>; interrupt-parent = <&ioexp>; interrupts = <0 0>; cbl_det-gpio = <&ioexp 1 0>; power_en-gpio = <&tlmm 83 0>; reset_n-gpio = <&tlmm 49 0>; }; }; i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; anx_7625_2: anx7625@2c { compatible = "analogix,anx7625"; reg = <0x2c>; interrupt-parent = <&ioexp>; interrupts = <2 0>; cbl_det-gpio = <&ioexp 3 0>; power_en-gpio = <&tlmm 87 0>; reset_n-gpio = <&tlmm 29 0>; }; }; }; }; &anx_7625_1 { ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; anx_7625_1_in: endpoint { remote-endpoint = <&dsi_anx_7625_1_out>; }; }; }; }; &anx_7625_2 { ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; anx_7625_2_in: endpoint { remote-endpoint = <&dsi_anx_7625_2_out>; }; }; }; }; #include "dsi-panel-ext-bridge-1080p.dtsi" &dsi_ext_bridge_1080p { qcom,mdss-dsi-ext-bridge = <0>; qcom,mdss-dsi-display-timings { timing@0{ qcom,mdss-dsi-panel-phy-timings = [00 1E 08 07 24 22 08 08 05 02 04 00 19 17]; }; }; }; &soc { dsi_anx_7625_1: qcom,dsi-display@17 { label = "dsi_anx_7625_1"; qcom,dsi-display-active; qcom,display-type = "primary"; qcom,dsi-ctrl-num = <0>; qcom,dsi-phy-num = <0>; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; qcom,dsi-panel = <&dsi_ext_bridge_1080p>; }; dsi_anx_7625_2: qcom,dsi-display@18 { label = "dsi_anx_7625_2"; qcom,dsi-display-active; qcom,display-type = "secondary"; qcom,dsi-ctrl-num = <1>; qcom,dsi-phy-num = <1>; qcom,dsi-select-clocks = "mux_byte_clk1", "mux_pixel_clk1"; qcom,dsi-panel = <&dsi_ext_bridge_1080p>; }; dsi_dp1: qcom,dsi-display@1 { compatible = "qcom,dsi-display"; label = "primary"; qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>; qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>; clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>, <&mdss_dsi0_pll PCLK_MUX_0_CLK>, <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>, <&mdss_dsi1_pll PCLK_MUX_1_CLK>, <&clock_rpmh RPMH_CXO_CLK>; clock-names = "mux_byte_clk0", "mux_pixel_clk0", "mux_byte_clk1", "mux_pixel_clk1", "xo_clk"; qcom,dsi-display-list = <&dsi_anx_7625_1>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dsi_anx_7625_1_out: endpoint { remote-endpoint = <&anx_7625_1_in>; }; }; }; }; dsi_dp2: qcom,dsi-display@2 { compatible = "qcom,dsi-display"; label = "secondary"; qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>; qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>; clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>, <&mdss_dsi0_pll PCLK_MUX_0_CLK>, <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>, <&mdss_dsi1_pll PCLK_MUX_1_CLK>, <&clock_rpmh RPMH_CXO_CLK>; clock-names = "mux_byte_clk0", "mux_pixel_clk0", "mux_byte_clk1", "mux_pixel_clk1", "xo_clk"; qcom,dsi-display-list = <&dsi_anx_7625_2>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; dsi_anx_7625_2_out: endpoint { remote-endpoint = <&anx_7625_2_in>; }; }; }; }; sde_wb: qcom,wb-display@0 { compatible = "qcom,wb-display"; cell-index = <0>; label = "wb_display"; }; ext_disp: qcom,msm-ext-disp { compatible = "qcom,msm-ext-disp"; ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx { compatible = "qcom,msm-ext-disp-audio-codec-rx"; }; }; }; &mdss_mdp { qcom,sde-ctl-display-pref = "primary", "none", "none", "none", "none"; qcom,sde-mixer-display-pref = "primary", "none", "none", "none", "none", "none"; };