Commit Graph

53 Commits (7105de84f1cb5ef640bfe4b8b137837c346caab5)

Author SHA1 Message Date
Thomas Bogendoerfer e0cee3eea7 [MIPS] Fix WARNING: at kernel/smp.c:290 17 years ago
Thomas Bogendoerfer 326e2e1a59 [MIPS] R4700: Fix build_tlb_probe_entry 17 years ago
Thomas Bogendoerfer b1ec4c8e48 [MIPS] Add missing 4KEC TLB refill handler 17 years ago
Ralf Baechle 234fcd1484 [MIPS] Fix loads of section missmatches 17 years ago
Thiemo Seufer e30ec4525d [MIPS] Split the micro-assembler from tlbex.c. 17 years ago
Manuel Lauss 237cfee1db [MIPS] Alchemy: Au1210/Au1250 CPU support 17 years ago
Franck Bui-Huu 92b1e6a64a [MIPS] tlbex.c: cleanup debug code 17 years ago
Franck Bui-Huu cbdbe07f9d [MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align 17 years ago
Franck Bui-Huu f49b94d8c1 [MIPS] tlbex.c: cleanup include files 17 years ago
Franck Bui-Huu a9af6041e9 [MIPS] tlbex.c: Cleanup __init usages. 17 years ago
Maciej W. Rozycki 619b6e18fc [MIPS] R4000/R4400 daddiu erratum workaround 17 years ago
Ralf Baechle 161548bf35 [MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers. 17 years ago
Ralf Baechle 6f1ca1d286 [MIPS] Revert "[MIPS] tlbex.c: Cleanup __init usage." 18 years ago
Franck Bui-Huu aaf76a3245 [MIPS] tlbex.c: Cleanup __init usage. 18 years ago
Ralf Baechle 21a151d8ca [MIPS] checkfiles: Fix "need space after that ','" errors. 18 years ago
Ralf Baechle 10cc352907 [MIPS] Allow hardwiring of the CPU type to a single type for optimization. 18 years ago
Ralf Baechle aeffdbbaff [MIPS] tlbex: Size optimize code by declaring a few functions inline. 18 years ago
Aurelien Jarno 1c0c13eb93 [MIPS] Add support for BCM47XX CPUs. 18 years ago
Maciej W. Rozycki 8df5beac2a [MIPS] Workaround for 4Kc machine check exception 18 years ago
Thiemo Seufer d6698a2cd6 [MIPS] TLB: Fix instruction bitmasks 18 years ago
Thiemo Seufer 603c338bdd [MIPS] TLB: Fix instruction bitmasks 18 years ago
Fuxin Zhang 2a21c7300b [MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2 18 years ago
David Rientjes e8b6d40a00 [MIPS] tlbex: use __maybe_unused 18 years ago
Atsushi Nemoto 656be92f9a [MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=n 18 years ago
Ralf Baechle 242954b5aa [MIPS] 16K & 64K page size fixes 19 years ago
Matt LaPlante 4b3f686d4a Attack of "the the"s in arch 19 years ago
Thiemo Seufer 115f2a44e0 [MIPS] Print out TLB handler assembly for debugging. 19 years ago
Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h> 19 years ago
Kumba 44d921b246 [MIPS] Treat R14000 like R10000. 19 years ago
Chris Dearman c620953c32 [MIPS] Fix detection and handling of the 74K processor. 19 years ago
Ralf Baechle 41c594ab65 [MIPS] MT: Improved multithreading support. 19 years ago
Ralf Baechle 91b05e6776 [MIPS] Fix vectored interrupt support in TLB exception handler generator. 19 years ago
Ralf Baechle 8145095cd8 [MIPS] Remove CONFIG_BUILD_ELF64. 19 years ago
Ralf Baechle 1443e483e3 [MIPS] Scatter a bunch of __init over tlbex.c. 19 years ago
Andrew Isaacson 93ce2f524e Add support for SB1A CPU. 20 years ago
Thiemo Seufer f5b4d9563b R4600 v2.0 needs a nop before tlbp. 20 years ago
Ralf Baechle 7623debf26 Handle mtc0 - tlb write hazard for VR5432. 20 years ago
Ralf Baechle 1d40cfcd34 Avoid SMP cacheflushes. This is a minor optimization of startup but 20 years ago
Pete Popov bdf21b18b4 Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it. 20 years ago
Ralf Baechle bbc7f22f6d Detect the 34K. 20 years ago
Ralf Baechle 3ef33e68c1 Date: Fri Jul 8 20:10:17 2005 +0000 20 years ago
Maciej W. Rozycki 2c93e12cfe Avoid tlbw* hazards for the R4600/R4700/R5000. 20 years ago
Maciej W. Rozycki 4c0a2d4275 Fix the diagnostic dump for the XTLB refill handler. 20 years ago
Maciej W. Rozycki 41986a6e7e Fix a diagnostic message. 20 years ago
Maciej W. Rozycki fded2e508a Optimize R3k TLB Load/Store/Modified handlers, by scheduling 20 years ago
Maciej W. Rozycki d925c262dd Fill R3k load delay slots properly. 20 years ago
Maciej W. Rozycki 9678e28b1a Only dump instructions actually emitted. 20 years ago
Thiemo Seufer 63b2d2f4d2 Handle _PAGE_DIRTY correctly for CONFIG_64BIT_PHYS_ADDR on 32bit CPUs. 20 years ago
Thiemo Seufer 1b3a6e975c Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMP 20 years ago
Ralf Baechle 6cbe063159 R4300 delay slot. 20 years ago