* Add support for the r8a7745 SoC to rcar-sysc -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYNfAfAAoJENfPZGlqN0++t14P/RukycPu2VgJ+F3G+OJoD2WS ltEYrhhZxIL9cjyLmiA7Mj7Ig9dMtzmiBC0W3HY5zvZN2OiOrzmNykfFdu9UN8rX iMZ6lDrq7o+Qsm1Q4Ab2miatqOqM7JPSacJPixLZFpvs6T79CCRMYaEeIB8AYD3O ij/tRDtxdvfY97iy5la9XvtA/63EmP6DZ2SxfqPXd6W0GaBg+QKBOLlcCR0yDrKh NosHdbiAbMapBSPbsnbhKLebpnPw159iu7VA73JbsrsFZ9IDRkwoA+wcgEEWnF8C b9S31TAglhL04AysUowlHjhEOU2hWPcF8rm3lisDghoUC6Rb/3gCPII+KnU6d5Z4 QNCbY6IlWqya9wR3kavHmJHOowGt/LqrmLCnJSoTTbKgo6xPxN3kis6oRo2sY9w1 KUJWgt9vfQ/H6ik2epkMg7sQbkBcsONUDUgVhFyaAqTKEgeIz5OggfNsYkQYYT37 qlQkLgKweKYJmmr/ilCeVdmkdhPegII8aiYWdwb8N2cUY4I0nyUwnE+v9cdPRhxr LpONUZV+GtCz8O/Y2XtjxwhYoYUtHbUzSax+aw4qtBBmdyKcaQ1VIyn27gfofmht Q3itzk/eGp0GgnsadknYK9eOvWWjPf07/jvYgSVfL6rWGR+4/vcEht/kU+O9dnpP HMZ6/PrbmYoxWkY49sH7 =pOb+ -----END PGP SIGNATURE----- Merge tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Pull "Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10" from Simon Horman: * Add support for the r8a7745 SoC to rcar-sysc * tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: rcar-sysc: add R8A7745 support ARM: shmobile: r8a7745: add power domain index macros Signed-off-by: Arnd Bergmann <arnd@arndb.de>tirimbino
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/*
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* Renesas RZ/G1E System Controller |
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* |
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* Copyright (C) 2016 Cogent Embedded Inc. |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation; of the License. |
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*/ |
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#include <linux/bug.h> |
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#include <linux/kernel.h> |
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#include <dt-bindings/power/r8a7745-sysc.h> |
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#include "rcar-sysc.h" |
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static const struct rcar_sysc_area r8a7745_areas[] __initconst = { |
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{ "always-on", 0, 0, R8A7745_PD_ALWAYS_ON, -1, PD_ALWAYS_ON }, |
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{ "ca7-scu", 0x100, 0, R8A7745_PD_CA7_SCU, R8A7745_PD_ALWAYS_ON, |
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PD_SCU }, |
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{ "ca7-cpu0", 0x1c0, 0, R8A7745_PD_CA7_CPU0, R8A7745_PD_CA7_SCU, |
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PD_CPU_NOCR }, |
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{ "ca7-cpu1", 0x1c0, 1, R8A7745_PD_CA7_CPU1, R8A7745_PD_CA7_SCU, |
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PD_CPU_NOCR }, |
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{ "sgx", 0xc0, 0, R8A7745_PD_SGX, R8A7745_PD_ALWAYS_ON }, |
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}; |
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const struct rcar_sysc_info r8a7745_sysc_info __initconst = { |
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.areas = r8a7745_areas, |
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.num_areas = ARRAY_SIZE(r8a7745_areas), |
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}; |
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/*
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* Copyright (C) 2016 Cogent Embedded Inc. |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License version 2 as |
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* published by the Free Software Foundation. |
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*/ |
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#ifndef __DT_BINDINGS_POWER_R8A7745_SYSC_H__ |
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#define __DT_BINDINGS_POWER_R8A7745_SYSC_H__ |
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/*
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* These power domain indices match the numbers of the interrupt bits |
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* representing the power areas in the various Interrupt Registers |
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* (e.g. SYSCISR, Interrupt Status Register) |
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*/ |
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#define R8A7745_PD_CA7_CPU0 5 |
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#define R8A7745_PD_CA7_CPU1 6 |
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#define R8A7745_PD_SGX 20 |
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#define R8A7745_PD_CA7_SCU 21 |
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/* Always-on power area */ |
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#define R8A7745_PD_ALWAYS_ON 32 |
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#endif /* __DT_BINDINGS_POWER_R8A7745_SYSC_H__ */ |
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