Adds a new driver for Altera soft GPIO IP. The driver is able to do read/write and allows GPIO to be a interrupt controller. Tested on Altera GHRD on interrupt handling and IO. v10: - Updated conflicting device tree parameters - Removed unused headers - Used macro instead of magic numbers for ngpio - Code readability cleanup using ?: and temporal variables - Removed leftover garbage and unnecessary function calls - Checked bgpio_init but unusable because Altera GPIO may not be a multiple of 8 bits v9: - Removed duplicated initialization on set_type using temporals to improve code readability in calling generic_handle_irq - Using ?: ternary to reduce code size v8: - Using for_each_set_bit - Added const for struct definition - Removed naggy pr_err - Sort alpha header - Remove unused macros - Use fixed width data types instead of unsigned long - Whitespace issue fixes - Removed _relaxed function for better compatibility across different CPU - Changed irq_create_mapping to platform_get_irq updated implementation to use gpiochip_irqchip_add - Reserve interrupt-cells number 2 in device tree binding for future use - Remove confusing sections on devicetree bindings - Added tristate Kconfig help text v7: - Used dev_warn instead of pr_warn - Clean up unnecesarry if else indentation v6: - Added irq_startup and irq_shutdown - Changed bitwise clamping style - Cleanup bitwise operation to improve readability change naming of mapped irqs from virq to mapped_irq v5: - Dispose irq_domain mapping correctly - Update optional binding description in binding docs v4: - Added vendor prefix to devicetree binding for IP specific properties using MMIO GPIO helper library instead of manually map PIO to memory - altera_gpio_chip inline struct documentation to kerneldoc - Using dev_ print to print a better failure message v2, v3: - Do not reference NO_IRQ - Updated irq_set_type to only allow the hardware configured irq type Signed-off-by: Tien Hock Loh <thloh@altera.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>tirimbino
Tien Hock Loh
10 years ago
committed by
Linus Walleij
parent
d32efe3796
commit
c5abbba932
@ -0,0 +1,374 @@ |
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/*
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* Copyright (C) 2013 Altera Corporation |
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* Based on gpio-mpc8xxx.c |
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* |
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* This program is free software; you can redistribute it and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation; either version 2 of the License, or |
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* (at your option) any later version. |
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* |
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* This program is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/ |
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#include <linux/io.h> |
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#include <linux/of_gpio.h> |
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#include <linux/platform_device.h> |
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#define ALTERA_GPIO_MAX_NGPIO 32 |
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#define ALTERA_GPIO_DATA 0x0 |
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#define ALTERA_GPIO_DIR 0x4 |
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#define ALTERA_GPIO_IRQ_MASK 0x8 |
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#define ALTERA_GPIO_EDGE_CAP 0xc |
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/**
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* struct altera_gpio_chip |
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* @mmchip : memory mapped chip structure. |
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* @gpio_lock : synchronization lock so that new irq/set/get requests |
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will be blocked until the current one completes. |
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* @interrupt_trigger : specifies the hardware configured IRQ trigger type |
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(rising, falling, both, high) |
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* @mapped_irq : kernel mapped irq number. |
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*/ |
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struct altera_gpio_chip { |
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struct of_mm_gpio_chip mmchip; |
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spinlock_t gpio_lock; |
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int interrupt_trigger; |
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int mapped_irq; |
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}; |
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static void altera_gpio_irq_unmask(struct irq_data *d) |
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{ |
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struct altera_gpio_chip *altera_gc; |
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struct of_mm_gpio_chip *mm_gc; |
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unsigned long flags; |
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u32 intmask; |
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altera_gc = irq_data_get_irq_chip_data(d); |
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mm_gc = &altera_gc->mmchip; |
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spin_lock_irqsave(&altera_gc->gpio_lock, flags); |
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intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); |
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/* Set ALTERA_GPIO_IRQ_MASK bit to unmask */ |
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intmask |= BIT(irqd_to_hwirq(d)); |
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writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); |
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spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); |
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} |
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static void altera_gpio_irq_mask(struct irq_data *d) |
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{ |
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struct altera_gpio_chip *altera_gc; |
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struct of_mm_gpio_chip *mm_gc; |
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unsigned long flags; |
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u32 intmask; |
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altera_gc = irq_data_get_irq_chip_data(d); |
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mm_gc = &altera_gc->mmchip; |
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spin_lock_irqsave(&altera_gc->gpio_lock, flags); |
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intmask = readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); |
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/* Clear ALTERA_GPIO_IRQ_MASK bit to mask */ |
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intmask &= ~BIT(irqd_to_hwirq(d)); |
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writel(intmask, mm_gc->regs + ALTERA_GPIO_IRQ_MASK); |
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spin_unlock_irqrestore(&altera_gc->gpio_lock, flags); |
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} |
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/**
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* This controller's IRQ type is synthesized in hardware, so this function |
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* just checks if the requested set_type matches the synthesized IRQ type |
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*/ |
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static int altera_gpio_irq_set_type(struct irq_data *d, |
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unsigned int type) |
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{ |
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struct altera_gpio_chip *altera_gc; |
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altera_gc = irq_data_get_irq_chip_data(d); |
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if (type == IRQ_TYPE_NONE) |
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return 0; |
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if (type == IRQ_TYPE_LEVEL_HIGH && |
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altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH) |
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return 0; |
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if (type == IRQ_TYPE_EDGE_RISING && |
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altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_RISING) |
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return 0; |
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if (type == IRQ_TYPE_EDGE_FALLING && |
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altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_FALLING) |
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return 0; |
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if (type == IRQ_TYPE_EDGE_BOTH && |
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altera_gc->interrupt_trigger == IRQ_TYPE_EDGE_BOTH) |
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return 0; |
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return -EINVAL; |
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} |
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static unsigned int altera_gpio_irq_startup(struct irq_data *d) { |
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altera_gpio_irq_unmask(d); |
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return 0; |
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} |
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static struct irq_chip altera_irq_chip = { |
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.name = "altera-gpio", |
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.irq_mask = altera_gpio_irq_mask, |
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.irq_unmask = altera_gpio_irq_unmask, |
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.irq_set_type = altera_gpio_irq_set_type, |
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.irq_startup = altera_gpio_irq_startup, |
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.irq_shutdown = altera_gpio_irq_mask, |
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}; |
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static int altera_gpio_get(struct gpio_chip *gc, unsigned offset) |
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{ |
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struct of_mm_gpio_chip *mm_gc; |
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mm_gc = to_of_mm_gpio_chip(gc); |
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return !!(readl(mm_gc->regs + ALTERA_GPIO_DATA) & BIT(offset)); |
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} |
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static void altera_gpio_set(struct gpio_chip *gc, unsigned offset, int value) |
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{ |
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struct of_mm_gpio_chip *mm_gc; |
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struct altera_gpio_chip *chip; |
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unsigned long flags; |
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unsigned int data_reg; |
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mm_gc = to_of_mm_gpio_chip(gc); |
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chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); |
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spin_lock_irqsave(&chip->gpio_lock, flags); |
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data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); |
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if (value) |
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data_reg |= BIT(offset); |
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else |
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data_reg &= ~BIT(offset); |
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writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); |
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spin_unlock_irqrestore(&chip->gpio_lock, flags); |
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} |
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static int altera_gpio_direction_input(struct gpio_chip *gc, unsigned offset) |
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{ |
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struct of_mm_gpio_chip *mm_gc; |
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struct altera_gpio_chip *chip; |
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unsigned long flags; |
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unsigned int gpio_ddr; |
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mm_gc = to_of_mm_gpio_chip(gc); |
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chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); |
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spin_lock_irqsave(&chip->gpio_lock, flags); |
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/* Set pin as input, assumes software controlled IP */ |
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gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); |
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gpio_ddr &= ~BIT(offset); |
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writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); |
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spin_unlock_irqrestore(&chip->gpio_lock, flags); |
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return 0; |
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} |
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static int altera_gpio_direction_output(struct gpio_chip *gc, |
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unsigned offset, int value) |
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{ |
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struct of_mm_gpio_chip *mm_gc; |
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struct altera_gpio_chip *chip; |
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unsigned long flags; |
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unsigned int data_reg, gpio_ddr; |
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mm_gc = to_of_mm_gpio_chip(gc); |
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chip = container_of(mm_gc, struct altera_gpio_chip, mmchip); |
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spin_lock_irqsave(&chip->gpio_lock, flags); |
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/* Sets the GPIO value */ |
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data_reg = readl(mm_gc->regs + ALTERA_GPIO_DATA); |
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if (value) |
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data_reg |= BIT(offset); |
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else |
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data_reg &= ~BIT(offset); |
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writel(data_reg, mm_gc->regs + ALTERA_GPIO_DATA); |
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/* Set pin as output, assumes software controlled IP */ |
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gpio_ddr = readl(mm_gc->regs + ALTERA_GPIO_DIR); |
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gpio_ddr |= BIT(offset); |
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writel(gpio_ddr, mm_gc->regs + ALTERA_GPIO_DIR); |
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spin_unlock_irqrestore(&chip->gpio_lock, flags); |
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return 0; |
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} |
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static void altera_gpio_irq_edge_handler(unsigned int irq, |
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struct irq_desc *desc) |
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{ |
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struct altera_gpio_chip *altera_gc; |
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struct irq_chip *chip; |
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struct of_mm_gpio_chip *mm_gc; |
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struct irq_domain *irqdomain; |
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unsigned long status; |
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int i; |
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altera_gc = irq_desc_get_handler_data(desc); |
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chip = irq_desc_get_chip(desc); |
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mm_gc = &altera_gc->mmchip; |
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irqdomain = altera_gc->mmchip.gc.irqdomain; |
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chained_irq_enter(chip, desc); |
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while ((status = |
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(readl(mm_gc->regs + ALTERA_GPIO_EDGE_CAP) & |
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readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK)))) { |
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writel(status, mm_gc->regs + ALTERA_GPIO_EDGE_CAP); |
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for_each_set_bit(i, &status, mm_gc->gc.ngpio) { |
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generic_handle_irq(irq_find_mapping(irqdomain, i)); |
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} |
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} |
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chained_irq_exit(chip, desc); |
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} |
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static void altera_gpio_irq_leveL_high_handler(unsigned int irq, |
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struct irq_desc *desc) |
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{ |
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struct altera_gpio_chip *altera_gc; |
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struct irq_chip *chip; |
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struct of_mm_gpio_chip *mm_gc; |
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struct irq_domain *irqdomain; |
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unsigned long status; |
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int i; |
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altera_gc = irq_desc_get_handler_data(desc); |
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chip = irq_desc_get_chip(desc); |
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mm_gc = &altera_gc->mmchip; |
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irqdomain = altera_gc->mmchip.gc.irqdomain; |
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chained_irq_enter(chip, desc); |
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status = readl(mm_gc->regs + ALTERA_GPIO_DATA); |
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status &= readl(mm_gc->regs + ALTERA_GPIO_IRQ_MASK); |
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for_each_set_bit(i, &status, mm_gc->gc.ngpio) { |
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generic_handle_irq(irq_find_mapping(irqdomain, i)); |
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} |
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chained_irq_exit(chip, desc); |
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} |
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int altera_gpio_probe(struct platform_device *pdev) |
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{ |
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struct device_node *node = pdev->dev.of_node; |
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int reg, ret; |
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struct altera_gpio_chip *altera_gc; |
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altera_gc = devm_kzalloc(&pdev->dev, sizeof(*altera_gc), GFP_KERNEL); |
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if (!altera_gc) |
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return -ENOMEM; |
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spin_lock_init(&altera_gc->gpio_lock); |
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if (of_property_read_u32(node, "altr,ngpio", ®)) |
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/* By default assume maximum ngpio */ |
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altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO; |
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else |
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altera_gc->mmchip.gc.ngpio = reg; |
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if (altera_gc->mmchip.gc.ngpio > ALTERA_GPIO_MAX_NGPIO) { |
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dev_warn(&pdev->dev, |
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"ngpio is greater than %d, defaulting to %d\n", |
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ALTERA_GPIO_MAX_NGPIO, ALTERA_GPIO_MAX_NGPIO); |
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altera_gc->mmchip.gc.ngpio = ALTERA_GPIO_MAX_NGPIO; |
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} |
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altera_gc->mmchip.gc.direction_input = altera_gpio_direction_input; |
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altera_gc->mmchip.gc.direction_output = altera_gpio_direction_output; |
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altera_gc->mmchip.gc.get = altera_gpio_get; |
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altera_gc->mmchip.gc.set = altera_gpio_set; |
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altera_gc->mmchip.gc.owner = THIS_MODULE; |
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altera_gc->mmchip.gc.dev = &pdev->dev; |
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ret = of_mm_gpiochip_add(node, &altera_gc->mmchip); |
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if (ret) { |
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dev_err(&pdev->dev, "Failed adding memory mapped gpiochip\n"); |
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return ret; |
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} |
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platform_set_drvdata(pdev, altera_gc); |
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altera_gc->mapped_irq = platform_get_irq(pdev, 0); |
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if (altera_gc->mapped_irq < 0) |
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goto skip_irq; |
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if (of_property_read_u32(node, "altr,interrupt-type", ®)) { |
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ret = -EINVAL; |
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dev_err(&pdev->dev, |
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"altr,interrupt-type value not set in device tree\n"); |
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goto teardown; |
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} |
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altera_gc->interrupt_trigger = reg; |
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ret = gpiochip_irqchip_add(&altera_gc->mmchip.gc, &altera_irq_chip, 0, |
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handle_simple_irq, IRQ_TYPE_NONE); |
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if (ret) { |
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dev_info(&pdev->dev, "could not add irqchip\n"); |
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return ret; |
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} |
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gpiochip_set_chained_irqchip(&altera_gc->mmchip.gc, |
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&altera_irq_chip, |
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altera_gc->mapped_irq, |
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altera_gc->interrupt_trigger == IRQ_TYPE_LEVEL_HIGH ? |
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altera_gpio_irq_leveL_high_handler : |
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altera_gpio_irq_edge_handler); |
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skip_irq: |
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return 0; |
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teardown: |
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pr_err("%s: registration failed with status %d\n", |
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node->full_name, ret); |
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return ret; |
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} |
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static int altera_gpio_remove(struct platform_device *pdev) |
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{ |
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struct altera_gpio_chip *altera_gc = platform_get_drvdata(pdev); |
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gpiochip_remove(&altera_gc->mmchip.gc); |
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return -EIO; |
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} |
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static const struct of_device_id altera_gpio_of_match[] = { |
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{ .compatible = "altr,pio-1.0", }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, altera_gpio_of_match); |
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static struct platform_driver altera_gpio_driver = { |
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.driver = { |
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.name = "altera_gpio", |
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.of_match_table = of_match_ptr(altera_gpio_of_match), |
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}, |
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.probe = altera_gpio_probe, |
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.remove = altera_gpio_remove, |
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}; |
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static int __init altera_gpio_init(void) |
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{ |
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return platform_driver_register(&altera_gpio_driver); |
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} |
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subsys_initcall(altera_gpio_init); |
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static void __exit altera_gpio_exit(void) |
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{ |
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platform_driver_unregister(&altera_gpio_driver); |
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} |
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module_exit(altera_gpio_exit); |
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MODULE_AUTHOR("Tien Hock Loh <thloh@altera.com>"); |
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MODULE_DESCRIPTION("Altera GPIO driver"); |
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MODULE_LICENSE("GPL"); |
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Reference in new issue