clk: qcom: mdss: Add check to read the gdsc status

Add check for SDM660 target and 12NM pll interface
to read the gdsc status bit.

Change-Id: I8bdee9deb9b68844769c2ab66a87d79e8659b6fd
Signed-off-by: Marco Zhang <zhangx@codeaurora.org>
Signed-off-by: Nirmal Abraham <nabrah@codeaurora.org>

drivers/clk/qcom/mdss/mdss-pll.h

@@ -219,8 +219,14 @@ static inline bool is_gdsc_disabled(struct mdss_pll_resources *pll_res)
 		WARN(1, "gdsc_base register is not defined\n");
 		return true;
 	}
-	ret = ((readl_relaxed(pll_res->gdsc_base + 0x4) & BIT(31)) &&
-		(!(readl_relaxed(pll_res->gdsc_base) & BIT(0)))) ? false : true;
+	if ((pll_res->target_id == MDSS_PLL_TARGET_SDM660) ||
+			(pll_res->pll_interface_type == MDSS_DSI_PLL_12NM))
+		ret = ((readl_relaxed(pll_res->gdsc_base + 0x4) & BIT(31)) &&
+			(!(readl_relaxed(pll_res->gdsc_base) & BIT(0)))) ?
+			false : true;
+	else
+		ret = readl_relaxed(pll_res->gdsc_base) & BIT(31) ?
+			false : true;
 	return ret;
 }