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@ -185,6 +185,7 @@ enum v4l2_memory { |
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V4L2_MEMORY_MMAP = 1, |
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V4L2_MEMORY_MMAP = 1, |
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V4L2_MEMORY_USERPTR = 2, |
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V4L2_MEMORY_USERPTR = 2, |
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V4L2_MEMORY_OVERLAY = 3, |
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V4L2_MEMORY_OVERLAY = 3, |
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V4L2_MEMORY_DMABUF = 4, |
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}; |
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}; |
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/* see also http://vektor.theorem.ca/graphics/ycbcr/ */ |
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/* see also http://vektor.theorem.ca/graphics/ycbcr/ */ |
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@ -343,16 +344,15 @@ struct v4l2_pix_format { |
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#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */ |
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#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */ |
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#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */ |
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#define V4L2_PIX_FMT_NV16 v4l2_fourcc('N', 'V', '1', '6') /* 16 Y/CbCr 4:2:2 */ |
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#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */ |
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#define V4L2_PIX_FMT_NV61 v4l2_fourcc('N', 'V', '6', '1') /* 16 Y/CrCb 4:2:2 */ |
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#define V4L2_PIX_FMT_NV24 v4l2_fourcc('N', 'V', '2', '4') /* 24 Y/CbCr 4:4:4 */ |
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#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */ |
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/* two non contiguous planes - one Y, one Cr + Cb interleaved */ |
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/* two non contiguous planes - one Y, one Cr + Cb interleaved */ |
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#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */ |
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#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */ |
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#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */ |
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#define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 macroblocks */ |
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#define V4L2_PIX_FMT_NV12MT v4l2_fourcc('T', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 64x32 macroblocks */ |
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#define V4L2_PIX_FMT_NV12MT_16X16 v4l2_fourcc('V', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 16x16 macroblocks */ |
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/* three non contiguous planes - Y, Cb, Cr */ |
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/* three non contiguous planes - Y, Cb, Cr */ |
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#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'U', 'V', 'M') /* 12 YUV420 planar */ |
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#define V4L2_PIX_FMT_YUV420M v4l2_fourcc('Y', 'M', '1', '2') /* 12 YUV420 planar */ |
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#define V4L2_PIX_FMT_YVU420M v4l2_fourcc('Y', 'V', 'U', 'M') /* 12 YVU420 planar */ |
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/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ |
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/* Bayer formats - see http://www.siliconimaging.com/RGB%20Bayer.htm */ |
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#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ |
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#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ |
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@ -379,23 +379,16 @@ struct v4l2_pix_format { |
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#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */ |
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#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */ |
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#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */ |
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#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */ |
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#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */ |
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#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */ |
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#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */ |
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#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 Multiplexed */ |
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#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 with start codes */ |
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#define V4L2_PIX_FMT_H264_NO_SC v4l2_fourcc('A', 'V', 'C', '1') /* H264 without start codes */ |
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#define V4L2_PIX_FMT_H264 v4l2_fourcc('H', '2', '6', '4') /* H264 */ |
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#define V4L2_PIX_FMT_H263 v4l2_fourcc('H', '2', '6', '3') /* H263 */ |
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#define V4L2_PIX_FMT_H263 v4l2_fourcc('H', '2', '6', '3') /* H263 */ |
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#define V4L2_PIX_FMT_MPEG12 v4l2_fourcc('M', 'P', '1', '2') /* MPEG-1/2 */ |
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#define V4L2_PIX_FMT_MPEG1 v4l2_fourcc('M', 'P', 'G', '1') /* MPEG-1 ES */ |
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#define V4L2_PIX_FMT_MPEG4 v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4 */ |
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#define V4L2_PIX_FMT_MPEG2 v4l2_fourcc('M', 'P', 'G', '2') /* MPEG-2 ES */ |
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#define V4L2_PIX_FMT_FIMV v4l2_fourcc('F', 'I', 'M', 'V') /* FIMV */ |
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#define V4L2_PIX_FMT_MPEG4 v4l2_fourcc('M', 'P', 'G', '4') /* MPEG-4 ES */ |
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#define V4L2_PIX_FMT_FIMV1 v4l2_fourcc('F', 'I', 'M', '1') /* FIMV1 */ |
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#define V4L2_PIX_FMT_FIMV2 v4l2_fourcc('F', 'I', 'M', '2') /* FIMV2 */ |
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#define V4L2_PIX_FMT_FIMV3 v4l2_fourcc('F', 'I', 'M', '3') /* FIMV3 */ |
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#define V4L2_PIX_FMT_FIMV4 v4l2_fourcc('F', 'I', 'M', '4') /* FIMV4 */ |
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#define V4L2_PIX_FMT_XVID v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid */ |
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#define V4L2_PIX_FMT_XVID v4l2_fourcc('X', 'V', 'I', 'D') /* Xvid */ |
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#define V4L2_PIX_FMT_VC1 v4l2_fourcc('V', 'C', '1', 'A') /* VC-1 */ |
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#define V4L2_PIX_FMT_VC1_ANNEX_G v4l2_fourcc('V', 'C', '1', 'G') /* SMPTE 421M Annex G compliant stream */ |
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#define V4L2_PIX_FMT_VC1_RCV v4l2_fourcc('V', 'C', '1', 'R') /* VC-1 RCV */ |
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#define V4L2_PIX_FMT_VC1_ANNEX_L v4l2_fourcc('V', 'C', '1', 'L') /* SMPTE 421M Annex L compliant stream */ |
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#define V4L2_PIX_FMT_VP8 v4l2_fourcc('V', 'P', '8', '0') /* VP8 */ |
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/* Vendor-specific formats */ |
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/* Vendor-specific formats */ |
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#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */ |
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#define V4L2_PIX_FMT_CPIA1 v4l2_fourcc('C', 'P', 'I', 'A') /* cpia1 YUV */ |
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@ -411,6 +404,7 @@ struct v4l2_pix_format { |
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#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ |
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#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ |
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#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ |
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#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ |
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#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */ |
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#define V4L2_PIX_FMT_MR97310A v4l2_fourcc('M', '3', '1', '0') /* compressed BGGR bayer */ |
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#define V4L2_PIX_FMT_JL2005BCD v4l2_fourcc('J', 'L', '2', '0') /* compressed RGGB bayer */ |
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#define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X') /* compressed GBRG bayer */ |
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#define V4L2_PIX_FMT_SN9C2028 v4l2_fourcc('S', 'O', 'N', 'X') /* compressed GBRG bayer */ |
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#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */ |
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#define V4L2_PIX_FMT_SQ905C v4l2_fourcc('9', '0', '5', 'C') /* compressed RGGB bayer */ |
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#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */ |
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#define V4L2_PIX_FMT_PJPG v4l2_fourcc('P', 'J', 'P', 'G') /* Pixart 73xx JPEG */ |
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@ -421,14 +415,10 @@ struct v4l2_pix_format { |
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#define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */ |
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#define V4L2_PIX_FMT_CIT_YYVYUY v4l2_fourcc('C', 'I', 'T', 'V') /* one line of Y then 1 line of VYUY */ |
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#define V4L2_PIX_FMT_KONICA420 v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */ |
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#define V4L2_PIX_FMT_KONICA420 v4l2_fourcc('K', 'O', 'N', 'I') /* YUV420 planar in blocks of 256 pixels */ |
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#define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */ |
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#define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L') /* JPEG-Lite */ |
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/* RGB x:10:10:10 */ |
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#define V4L2_PIX_FMT_INTC_RGB30 v4l2_fourcc('R', 'G', 'B', '0') |
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#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */ |
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#define V4L2_PIX_FMT_JPEG_444 v4l2_fourcc('J', 'P', 'G', '4') /* yuv444 of JFIF JPEG */ |
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#define V4L2_PIX_FMT_JPEG_422 v4l2_fourcc('J', 'P', 'G', '2') /* yuv422 of JFIF JPEG */ |
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#define V4L2_PIX_FMT_JPEG_420 v4l2_fourcc('J', 'P', 'G', '0') /* yuv420 of JFIF JPEG */ |
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#define V4L2_PIX_FMT_JPEG_GRAY v4l2_fourcc('J', 'P', 'G', 'G') /* grey of JFIF JPEG */ |
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#define V4L2_PIX_FMT_YUV444_2P v4l2_fourcc('Y', 'U', '2', 'P') /* 16 xxxxyyyy uuuuvvvv */ |
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#define V4L2_PIX_FMT_YVU444_2P v4l2_fourcc('Y', 'V', '2', 'P') /* 16 xxxxyyyy uuuuvvvv */ |
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#define V4L2_PIX_FMT_YUV444_3P v4l2_fourcc('Y', 'U', '3', 'P') /* 16 xxxxyyyy uuuuvvvv */ |
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/*
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/*
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* F O R M A T E N U M E R A T I O N |
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* F O R M A T E N U M E R A T I O N |
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*/ |
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*/ |
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@ -590,6 +580,8 @@ struct v4l2_requestbuffers { |
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* should be passed to mmap() called on the video node) |
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* should be passed to mmap() called on the video node) |
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* @userptr: when memory is V4L2_MEMORY_USERPTR, a userspace pointer |
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* @userptr: when memory is V4L2_MEMORY_USERPTR, a userspace pointer |
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* pointing to this plane |
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* pointing to this plane |
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* @fd: when memory is V4L2_MEMORY_DMABUF, a userspace file |
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* descriptor associated with this plane |
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* @data_offset: offset in the plane to the start of data; usually 0, |
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* @data_offset: offset in the plane to the start of data; usually 0, |
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* unless there is a header in front of the data |
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* unless there is a header in front of the data |
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* |
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* |
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@ -604,11 +596,10 @@ struct v4l2_plane { |
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union { |
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union { |
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__u32 mem_offset; |
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__u32 mem_offset; |
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unsigned long userptr; |
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unsigned long userptr; |
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int fd; |
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} m; |
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} m; |
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__u32 data_offset; |
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__u32 data_offset; |
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void *cookie; |
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__u32 reserved[11]; |
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void *share; |
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__u32 reserved[9]; |
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}; |
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}; |
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/**
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/**
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@ -628,6 +619,9 @@ struct v4l2_plane { |
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* (or a "cookie" that should be passed to mmap() as offset) |
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* (or a "cookie" that should be passed to mmap() as offset) |
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* @userptr: for non-multiplanar buffers with memory == V4L2_MEMORY_USERPTR; |
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* @userptr: for non-multiplanar buffers with memory == V4L2_MEMORY_USERPTR; |
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* a userspace pointer pointing to this buffer |
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* a userspace pointer pointing to this buffer |
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* @fd: for non-multiplanar buffers with |
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* memory == V4L2_MEMORY_DMABUF; a userspace file descriptor |
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* associated with this buffer |
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* @planes: for multiplanar buffers; userspace pointer to the array of plane |
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* @planes: for multiplanar buffers; userspace pointer to the array of plane |
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* info structs for this buffer |
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* info structs for this buffer |
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* @length: size in bytes of the buffer (NOT its payload) for single-plane |
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* @length: size in bytes of the buffer (NOT its payload) for single-plane |
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@ -654,6 +648,7 @@ struct v4l2_buffer { |
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__u32 offset; |
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__u32 offset; |
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unsigned long userptr; |
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unsigned long userptr; |
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struct v4l2_plane *planes; |
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struct v4l2_plane *planes; |
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int fd; |
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} m; |
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} m; |
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__u32 length; |
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__u32 length; |
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__u32 input; |
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__u32 input; |
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@ -671,6 +666,10 @@ struct v4l2_buffer { |
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#define V4L2_BUF_FLAG_ERROR 0x0040 |
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#define V4L2_BUF_FLAG_ERROR 0x0040 |
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#define V4L2_BUF_FLAG_TIMECODE 0x0100 /* timecode field is valid */ |
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#define V4L2_BUF_FLAG_TIMECODE 0x0100 /* timecode field is valid */ |
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#define V4L2_BUF_FLAG_INPUT 0x0200 /* input field is valid */ |
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#define V4L2_BUF_FLAG_INPUT 0x0200 /* input field is valid */ |
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#define V4L2_BUF_FLAG_PREPARED 0x0400 /* Buffer is prepared for queuing */ |
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/* Cache handling flags */ |
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#define V4L2_BUF_FLAG_NO_CACHE_INVALIDATE 0x0800 |
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#define V4L2_BUF_FLAG_NO_CACHE_CLEAN 0x1000 |
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/*
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/*
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* O V E R L A Y P R E V I E W |
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* O V E R L A Y P R E V I E W |
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@ -756,6 +755,48 @@ struct v4l2_crop { |
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struct v4l2_rect c; |
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struct v4l2_rect c; |
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}; |
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}; |
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/* Hints for adjustments of selection rectangle */ |
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#define V4L2_SEL_FLAG_GE 0x00000001 |
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#define V4L2_SEL_FLAG_LE 0x00000002 |
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/* Selection targets */ |
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/* current cropping area */ |
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#define V4L2_SEL_TGT_CROP_ACTIVE 0 |
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/* default cropping area */ |
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#define V4L2_SEL_TGT_CROP_DEFAULT 1 |
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/* cropping bounds */ |
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#define V4L2_SEL_TGT_CROP_BOUNDS 2 |
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/* current composing area */ |
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#define V4L2_SEL_TGT_COMPOSE_ACTIVE 256 |
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/* default composing area */ |
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#define V4L2_SEL_TGT_COMPOSE_DEFAULT 257 |
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/* composing bounds */ |
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#define V4L2_SEL_TGT_COMPOSE_BOUNDS 258 |
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/* current composing area plus all padding pixels */ |
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#define V4L2_SEL_TGT_COMPOSE_PADDED 259 |
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/**
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* struct v4l2_selection - selection info |
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* @type: buffer type (do not use *_MPLANE types) |
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* @target: selection target, used to choose one of possible rectangles |
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* @flags: constraints flags |
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* @r: coordinates of selection window |
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* @reserved: for future use, rounds structure size to 64 bytes, set to zero |
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* |
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* Hardware may use multiple helper window to process a video stream. |
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* The structure is used to exchange this selection areas between |
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* an application and a driver. |
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*/ |
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struct v4l2_selection { |
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__u32 type; |
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__u32 target; |
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__u32 flags; |
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struct v4l2_rect r; |
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__u32 reserved[9]; |
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}; |
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/*
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/*
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* A N A L O G V I D E O S T A N D A R D |
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* A N A L O G V I D E O S T A N D A R D |
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*/ |
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*/ |
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@ -777,10 +818,10 @@ typedef __u64 v4l2_std_id; |
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#define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400) |
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#define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400) |
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#define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800) |
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#define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800) |
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#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) |
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#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) /* BTSC */ |
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#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) |
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#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) /* EIA-J */ |
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#define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000) |
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#define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000) |
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#define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000) |
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#define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000) /* FM A2 */ |
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#define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000) |
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#define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000) |
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#define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000) |
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#define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000) |
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@ -804,47 +845,86 @@ typedef __u64 v4l2_std_id; |
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v4l2-common.c should be fixed. |
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v4l2-common.c should be fixed. |
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*/ |
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*/ |
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/* some merged standards */ |
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/*
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#define V4L2_STD_MN (V4L2_STD_PAL_M|V4L2_STD_PAL_N|V4L2_STD_PAL_Nc|V4L2_STD_NTSC) |
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* Some macros to merge video standards in order to make live easier for the |
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#define V4L2_STD_B (V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_SECAM_B) |
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* drivers and V4L2 applications |
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#define V4L2_STD_GH (V4L2_STD_PAL_G|V4L2_STD_PAL_H|V4L2_STD_SECAM_G|V4L2_STD_SECAM_H) |
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*/ |
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#define V4L2_STD_DK (V4L2_STD_PAL_DK|V4L2_STD_SECAM_DK) |
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/* some common needed stuff */ |
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/*
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#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\ |
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* "Common" NTSC/M - It should be noticed that V4L2_STD_NTSC_443 is |
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V4L2_STD_PAL_B1 |\
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* Missing here. |
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V4L2_STD_PAL_G) |
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*/ |
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#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\ |
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V4L2_STD_PAL_D1 |\
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V4L2_STD_PAL_K) |
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#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\ |
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V4L2_STD_PAL_DK |\
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V4L2_STD_PAL_H |\
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V4L2_STD_PAL_I) |
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#define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\ |
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#define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\ |
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V4L2_STD_NTSC_M_JP |\
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V4L2_STD_NTSC_M_JP |\
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V4L2_STD_NTSC_M_KR) |
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V4L2_STD_NTSC_M_KR) |
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/* Secam macros */ |
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#define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D |\ |
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#define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D |\ |
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V4L2_STD_SECAM_K |\
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V4L2_STD_SECAM_K |\
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V4L2_STD_SECAM_K1) |
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V4L2_STD_SECAM_K1) |
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/* All Secam Standards */ |
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#define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\ |
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#define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\ |
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V4L2_STD_SECAM_G |\
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V4L2_STD_SECAM_G |\
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V4L2_STD_SECAM_H |\
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V4L2_STD_SECAM_H |\
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V4L2_STD_SECAM_DK |\
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V4L2_STD_SECAM_DK |\
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V4L2_STD_SECAM_L |\
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V4L2_STD_SECAM_L |\
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V4L2_STD_SECAM_LC) |
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V4L2_STD_SECAM_LC) |
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/* PAL macros */ |
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#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\ |
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V4L2_STD_PAL_B1 |\
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V4L2_STD_PAL_G) |
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#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\ |
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V4L2_STD_PAL_D1 |\
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V4L2_STD_PAL_K) |
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/*
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* "Common" PAL - This macro is there to be compatible with the old |
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* V4L1 concept of "PAL": /BGDKHI. |
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* Several PAL standards are mising here: /M, /N and /Nc |
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*/ |
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#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\ |
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V4L2_STD_PAL_DK |\
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V4L2_STD_PAL_H |\
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V4L2_STD_PAL_I) |
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/* Chroma "agnostic" standards */ |
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#define V4L2_STD_B (V4L2_STD_PAL_B |\ |
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V4L2_STD_PAL_B1 |\
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V4L2_STD_SECAM_B) |
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#define V4L2_STD_G (V4L2_STD_PAL_G |\ |
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V4L2_STD_SECAM_G) |
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#define V4L2_STD_H (V4L2_STD_PAL_H |\ |
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V4L2_STD_SECAM_H) |
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#define V4L2_STD_L (V4L2_STD_SECAM_L |\ |
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V4L2_STD_SECAM_LC) |
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#define V4L2_STD_GH (V4L2_STD_G |\ |
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V4L2_STD_H) |
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#define V4L2_STD_DK (V4L2_STD_PAL_DK |\ |
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V4L2_STD_SECAM_DK) |
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#define V4L2_STD_BG (V4L2_STD_B |\ |
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V4L2_STD_G) |
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#define V4L2_STD_MN (V4L2_STD_PAL_M |\ |
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V4L2_STD_PAL_N |\
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V4L2_STD_PAL_Nc |\
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V4L2_STD_NTSC) |
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/* Standards where MTS/BTSC stereo could be found */ |
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#define V4L2_STD_MTS (V4L2_STD_NTSC_M |\ |
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V4L2_STD_PAL_M |\
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V4L2_STD_PAL_N |\
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V4L2_STD_PAL_Nc) |
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/* Standards for Countries with 60Hz Line frequency */ |
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#define V4L2_STD_525_60 (V4L2_STD_PAL_M |\ |
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#define V4L2_STD_525_60 (V4L2_STD_PAL_M |\ |
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V4L2_STD_PAL_60 |\
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V4L2_STD_PAL_60 |\
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V4L2_STD_NTSC |\
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V4L2_STD_NTSC |\
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V4L2_STD_NTSC_443) |
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V4L2_STD_NTSC_443) |
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/* Standards for Countries with 50Hz Line frequency */ |
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|
#define V4L2_STD_625_50 (V4L2_STD_PAL |\ |
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#define V4L2_STD_625_50 (V4L2_STD_PAL |\ |
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V4L2_STD_PAL_N |\
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V4L2_STD_PAL_N |\
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V4L2_STD_PAL_Nc |\
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V4L2_STD_PAL_Nc |\
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V4L2_STD_SECAM) |
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V4L2_STD_SECAM) |
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#define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB |\ |
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#define V4L2_STD_ATSC (V4L2_STD_ATSC_8_VSB |\ |
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V4L2_STD_ATSC_16_VSB) |
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V4L2_STD_ATSC_16_VSB) |
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/* Macros with none and all analog standards */ |
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|
#define V4L2_STD_UNKNOWN 0 |
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|
#define V4L2_STD_UNKNOWN 0 |
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|
#define V4L2_STD_ALL (V4L2_STD_525_60 |\ |
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#define V4L2_STD_ALL (V4L2_STD_525_60 |\ |
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V4L2_STD_625_50) |
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V4L2_STD_625_50) |
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|
@ -1082,7 +1162,8 @@ struct v4l2_ext_controls { |
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#define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */ |
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#define V4L2_CTRL_CLASS_MPEG 0x00990000 /* MPEG-compression controls */ |
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#define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */ |
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#define V4L2_CTRL_CLASS_CAMERA 0x009a0000 /* Camera class controls */ |
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#define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator control class */ |
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#define V4L2_CTRL_CLASS_FM_TX 0x009b0000 /* FM Modulator control class */ |
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#define V4L2_CTRL_CLASS_CODEC 0x009c0000 /* Codec control class */ |
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#define V4L2_CTRL_CLASS_FLASH 0x009c0000 /* Camera flash controls */ |
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#define V4L2_CTRL_CLASS_FM_RX 0x009d0000 /* FM Tuner control class */ |
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#define V4L2_CTRL_ID_MASK (0x0fffffff) |
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#define V4L2_CTRL_ID_MASK (0x0fffffff) |
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|
#define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL) |
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|
#define V4L2_CTRL_ID2CLASS(id) ((id) & 0x0fff0000UL) |
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|
@ -1096,6 +1177,7 @@ enum v4l2_ctrl_type { |
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|
V4L2_CTRL_TYPE_INTEGER64 = 5, |
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|
V4L2_CTRL_TYPE_INTEGER64 = 5, |
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|
V4L2_CTRL_TYPE_CTRL_CLASS = 6, |
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|
V4L2_CTRL_TYPE_CTRL_CLASS = 6, |
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|
V4L2_CTRL_TYPE_STRING = 7, |
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V4L2_CTRL_TYPE_STRING = 7, |
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|
V4L2_CTRL_TYPE_BITMASK = 8, |
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}; |
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}; |
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|
/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ |
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|
|
/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ |
|
|
@ -1127,11 +1209,13 @@ struct v4l2_querymenu { |
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|
#define V4L2_CTRL_FLAG_INACTIVE 0x0010 |
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|
#define V4L2_CTRL_FLAG_INACTIVE 0x0010 |
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|
#define V4L2_CTRL_FLAG_SLIDER 0x0020 |
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|
#define V4L2_CTRL_FLAG_SLIDER 0x0020 |
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|
#define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040 |
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|
#define V4L2_CTRL_FLAG_WRITE_ONLY 0x0040 |
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|
#define V4L2_CTRL_FLAG_VOLATILE 0x0080 |
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|
|
/* Query flag, to be ORed with the control ID */ |
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|
|
/* Query flag, to be ORed with the control ID */ |
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|
|
#define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 |
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|
#define V4L2_CTRL_FLAG_NEXT_CTRL 0x80000000 |
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|
|
/* User-class control IDs defined by V4L2 */ |
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|
|
/* User-class control IDs defined by V4L2 */ |
|
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|
|
#define V4L2_CID_MAX_CTRLS 1024 |
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|
#define V4L2_CID_BASE (V4L2_CTRL_CLASS_USER | 0x900) |
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|
#define V4L2_CID_BASE (V4L2_CTRL_CLASS_USER | 0x900) |
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|
|
#define V4L2_CID_USER_BASE V4L2_CID_BASE |
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|
|
#define V4L2_CID_USER_BASE V4L2_CID_BASE |
|
|
|
/* IDs reserved for driver specific controls */ |
|
|
|
/* IDs reserved for driver specific controls */ |
|
|
@ -1170,6 +1254,7 @@ enum v4l2_power_line_frequency { |
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|
V4L2_CID_POWER_LINE_FREQUENCY_DISABLED = 0, |
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|
V4L2_CID_POWER_LINE_FREQUENCY_DISABLED = 0, |
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|
V4L2_CID_POWER_LINE_FREQUENCY_50HZ = 1, |
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|
V4L2_CID_POWER_LINE_FREQUENCY_50HZ = 1, |
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|
V4L2_CID_POWER_LINE_FREQUENCY_60HZ = 2, |
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|
V4L2_CID_POWER_LINE_FREQUENCY_60HZ = 2, |
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|
V4L2_CID_POWER_LINE_FREQUENCY_AUTO = 3, |
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|
}; |
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|
}; |
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|
|
#define V4L2_CID_HUE_AUTO (V4L2_CID_BASE+25) |
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|
|
#define V4L2_CID_HUE_AUTO (V4L2_CID_BASE+25) |
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|
|
#define V4L2_CID_WHITE_BALANCE_TEMPERATURE (V4L2_CID_BASE+26) |
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|
|
#define V4L2_CID_WHITE_BALANCE_TEMPERATURE (V4L2_CID_BASE+26) |
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@ -1201,37 +1286,19 @@ enum v4l2_colorfx { |
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#define V4L2_CID_ILLUMINATORS_1 (V4L2_CID_BASE+37) |
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#define V4L2_CID_ILLUMINATORS_1 (V4L2_CID_BASE+37) |
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#define V4L2_CID_ILLUMINATORS_2 (V4L2_CID_BASE+38) |
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#define V4L2_CID_ILLUMINATORS_2 (V4L2_CID_BASE+38) |
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/*
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#define V4L2_CID_MIN_BUFFERS_FOR_CAPTURE (V4L2_CID_BASE+39) |
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* This is custom CID |
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#define V4L2_CID_MIN_BUFFERS_FOR_OUTPUT (V4L2_CID_BASE+40) |
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*/ |
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/* for rgb alpha function */ |
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#define V4L2_CID_GLOBAL_ALPHA (V4L2_CID_BASE+39) |
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/* cacheable configuration */ |
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#define V4L2_CID_ALPHA_COMPONENT (V4L2_CID_BASE+41) |
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#define V4L2_CID_CACHEABLE (V4L2_CID_BASE+40) |
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/* jpeg captured size */ |
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#define V4L2_CID_CAM_JPEG_MEMSIZE (V4L2_CID_BASE+41) |
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#define V4L2_CID_CAM_JPEG_ENCODEDSIZE (V4L2_CID_BASE+42) |
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#define V4L2_CID_SET_SHAREABLE (V4L2_CID_BASE+43) |
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/* TV configuration */ |
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#define V4L2_CID_TV_LAYER_BLEND_ENABLE (V4L2_CID_BASE+44) |
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#define V4L2_CID_TV_LAYER_BLEND_ALPHA (V4L2_CID_BASE+45) |
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#define V4L2_CID_TV_PIXEL_BLEND_ENABLE (V4L2_CID_BASE+46) |
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#define V4L2_CID_TV_CHROMA_ENABLE (V4L2_CID_BASE+47) |
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#define V4L2_CID_TV_CHROMA_VALUE (V4L2_CID_BASE+48) |
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#define V4L2_CID_TV_HPD_STATUS (V4L2_CID_BASE+49) |
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/* last CID + 1 */ |
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/* last CID + 1 */ |
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#define V4L2_CID_LASTP1 (V4L2_CID_BASE+50) |
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#define V4L2_CID_LASTP1 (V4L2_CID_BASE+42) |
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/* MPEG-class control IDs defined by V4L2 */ |
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/* MPEG-class control IDs defined by V4L2 */ |
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#define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) |
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#define V4L2_CID_MPEG_BASE (V4L2_CTRL_CLASS_MPEG | 0x900) |
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#define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1) |
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#define V4L2_CID_MPEG_CLASS (V4L2_CTRL_CLASS_MPEG | 1) |
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/* MPEG streams */ |
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/* MPEG streams, specific to multiplexed streams */ |
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#define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_MPEG_BASE+0) |
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#define V4L2_CID_MPEG_STREAM_TYPE (V4L2_CID_MPEG_BASE+0) |
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enum v4l2_mpeg_stream_type { |
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enum v4l2_mpeg_stream_type { |
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V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */ |
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V4L2_MPEG_STREAM_TYPE_MPEG2_PS = 0, /* MPEG-2 program stream */ |
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@ -1253,7 +1320,7 @@ enum v4l2_mpeg_stream_vbi_fmt { |
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V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */ |
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V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1, /* VBI in private packets, IVTV format */ |
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}; |
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}; |
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/* MPEG audio */ |
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/* MPEG audio controls specific to multiplexed streams */ |
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#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_MPEG_BASE+100) |
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#define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ (V4L2_CID_MPEG_BASE+100) |
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enum v4l2_mpeg_audio_sampling_freq { |
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enum v4l2_mpeg_audio_sampling_freq { |
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V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0, |
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V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100 = 0, |
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@ -1369,7 +1436,7 @@ enum v4l2_mpeg_audio_ac3_bitrate { |
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V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18, |
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V4L2_MPEG_AUDIO_AC3_BITRATE_640K = 18, |
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}; |
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}; |
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/* MPEG video */ |
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/* MPEG video controls specific to multiplexed streams */ |
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#define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_MPEG_BASE+200) |
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#define V4L2_CID_MPEG_VIDEO_ENCODING (V4L2_CID_MPEG_BASE+200) |
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enum v4l2_mpeg_video_encoding { |
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enum v4l2_mpeg_video_encoding { |
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V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0, |
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V4L2_MPEG_VIDEO_ENCODING_MPEG_1 = 0, |
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@ -1397,6 +1464,141 @@ enum v4l2_mpeg_video_bitrate_mode { |
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#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209) |
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#define V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION (V4L2_CID_MPEG_BASE+209) |
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#define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_MPEG_BASE+210) |
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#define V4L2_CID_MPEG_VIDEO_MUTE (V4L2_CID_MPEG_BASE+210) |
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#define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_MPEG_BASE+211) |
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#define V4L2_CID_MPEG_VIDEO_MUTE_YUV (V4L2_CID_MPEG_BASE+211) |
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#define V4L2_CID_MPEG_VIDEO_DECODER_SLICE_INTERFACE (V4L2_CID_MPEG_BASE+212) |
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#define V4L2_CID_MPEG_VIDEO_DECODER_MPEG4_DEBLOCK_FILTER (V4L2_CID_MPEG_BASE+213) |
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#define V4L2_CID_MPEG_VIDEO_CYCLIC_INTRA_REFRESH_MB (V4L2_CID_MPEG_BASE+214) |
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#define V4L2_CID_MPEG_VIDEO_FRAME_RC_ENABLE (V4L2_CID_MPEG_BASE+215) |
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#define V4L2_CID_MPEG_VIDEO_HEADER_MODE (V4L2_CID_MPEG_BASE+216) |
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enum v4l2_mpeg_video_header_mode { |
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V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE = 0, |
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V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME = 1, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_MAX_REF_PIC (V4L2_CID_MPEG_BASE+217) |
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#define V4L2_CID_MPEG_VIDEO_MB_RC_ENABLE (V4L2_CID_MPEG_BASE+218) |
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#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES (V4L2_CID_MPEG_BASE+219) |
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#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB (V4L2_CID_MPEG_BASE+220) |
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#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE (V4L2_CID_MPEG_BASE+221) |
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enum v4l2_mpeg_video_multi_slice_mode { |
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V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE = 0, |
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V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB = 1, |
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V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES = 2, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_VBV_SIZE (V4L2_CID_MPEG_BASE+222) |
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#define V4L2_CID_MPEG_VIDEO_H263_I_FRAME_QP (V4L2_CID_MPEG_BASE+300) |
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#define V4L2_CID_MPEG_VIDEO_H263_P_FRAME_QP (V4L2_CID_MPEG_BASE+301) |
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#define V4L2_CID_MPEG_VIDEO_H263_B_FRAME_QP (V4L2_CID_MPEG_BASE+302) |
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#define V4L2_CID_MPEG_VIDEO_H263_MIN_QP (V4L2_CID_MPEG_BASE+303) |
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#define V4L2_CID_MPEG_VIDEO_H263_MAX_QP (V4L2_CID_MPEG_BASE+304) |
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#define V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP (V4L2_CID_MPEG_BASE+350) |
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#define V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP (V4L2_CID_MPEG_BASE+351) |
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#define V4L2_CID_MPEG_VIDEO_H264_B_FRAME_QP (V4L2_CID_MPEG_BASE+352) |
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#define V4L2_CID_MPEG_VIDEO_H264_MIN_QP (V4L2_CID_MPEG_BASE+353) |
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#define V4L2_CID_MPEG_VIDEO_H264_MAX_QP (V4L2_CID_MPEG_BASE+354) |
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#define V4L2_CID_MPEG_VIDEO_H264_8X8_TRANSFORM (V4L2_CID_MPEG_BASE+355) |
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#define V4L2_CID_MPEG_VIDEO_H264_CPB_SIZE (V4L2_CID_MPEG_BASE+356) |
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#define V4L2_CID_MPEG_VIDEO_H264_ENTROPY_MODE (V4L2_CID_MPEG_BASE+357) |
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enum v4l2_mpeg_video_h264_entropy_mode { |
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V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC = 0, |
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V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC = 1, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_H264_I_PERIOD (V4L2_CID_MPEG_BASE+358) |
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#define V4L2_CID_MPEG_VIDEO_H264_LEVEL (V4L2_CID_MPEG_BASE+359) |
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enum v4l2_mpeg_video_h264_level { |
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V4L2_MPEG_VIDEO_H264_LEVEL_1_0 = 0, |
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V4L2_MPEG_VIDEO_H264_LEVEL_1B = 1, |
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V4L2_MPEG_VIDEO_H264_LEVEL_1_1 = 2, |
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V4L2_MPEG_VIDEO_H264_LEVEL_1_2 = 3, |
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V4L2_MPEG_VIDEO_H264_LEVEL_1_3 = 4, |
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V4L2_MPEG_VIDEO_H264_LEVEL_2_0 = 5, |
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V4L2_MPEG_VIDEO_H264_LEVEL_2_1 = 6, |
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V4L2_MPEG_VIDEO_H264_LEVEL_2_2 = 7, |
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V4L2_MPEG_VIDEO_H264_LEVEL_3_0 = 8, |
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V4L2_MPEG_VIDEO_H264_LEVEL_3_1 = 9, |
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V4L2_MPEG_VIDEO_H264_LEVEL_3_2 = 10, |
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V4L2_MPEG_VIDEO_H264_LEVEL_4_0 = 11, |
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V4L2_MPEG_VIDEO_H264_LEVEL_4_1 = 12, |
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V4L2_MPEG_VIDEO_H264_LEVEL_4_2 = 13, |
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V4L2_MPEG_VIDEO_H264_LEVEL_5_0 = 14, |
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V4L2_MPEG_VIDEO_H264_LEVEL_5_1 = 15, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_ALPHA (V4L2_CID_MPEG_BASE+360) |
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#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_BETA (V4L2_CID_MPEG_BASE+361) |
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#define V4L2_CID_MPEG_VIDEO_H264_LOOP_FILTER_MODE (V4L2_CID_MPEG_BASE+362) |
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enum v4l2_mpeg_video_h264_loop_filter_mode { |
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V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_ENABLED = 0, |
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V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED = 1, |
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V4L2_MPEG_VIDEO_H264_LOOP_FILTER_MODE_DISABLED_AT_SLICE_BOUNDARY = 2, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_H264_PROFILE (V4L2_CID_MPEG_BASE+363) |
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enum v4l2_mpeg_video_h264_profile { |
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V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE = 0, |
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V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE = 1, |
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V4L2_MPEG_VIDEO_H264_PROFILE_MAIN = 2, |
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V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED = 3, |
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V4L2_MPEG_VIDEO_H264_PROFILE_HIGH = 4, |
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V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10 = 5, |
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V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422 = 6, |
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V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_PREDICTIVE = 7, |
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V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_10_INTRA = 8, |
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V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_422_INTRA = 9, |
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V4L2_MPEG_VIDEO_H264_PROFILE_HIGH_444_INTRA = 10, |
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V4L2_MPEG_VIDEO_H264_PROFILE_CAVLC_444_INTRA = 11, |
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V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_BASELINE = 12, |
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V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH = 13, |
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V4L2_MPEG_VIDEO_H264_PROFILE_SCALABLE_HIGH_INTRA = 14, |
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V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH = 15, |
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V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH = 16, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_HEIGHT (V4L2_CID_MPEG_BASE+364) |
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#define V4L2_CID_MPEG_VIDEO_H264_VUI_EXT_SAR_WIDTH (V4L2_CID_MPEG_BASE+365) |
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#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_ENABLE (V4L2_CID_MPEG_BASE+366) |
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#define V4L2_CID_MPEG_VIDEO_H264_VUI_SAR_IDC (V4L2_CID_MPEG_BASE+367) |
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enum v4l2_mpeg_video_h264_vui_sar_idc { |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_UNSPECIFIED = 0, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_1x1 = 1, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_12x11 = 2, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_10x11 = 3, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_16x11 = 4, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_40x33 = 5, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_24x11 = 6, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_20x11 = 7, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_32x11 = 8, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_80x33 = 9, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_18x11 = 10, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_15x11 = 11, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_64x33 = 12, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_160x99 = 13, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_4x3 = 14, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_3x2 = 15, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_2x1 = 16, |
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V4L2_MPEG_VIDEO_H264_VUI_SAR_IDC_EXTENDED = 17, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP (V4L2_CID_MPEG_BASE+400) |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP (V4L2_CID_MPEG_BASE+401) |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_B_FRAME_QP (V4L2_CID_MPEG_BASE+402) |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_MIN_QP (V4L2_CID_MPEG_BASE+403) |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_MAX_QP (V4L2_CID_MPEG_BASE+404) |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL (V4L2_CID_MPEG_BASE+405) |
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enum v4l2_mpeg_video_mpeg4_level { |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_0 = 0, |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_0B = 1, |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_1 = 2, |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_2 = 3, |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_3 = 4, |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_3B = 5, |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_4 = 6, |
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V4L2_MPEG_VIDEO_MPEG4_LEVEL_5 = 7, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE (V4L2_CID_MPEG_BASE+406) |
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enum v4l2_mpeg_video_mpeg4_profile { |
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V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE = 0, |
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V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_SIMPLE = 1, |
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V4L2_MPEG_VIDEO_MPEG4_PROFILE_CORE = 2, |
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V4L2_MPEG_VIDEO_MPEG4_PROFILE_SIMPLE_SCALABLE = 3, |
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V4L2_MPEG_VIDEO_MPEG4_PROFILE_ADVANCED_CODING_EFFICIENCY = 4, |
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}; |
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#define V4L2_CID_MPEG_VIDEO_MPEG4_QPEL (V4L2_CID_MPEG_BASE+407) |
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/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ |
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/* MPEG-class control IDs specific to the CX2341x driver as defined by V4L2 */ |
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#define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) |
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#define V4L2_CID_MPEG_CX2341X_BASE (V4L2_CTRL_CLASS_MPEG | 0x1000) |
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@ -1439,202 +1641,32 @@ enum v4l2_mpeg_cx2341x_video_median_filter_type { |
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#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+10) |
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#define V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP (V4L2_CID_MPEG_CX2341X_BASE+10) |
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#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_MPEG_CX2341X_BASE+11) |
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#define V4L2_CID_MPEG_CX2341X_STREAM_INSERT_NAV_PACKETS (V4L2_CID_MPEG_CX2341X_BASE+11) |
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/* For codecs */ |
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/* MPEG-class control IDs specific to the Samsung MFC 5.1 driver as defined by V4L2 */ |
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#define V4L2_CID_MPEG_MFC51_BASE (V4L2_CTRL_CLASS_MPEG | 0x1100) |
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#define V4L2_CID_CODEC_BASE (V4L2_CTRL_CLASS_CODEC | 0x900) |
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#define V4L2_CID_CODEC_CLASS (V4L2_CTRL_CLASS_CODEC | 1) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY (V4L2_CID_MPEG_MFC51_BASE+0) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_DECODER_H264_DISPLAY_DELAY_ENABLE (V4L2_CID_MPEG_MFC51_BASE+1) |
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/* Codec class control IDs specific to the MFC5X driver */ |
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#define V4L2_CID_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE (V4L2_CID_MPEG_MFC51_BASE+2) |
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#define V4L2_CID_CODEC_MFC5X_BASE (V4L2_CTRL_CLASS_CODEC | 0x1000) |
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enum v4l2_mpeg_mfc51_video_frame_skip_mode { |
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V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_DISABLED = 0, |
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/* For both decoding and encoding */ |
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V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT = 1, |
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V4L2_MPEG_MFC51_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT = 2, |
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/* For decoding */ |
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}; |
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#define V4L2_CID_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE (V4L2_CID_MPEG_MFC51_BASE+3) |
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#define V4L2_CID_CODEC_LOOP_FILTER_MPEG4_ENABLE (V4L2_CID_CODEC_BASE + 110) |
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enum v4l2_mpeg_mfc51_video_force_frame_type { |
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#define V4L2_CID_CODEC_DISPLAY_DELAY (V4L2_CID_CODEC_BASE + 137) |
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V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_DISABLED = 0, |
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#define V4L2_CID_CODEC_REQ_NUM_BUFS (V4L2_CID_CODEC_BASE + 140) |
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V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_I_FRAME = 1, |
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#define V4L2_CID_CODEC_SLICE_INTERFACE (V4L2_CID_CODEC_BASE + 141) |
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V4L2_MPEG_MFC51_VIDEO_FORCE_FRAME_TYPE_NOT_CODED = 2, |
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#define V4L2_CID_CODEC_PACKED_PB (V4L2_CID_CODEC_BASE + 142) |
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}; |
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#define V4L2_CID_CODEC_FRAME_TAG (V4L2_CID_CODEC_BASE + 143) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING (V4L2_CID_MPEG_MFC51_BASE+4) |
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#define V4L2_CID_CODEC_CRC_ENABLE (V4L2_CID_CODEC_BASE + 144) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_PADDING_YUV (V4L2_CID_MPEG_MFC51_BASE+5) |
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#define V4L2_CID_CODEC_CRC_DATA_LUMA (V4L2_CID_CODEC_BASE + 145) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_RC_FIXED_TARGET_BIT (V4L2_CID_MPEG_MFC51_BASE+6) |
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#define V4L2_CID_CODEC_CRC_DATA_CHROMA (V4L2_CID_CODEC_BASE + 146) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_RC_REACTION_COEFF (V4L2_CID_MPEG_MFC51_BASE+7) |
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#define V4L2_CID_CODEC_CRC_DATA_LUMA_BOT (V4L2_CID_CODEC_BASE + 147) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_ACTIVITY (V4L2_CID_MPEG_MFC51_BASE+50) |
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#define V4L2_CID_CODEC_CRC_DATA_CHROMA_BOT (V4L2_CID_CODEC_BASE + 148) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_DARK (V4L2_CID_MPEG_MFC51_BASE+51) |
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#define V4L2_CID_CODEC_CRC_GENERATED (V4L2_CID_CODEC_BASE + 149) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_SMOOTH (V4L2_CID_MPEG_MFC51_BASE+52) |
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#define V4L2_CID_CODEC_FRAME_TYPE (V4L2_CID_CODEC_BASE + 154) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_H264_ADAPTIVE_RC_STATIC (V4L2_CID_MPEG_MFC51_BASE+53) |
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#define V4L2_CID_CODEC_CHECK_STATE (V4L2_CID_CODEC_BASE + 155) |
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#define V4L2_CID_MPEG_MFC51_VIDEO_H264_NUM_REF_PIC_FOR_P (V4L2_CID_MPEG_MFC51_BASE+54) |
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#define V4L2_CID_CODEC_DISPLAY_STATUS (V4L2_CID_CODEC_BASE + 156) |
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#define V4L2_CID_CODEC_FRAME_PACK_SEI_PARSE (V4L2_CID_CODEC_BASE + 157) |
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#define V4L2_CID_CODEC_FRAME_PACK_SEI_AVAIL (V4L2_CID_CODEC_BASE + 158) |
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#define V4L2_CID_CODEC_FRAME_PACK_ARRGMENT_ID (V4L2_CID_CODEC_BASE + 159) |
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#define V4L2_CID_CODEC_FRAME_PACK_SEI_INFO (V4L2_CID_CODEC_BASE + 160) |
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#define V4L2_CID_CODEC_FRAME_PACK_GRID_POS (V4L2_CID_CODEC_BASE + 161) |
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/* For encoding */ |
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#define V4L2_CID_CODEC_LOOP_FILTER_H264 (V4L2_CID_CODEC_BASE + 9) |
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enum v4l2_cid_codec_loop_filter_h264 { |
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V4L2_CID_CODEC_LOOP_FILTER_H264_ENABLE = 0, |
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V4L2_CID_CODEC_LOOP_FILTER_H264_DISABLE = 1, |
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V4L2_CID_CODEC_LOOP_FILTER_H264_DISABLE_AT_BOUNDARY = 2, |
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}; |
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#define V4L2_CID_CODEC_FRAME_INSERTION (V4L2_CID_CODEC_BASE + 10) |
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enum v4l2_cid_codec_frame_insertion { |
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V4L2_CID_CODEC_FRAME_INSERT_NONE = 0x0, |
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V4L2_CID_CODEC_FRAME_INSERT_I_FRAME = 0x1, |
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V4L2_CID_CODEC_FRAME_INSERT_NOT_CODED = 0x2, |
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}; |
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#define V4L2_CID_CODEC_ENCODED_LUMA_ADDR (V4L2_CID_CODEC_BASE + 11) |
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#define V4L2_CID_CODEC_ENCODED_CHROMA_ADDR (V4L2_CID_CODEC_BASE + 12) |
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#define V4L2_CID_CODEC_ENCODED_I_PERIOD_CH V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE |
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#define V4L2_CID_CODEC_ENCODED_FRAME_RATE_CH V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE |
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#define V4L2_CID_CODEC_ENCODED_BIT_RATE_CH V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE |
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#define V4L2_CID_CODEC_FRAME_PACK_SEI_GEN (V4L2_CID_CODEC_BASE + 13) |
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#define V4L2_CID_CODEC_FRAME_PACK_FRM0_FLAG (V4L2_CID_CODEC_BASE + 14) |
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enum v4l2_codec_mfc5x_enc_flag { |
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V4L2_CODEC_MFC5X_ENC_FLAG_DISABLE = 0, |
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V4L2_CODEC_MFC5X_ENC_FLAG_ENABLE = 1, |
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}; |
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#define V4L2_CID_CODEC_FRAME_PACK_ARRGMENT_TYPE (V4L2_CID_CODEC_BASE + 15) |
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enum v4l2_codec_mfc5x_enc_frame_pack_arrgment_type { |
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V4L2_CODEC_MFC5X_ENC_FRAME_PACK_SIDE_BY_SIDE = 0, |
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V4L2_CODEC_MFC5X_ENC_FRAME_PACK_TOP_AND_BOT = 1, |
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V4L2_CODEC_MFC5X_ENC_FRAME_PACK_TMP_INTER = 2, |
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}; |
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/* common */ |
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enum v4l2_codec_mfc5x_enc_switch { |
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V4L2_CODEC_MFC5X_ENC_SW_DISABLE = 0, |
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V4L2_CODEC_MFC5X_ENC_SW_ENABLE = 1, |
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}; |
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enum v4l2_codec_mfc5x_enc_switch_inv { |
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V4L2_CODEC_MFC5X_ENC_SW_INV_ENABLE = 0, |
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V4L2_CODEC_MFC5X_ENC_SW_INV_DISABLE = 1, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_GOP_SIZE (V4L2_CID_CODEC_MFC5X_BASE+300) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MODE (V4L2_CID_CODEC_MFC5X_BASE+301) |
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enum v4l2_codec_mfc5x_enc_multi_slice_mode { |
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V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_DISABLE = 0, |
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V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_MACROBLOCK_COUNT = 1, |
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V4L2_CODEC_MFC5X_ENC_MULTI_SLICE_MODE_BIT_COUNT = 3, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_MB (V4L2_CID_CODEC_MFC5X_BASE+302) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MULTI_SLICE_BIT (V4L2_CID_CODEC_MFC5X_BASE+303) |
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#define V4L2_CID_CODEC_MFC5X_ENC_INTRA_REFRESH_MB (V4L2_CID_CODEC_MFC5X_BASE+304) |
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#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CTRL_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+305) |
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#define V4L2_CID_CODEC_MFC5X_ENC_PAD_LUMA_VALUE (V4L2_CID_CODEC_MFC5X_BASE+306) |
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#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CB_VALUE (V4L2_CID_CODEC_MFC5X_BASE+307) |
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#define V4L2_CID_CODEC_MFC5X_ENC_PAD_CR_VALUE (V4L2_CID_CODEC_MFC5X_BASE+308) |
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#define V4L2_CID_CODEC_MFC5X_ENC_RC_FRAME_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+309) |
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#define V4L2_CID_CODEC_MFC5X_ENC_RC_BIT_RATE (V4L2_CID_CODEC_MFC5X_BASE+310) |
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#define V4L2_CID_CODEC_MFC5X_ENC_RC_REACTION_COEFF (V4L2_CID_CODEC_MFC5X_BASE+311) |
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#define V4L2_CID_CODEC_MFC5X_ENC_STREAM_SIZE (V4L2_CID_CODEC_MFC5X_BASE+312) |
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#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_COUNT (V4L2_CID_CODEC_MFC5X_BASE+313) |
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#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_TYPE (V4L2_CID_CODEC_MFC5X_BASE+314) |
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enum v4l2_codec_mfc5x_enc_frame_type { |
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V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_NOT_CODED = 0, |
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V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_I_FRAME = 1, |
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V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_P_FRAME = 2, |
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V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_B_FRAME = 3, |
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V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_SKIPPED = 4, |
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V4L2_CODEC_MFC5X_ENC_FRAME_TYPE_OTHERS = 5, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE (V4L2_CID_CODEC_MFC5X_BASE+315) |
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enum v4l2_codec_mfc5x_enc_force_frame_type { |
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V4L2_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE_I_FRAME = 1, |
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V4L2_CODEC_MFC5X_ENC_FORCE_FRAME_TYPE_NOT_CODED = 2, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_VBV_BUF_SIZE (V4L2_CID_CODEC_MFC5X_BASE+316) |
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#define V4L2_CID_CODEC_MFC5X_ENC_SEQ_HDR_MODE (V4L2_CID_CODEC_MFC5X_BASE+317) |
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enum v4l2_codec_mfc5x_enc_seq_hdr_mode { |
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V4L2_CODEC_MFC5X_ENC_SEQ_HDR_MODE_SEQ = 0, |
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V4L2_CODEC_MFC5X_ENC_SEQ_HDR_MODE_SEQ_FRAME = 1, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_SKIP_MODE (V4L2_CID_CODEC_MFC5X_BASE+318) |
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enum v4l2_codec_mfc5x_enc_frame_skip_mode { |
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V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_DISABLE = 0, |
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V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_LEVEL = 1, |
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V4L2_CODEC_MFC5X_ENC_FRAME_SKIP_MODE_VBV_BUF_SIZE = 2, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_RC_FIXED_TARGET_BIT (V4L2_CID_CODEC_MFC5X_BASE+319) |
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#define V4L2_CID_CODEC_MFC5X_ENC_FRAME_DELTA (V4L2_CID_CODEC_MFC5X_BASE+320) |
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/* codec specific */ |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_B_FRAMES (V4L2_CID_CODEC_MFC5X_BASE+400) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_PROFILE (V4L2_CID_CODEC_MFC5X_BASE+401) |
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enum v4l2_codec_mfc5x_enc_h264_profile { |
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V4L2_CODEC_MFC5X_ENC_H264_PROFILE_MAIN = 0, |
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V4L2_CODEC_MFC5X_ENC_H264_PROFILE_HIGH = 1, |
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V4L2_CODEC_MFC5X_ENC_H264_PROFILE_BASELINE = 2, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_LEVEL (V4L2_CID_CODEC_MFC5X_BASE+402) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_INTERLACE (V4L2_CID_CODEC_MFC5X_BASE+403) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_MODE (V4L2_CID_CODEC_MFC5X_BASE+404) |
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enum v4l2_codec_mfc5x_enc_h264_loop_filter { |
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V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ENABLE = 0, |
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V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_DISABLE = 1, |
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V4L2_CODEC_MFC5X_ENC_H264_LOOP_FILTER_DISABLE_AT_BOUNDARY = 2, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_ALPHA (V4L2_CID_CODEC_MFC5X_BASE+405) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_LOOP_FILTER_BETA (V4L2_CID_CODEC_MFC5X_BASE+406) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_ENTROPY_MODE (V4L2_CID_CODEC_MFC5X_BASE+407) |
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enum v4l2_codec_mfc5x_enc_h264_entropy_mode { |
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V4L2_CODEC_MFC5X_ENC_H264_ENTROPY_MODE_CAVLC = 0, |
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V4L2_CODEC_MFC5X_ENC_H264_ENTROPY_MODE_CABAC = 1, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_MAX_REF_PIC (V4L2_CID_CODEC_MFC5X_BASE+408) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_NUM_REF_PIC_4P (V4L2_CID_CODEC_MFC5X_BASE+409) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_8X8_TRANSFORM (V4L2_CID_CODEC_MFC5X_BASE+410) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+411) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_RATE (V4L2_CID_CODEC_MFC5X_BASE+412) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+413) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MIN_QP (V4L2_CID_CODEC_MFC5X_BASE+414) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MAX_QP (V4L2_CID_CODEC_MFC5X_BASE+415) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_DARK (V4L2_CID_CODEC_MFC5X_BASE+416) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_SMOOTH (V4L2_CID_CODEC_MFC5X_BASE+417) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_STATIC (V4L2_CID_CODEC_MFC5X_BASE+418) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_MB_ACTIVITY (V4L2_CID_CODEC_MFC5X_BASE+419) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_P_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+420) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_RC_B_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+421) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+422) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_AR_VUI_IDC (V4L2_CID_CODEC_MFC5X_BASE+423) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_WIDTH (V4L2_CID_CODEC_MFC5X_BASE+424) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_EXT_SAR_HEIGHT (V4L2_CID_CODEC_MFC5X_BASE+425) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_OPEN_GOP (V4L2_CID_CODEC_MFC5X_BASE+426) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_I_PERIOD (V4L2_CID_CODEC_MFC5X_BASE+427) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_HIER_P_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+428) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER0_QP (V4L2_CID_CODEC_MFC5X_BASE+429) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER1_QP (V4L2_CID_CODEC_MFC5X_BASE+430) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H264_LAYER2_QP (V4L2_CID_CODEC_MFC5X_BASE+431) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_B_FRAMES (V4L2_CID_CODEC_MFC5X_BASE+440) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_PROFILE (V4L2_CID_CODEC_MFC5X_BASE+441) |
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enum v4l2_codec_mfc5x_enc_mpeg4_profile { |
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V4L2_CODEC_MFC5X_ENC_MPEG4_PROFILE_SIMPLE = 0, |
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V4L2_CODEC_MFC5X_ENC_MPEG4_PROFILE_ADVANCED_SIMPLE = 1, |
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}; |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_LEVEL (V4L2_CID_CODEC_MFC5X_BASE+442) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+443) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MIN_QP (V4L2_CID_CODEC_MFC5X_BASE+444) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MAX_QP (V4L2_CID_CODEC_MFC5X_BASE+445) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_QUARTER_PIXEL (V4L2_CID_CODEC_MFC5X_BASE+446) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_P_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+447) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_B_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+448) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_TIME_RES (V4L2_CID_CODEC_MFC5X_BASE+449) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_VOP_FRM_DELTA (V4L2_CID_CODEC_MFC5X_BASE+450) |
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#define V4L2_CID_CODEC_MFC5X_ENC_MPEG4_RC_MB_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+451) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_RATE (V4L2_CID_CODEC_MFC5X_BASE+460) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+461) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MIN_QP (V4L2_CID_CODEC_MFC5X_BASE+462) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MAX_QP (V4L2_CID_CODEC_MFC5X_BASE+463) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_P_FRAME_QP (V4L2_CID_CODEC_MFC5X_BASE+464) |
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#define V4L2_CID_CODEC_MFC5X_ENC_H263_RC_MB_ENABLE (V4L2_CID_CODEC_MFC5X_BASE+465) |
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/* Camera class control IDs */ |
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/* Camera class control IDs */ |
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#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900) |
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#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900) |
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@ -1703,6 +1735,53 @@ enum v4l2_preemphasis { |
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}; |
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}; |
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#define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113) |
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#define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113) |
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#define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114) |
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#define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114) |
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/* FM Tuner class control IDs */ |
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#define V4L2_CID_FM_RX_CLASS_BASE (V4L2_CTRL_CLASS_FM_RX | 0x900) |
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#define V4L2_CID_FM_RX_CLASS (V4L2_CTRL_CLASS_FM_RX | 1) |
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#define V4L2_CID_TUNE_DEEMPHASIS (V4L2_CID_FM_RX_CLASS_BASE + 1) |
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enum v4l2_deemphasis { |
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V4L2_DEEMPHASIS_DISABLED = 0, |
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V4L2_DEEMPHASIS_50_uS = 1, |
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V4L2_DEEMPHASIS_75_uS = 2, |
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}; |
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/* Flash and privacy (indicator) light controls */ |
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#define V4L2_CID_FLASH_CLASS_BASE (V4L2_CTRL_CLASS_FLASH | 0x900) |
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#define V4L2_CID_FLASH_CLASS (V4L2_CTRL_CLASS_FLASH | 1) |
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#define V4L2_CID_FLASH_LED_MODE (V4L2_CID_FLASH_CLASS_BASE + 1) |
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enum v4l2_flash_led_mode { |
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V4L2_FLASH_LED_MODE_NONE, |
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V4L2_FLASH_LED_MODE_FLASH, |
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V4L2_FLASH_LED_MODE_TORCH, |
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}; |
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#define V4L2_CID_FLASH_STROBE_SOURCE (V4L2_CID_FLASH_CLASS_BASE + 2) |
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enum v4l2_flash_strobe_source { |
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V4L2_FLASH_STROBE_SOURCE_SOFTWARE, |
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V4L2_FLASH_STROBE_SOURCE_EXTERNAL, |
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}; |
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#define V4L2_CID_FLASH_STROBE (V4L2_CID_FLASH_CLASS_BASE + 3) |
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#define V4L2_CID_FLASH_STROBE_STOP (V4L2_CID_FLASH_CLASS_BASE + 4) |
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#define V4L2_CID_FLASH_STROBE_STATUS (V4L2_CID_FLASH_CLASS_BASE + 5) |
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#define V4L2_CID_FLASH_TIMEOUT (V4L2_CID_FLASH_CLASS_BASE + 6) |
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#define V4L2_CID_FLASH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 7) |
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#define V4L2_CID_FLASH_TORCH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 8) |
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#define V4L2_CID_FLASH_INDICATOR_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 9) |
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#define V4L2_CID_FLASH_FAULT (V4L2_CID_FLASH_CLASS_BASE + 10) |
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#define V4L2_FLASH_FAULT_OVER_VOLTAGE (1 << 0) |
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#define V4L2_FLASH_FAULT_TIMEOUT (1 << 1) |
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#define V4L2_FLASH_FAULT_OVER_TEMPERATURE (1 << 2) |
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#define V4L2_FLASH_FAULT_SHORT_CIRCUIT (1 << 3) |
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#define V4L2_FLASH_FAULT_OVER_CURRENT (1 << 4) |
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#define V4L2_FLASH_FAULT_INDICATOR (1 << 5) |
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#define V4L2_CID_FLASH_CHARGE (V4L2_CID_FLASH_CLASS_BASE + 11) |
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#define V4L2_CID_FLASH_READY (V4L2_CID_FLASH_CLASS_BASE + 12) |
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/*
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/*
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* T U N I N G |
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* T U N I N G |
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@ -2068,6 +2147,8 @@ struct v4l2_streamparm { |
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#define V4L2_EVENT_ALL 0 |
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#define V4L2_EVENT_ALL 0 |
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#define V4L2_EVENT_VSYNC 1 |
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#define V4L2_EVENT_VSYNC 1 |
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#define V4L2_EVENT_EOS 2 |
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#define V4L2_EVENT_EOS 2 |
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#define V4L2_EVENT_CTRL 3 |
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#define V4L2_EVENT_FRAME_SYNC 4 |
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#define V4L2_EVENT_PRIVATE_START 0x08000000 |
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#define V4L2_EVENT_PRIVATE_START 0x08000000 |
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/* Payload for V4L2_EVENT_VSYNC */ |
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/* Payload for V4L2_EVENT_VSYNC */ |
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@ -2076,21 +2157,51 @@ struct v4l2_event_vsync { |
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__u8 field; |
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__u8 field; |
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} __attribute__ ((packed)); |
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} __attribute__ ((packed)); |
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/* Payload for V4L2_EVENT_CTRL */ |
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#define V4L2_EVENT_CTRL_CH_VALUE (1 << 0) |
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#define V4L2_EVENT_CTRL_CH_FLAGS (1 << 1) |
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struct v4l2_event_ctrl { |
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__u32 changes; |
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__u32 type; |
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union { |
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__s32 value; |
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__s64 value64; |
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}; |
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__u32 flags; |
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__s32 minimum; |
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__s32 maximum; |
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__s32 step; |
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__s32 default_value; |
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}; |
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struct v4l2_event_frame_sync { |
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__u32 frame_sequence; |
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}; |
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struct v4l2_event { |
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struct v4l2_event { |
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__u32 type; |
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__u32 type; |
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union { |
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union { |
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struct v4l2_event_vsync vsync; |
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struct v4l2_event_vsync vsync; |
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struct v4l2_event_ctrl ctrl; |
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struct v4l2_event_frame_sync frame_sync; |
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__u8 data[64]; |
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__u8 data[64]; |
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} u; |
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} u; |
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__u32 pending; |
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__u32 pending; |
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__u32 sequence; |
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__u32 sequence; |
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struct timespec timestamp; |
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struct timespec timestamp; |
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__u32 reserved[9]; |
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__u32 id; |
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__u32 reserved[8]; |
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}; |
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}; |
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#define V4L2_EVENT_SUB_FL_SEND_INITIAL (1 << 0) |
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#define V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK (1 << 1) |
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struct v4l2_event_subscription { |
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struct v4l2_event_subscription { |
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__u32 type; |
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__u32 type; |
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__u32 reserved[7]; |
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__u32 id; |
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__u32 flags; |
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__u32 reserved[5]; |
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}; |
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}; |
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/*
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/*
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@ -2129,6 +2240,23 @@ struct v4l2_dbg_chip_ident { |
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__u32 revision; /* chip revision, chip specific */ |
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__u32 revision; /* chip revision, chip specific */ |
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} __attribute__ ((packed)); |
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} __attribute__ ((packed)); |
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/**
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* struct v4l2_create_buffers - VIDIOC_CREATE_BUFS argument |
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* @index: on return, index of the first created buffer |
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* @count: entry: number of requested buffers, |
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* return: number of created buffers |
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* @memory: buffer memory type |
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* @format: frame format, for which buffers are requested |
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* @reserved: future extensions |
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*/ |
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struct v4l2_create_buffers { |
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__u32 index; |
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__u32 count; |
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enum v4l2_memory memory; |
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struct v4l2_format format; |
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__u32 reserved[8]; |
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}; |
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/*
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/*
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* I O C T L C O D E S F O R V I D E O D E V I C E S |
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* I O C T L C O D E S F O R V I D E O D E V I C E S |
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* |
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* |
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@ -2219,6 +2347,15 @@ struct v4l2_dbg_chip_ident { |
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#define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct v4l2_event_subscription) |
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#define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct v4l2_event_subscription) |
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#define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription) |
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#define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription) |
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/* Experimental, the below two ioctls may change over the next couple of kernel
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versions */ |
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#define VIDIOC_CREATE_BUFS _IOWR('V', 92, struct v4l2_create_buffers) |
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#define VIDIOC_PREPARE_BUF _IOWR('V', 93, struct v4l2_buffer) |
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/* Experimental selection API */ |
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#define VIDIOC_G_SELECTION _IOWR('V', 94, struct v4l2_selection) |
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#define VIDIOC_S_SELECTION _IOWR('V', 95, struct v4l2_selection) |
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/* Reminder: when adding new ioctls please add support for them to
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/* Reminder: when adding new ioctls please add support for them to
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drivers/media/video/v4l2-compat-ioctl32.c as well! */ |
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drivers/media/video/v4l2-compat-ioctl32.c as well! */ |
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