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Catalin Marinas 85d6943af5 Fix the VFP handling on the Feroceon CPU ... This CPU generates synchronous VFP exceptions in a non-standard way - the FPEXC.EX bit set but without the FPSCR.IXE bit being set like in the VFP subarchitecture 1 or just the FPEXC.DEX bit like in VFP subarchitecture 2. The main problem is that the faulty instruction (which needs to be emulated in software) will be restarted several times (normally until a context switch disables the VFP). This patch ensures that the VFP exception is treated as synchronous. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Nicolas Pitre <nico@cam.org>		16 years ago
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Makefile	kbuild: enable 'make AFLAGS=...' to add additional options to AS	18 years ago
entry.S	[ARM] 5440/1: Fix VFP state corruption due to preemption during VFP exceptions	16 years ago
vfp.h	[ARM] 5387/1: Add ptrace VFP support on ARM	16 years ago
vfpdouble.c	[ARM] vfp: fix fuitod/fsitod instructions	17 years ago
vfphw.S	Fix the VFP handling on the Feroceon CPU	16 years ago
vfpinstr.h	[ARM] 4583/1: ARMv7: Add VFPv3 support	17 years ago
vfpmodule.c	Fix the VFP handling on the Feroceon CPU	16 years ago
vfpsingle.c	…