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581 lines
16 KiB
581 lines
16 KiB
/*
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* LocalPlus Bus FIFO driver for the Freescale MPC52xx.
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*
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* Copyright (C) 2009 Secret Lab Technologies Ltd.
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*
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* This file is released under the GPLv2
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*
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* Todo:
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* - Add support for multiple requests to be queued.
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*/
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/mpc52xx.h>
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#include <asm/time.h>
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#include <sysdev/bestcomm/bestcomm.h>
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#include <sysdev/bestcomm/bestcomm_priv.h>
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#include <sysdev/bestcomm/gen_bd.h>
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MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
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MODULE_DESCRIPTION("MPC5200 LocalPlus FIFO device driver");
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MODULE_LICENSE("GPL");
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#define LPBFIFO_REG_PACKET_SIZE (0x00)
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#define LPBFIFO_REG_START_ADDRESS (0x04)
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#define LPBFIFO_REG_CONTROL (0x08)
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#define LPBFIFO_REG_ENABLE (0x0C)
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#define LPBFIFO_REG_BYTES_DONE_STATUS (0x14)
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#define LPBFIFO_REG_FIFO_DATA (0x40)
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#define LPBFIFO_REG_FIFO_STATUS (0x44)
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#define LPBFIFO_REG_FIFO_CONTROL (0x48)
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#define LPBFIFO_REG_FIFO_ALARM (0x4C)
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struct mpc52xx_lpbfifo {
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struct device *dev;
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phys_addr_t regs_phys;
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void __iomem *regs;
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int irq;
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spinlock_t lock;
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struct bcom_task *bcom_tx_task;
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struct bcom_task *bcom_rx_task;
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struct bcom_task *bcom_cur_task;
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/* Current state data */
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struct mpc52xx_lpbfifo_request *req;
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int dma_irqs_enabled;
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};
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/* The MPC5200 has only one fifo, so only need one instance structure */
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static struct mpc52xx_lpbfifo lpbfifo;
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/**
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* mpc52xx_lpbfifo_kick - Trigger the next block of data to be transferred
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*/
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static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req)
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{
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size_t transfer_size = req->size - req->pos;
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struct bcom_bd *bd;
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void __iomem *reg;
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u32 *data;
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int i;
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int bit_fields;
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int dma = !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA);
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int write = req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
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int poll_dma = req->flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA;
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/* Set and clear the reset bits; is good practice in User Manual */
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out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
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/* set master enable bit */
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out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000001);
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if (!dma) {
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/* While the FIFO can be setup for transfer sizes as large as
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* 16M-1, the FIFO itself is only 512 bytes deep and it does
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* not generate interrupts for FIFO full events (only transfer
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* complete will raise an IRQ). Therefore when not using
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* Bestcomm to drive the FIFO it needs to either be polled, or
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* transfers need to constrained to the size of the fifo.
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*
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* This driver restricts the size of the transfer
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*/
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if (transfer_size > 512)
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transfer_size = 512;
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/* Load the FIFO with data */
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if (write) {
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reg = lpbfifo.regs + LPBFIFO_REG_FIFO_DATA;
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data = req->data + req->pos;
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for (i = 0; i < transfer_size; i += 4)
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out_be32(reg, *data++);
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}
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/* Unmask both error and completion irqs */
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out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000301);
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} else {
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/* Choose the correct direction
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*
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* Configure the watermarks so DMA will always complete correctly.
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* It may be worth experimenting with the ALARM value to see if
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* there is a performance impacit. However, if it is wrong there
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* is a risk of DMA not transferring the last chunk of data
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*/
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if (write) {
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out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1e4);
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out_8(lpbfifo.regs + LPBFIFO_REG_FIFO_CONTROL, 7);
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lpbfifo.bcom_cur_task = lpbfifo.bcom_tx_task;
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} else {
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out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1ff);
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out_8(lpbfifo.regs + LPBFIFO_REG_FIFO_CONTROL, 0);
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lpbfifo.bcom_cur_task = lpbfifo.bcom_rx_task;
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if (poll_dma) {
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if (lpbfifo.dma_irqs_enabled) {
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disable_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task));
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lpbfifo.dma_irqs_enabled = 0;
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}
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} else {
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if (!lpbfifo.dma_irqs_enabled) {
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enable_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task));
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lpbfifo.dma_irqs_enabled = 1;
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}
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}
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}
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bd = bcom_prepare_next_buffer(lpbfifo.bcom_cur_task);
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bd->status = transfer_size;
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if (!write) {
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/*
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* In the DMA read case, the DMA doesn't complete,
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* possibly due to incorrect watermarks in the ALARM
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* and CONTROL regs. For now instead of trying to
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* determine the right watermarks that will make this
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* work, just increase the number of bytes the FIFO is
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* expecting.
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*
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* When submitting another operation, the FIFO will get
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* reset, so the condition of the FIFO waiting for a
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* non-existent 4 bytes will get cleared.
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*/
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transfer_size += 4; /* BLECH! */
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}
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bd->data[0] = req->data_phys + req->pos;
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bcom_submit_next_buffer(lpbfifo.bcom_cur_task, NULL);
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/* error irq & master enabled bit */
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bit_fields = 0x00000201;
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/* Unmask irqs */
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if (write && (!poll_dma))
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bit_fields |= 0x00000100; /* completion irq too */
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out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, bit_fields);
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}
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/* Set transfer size, width, chip select and READ mode */
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out_be32(lpbfifo.regs + LPBFIFO_REG_START_ADDRESS,
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req->offset + req->pos);
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out_be32(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, transfer_size);
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bit_fields = req->cs << 24 | 0x000008;
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if (!write)
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bit_fields |= 0x010000; /* read mode */
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out_be32(lpbfifo.regs + LPBFIFO_REG_CONTROL, bit_fields);
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/* Kick it off */
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if (!lpbfifo.req->defer_xfer_start)
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out_8(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, 0x01);
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if (dma)
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bcom_enable(lpbfifo.bcom_cur_task);
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}
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/**
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* mpc52xx_lpbfifo_irq - IRQ handler for LPB FIFO
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*
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* On transmit, the dma completion irq triggers before the fifo completion
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* triggers. Handle the dma completion here instead of the LPB FIFO Bestcomm
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* task completion irq because everything is not really done until the LPB FIFO
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* completion irq triggers.
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*
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* In other words:
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* For DMA, on receive, the "Fat Lady" is the bestcom completion irq. on
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* transmit, the fifo completion irq is the "Fat Lady". The opera (or in this
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* case the DMA/FIFO operation) is not finished until the "Fat Lady" sings.
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*
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* Reasons for entering this routine:
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* 1) PIO mode rx and tx completion irq
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* 2) DMA interrupt mode tx completion irq
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* 3) DMA polled mode tx
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*
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* Exit conditions:
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* 1) Transfer aborted
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* 2) FIFO complete without DMA; more data to do
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* 3) FIFO complete without DMA; all data transferred
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* 4) FIFO complete using DMA
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*
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* Condition 1 can occur regardless of whether or not DMA is used.
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* It requires executing the callback to report the error and exiting
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* immediately.
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*
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* Condition 2 requires programming the FIFO with the next block of data
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*
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* Condition 3 requires executing the callback to report completion
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*
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* Condition 4 means the same as 3, except that we also retrieve the bcom
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* buffer so DMA doesn't get clogged up.
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*
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* To make things trickier, the spinlock must be dropped before
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* executing the callback, otherwise we could end up with a deadlock
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* or nested spinlock condition. The out path is non-trivial, so
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* extra fiddling is done to make sure all paths lead to the same
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* outbound code.
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*/
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static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void *dev_id)
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{
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struct mpc52xx_lpbfifo_request *req;
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u32 status = in_8(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS);
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void __iomem *reg;
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u32 *data;
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int count, i;
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int do_callback = 0;
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u32 ts;
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unsigned long flags;
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int dma, write, poll_dma;
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spin_lock_irqsave(&lpbfifo.lock, flags);
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ts = get_tbl();
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req = lpbfifo.req;
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if (!req) {
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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pr_err("bogus LPBFIFO IRQ\n");
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return IRQ_HANDLED;
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}
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dma = !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA);
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write = req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
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poll_dma = req->flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA;
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if (dma && !write) {
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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pr_err("bogus LPBFIFO IRQ (dma and not writting)\n");
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return IRQ_HANDLED;
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}
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if ((status & 0x01) == 0) {
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goto out;
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}
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/* check abort bit */
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if (status & 0x10) {
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out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
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do_callback = 1;
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goto out;
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}
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/* Read result from hardware */
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count = in_be32(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS);
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count &= 0x00ffffff;
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if (!dma && !write) {
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/* copy the data out of the FIFO */
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reg = lpbfifo.regs + LPBFIFO_REG_FIFO_DATA;
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data = req->data + req->pos;
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for (i = 0; i < count; i += 4)
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*data++ = in_be32(reg);
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}
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/* Update transfer position and count */
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req->pos += count;
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/* Decide what to do next */
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if (req->size - req->pos)
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mpc52xx_lpbfifo_kick(req); /* more work to do */
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else
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do_callback = 1;
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out:
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/* Clear the IRQ */
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out_8(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS, 0x01);
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if (dma && (status & 0x11)) {
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/*
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* Count the DMA as complete only when the FIFO completion
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* status or abort bits are set.
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*
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* (status & 0x01) should always be the case except sometimes
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* when using polled DMA.
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*
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* (status & 0x10) {transfer aborted}: This case needs more
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* testing.
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*/
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bcom_retrieve_buffer(lpbfifo.bcom_cur_task, &status, NULL);
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}
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req->last_byte = ((u8 *)req->data)[req->size - 1];
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/* When the do_callback flag is set; it means the transfer is finished
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* so set the FIFO as idle */
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if (do_callback)
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lpbfifo.req = NULL;
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if (irq != 0) /* don't increment on polled case */
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req->irq_count++;
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req->irq_ticks += get_tbl() - ts;
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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/* Spinlock is released; it is now safe to call the callback */
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if (do_callback && req->callback)
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req->callback(req);
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return IRQ_HANDLED;
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}
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/**
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* mpc52xx_lpbfifo_bcom_irq - IRQ handler for LPB FIFO Bestcomm task
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*
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* Only used when receiving data.
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*/
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static irqreturn_t mpc52xx_lpbfifo_bcom_irq(int irq, void *dev_id)
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{
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struct mpc52xx_lpbfifo_request *req;
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unsigned long flags;
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u32 status;
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u32 ts;
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spin_lock_irqsave(&lpbfifo.lock, flags);
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ts = get_tbl();
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req = lpbfifo.req;
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if (!req || (req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA)) {
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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return IRQ_HANDLED;
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}
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if (irq != 0) /* don't increment on polled case */
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req->irq_count++;
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if (!bcom_buffer_done(lpbfifo.bcom_cur_task)) {
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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req->buffer_not_done_cnt++;
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if ((req->buffer_not_done_cnt % 1000) == 0)
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pr_err("transfer stalled\n");
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return IRQ_HANDLED;
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}
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bcom_retrieve_buffer(lpbfifo.bcom_cur_task, &status, NULL);
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req->last_byte = ((u8 *)req->data)[req->size - 1];
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req->pos = status & 0x00ffffff;
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/* Mark the FIFO as idle */
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lpbfifo.req = NULL;
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/* Release the lock before calling out to the callback. */
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req->irq_ticks += get_tbl() - ts;
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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if (req->callback)
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req->callback(req);
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return IRQ_HANDLED;
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}
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/**
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* mpc52xx_lpbfifo_bcom_poll - Poll for DMA completion
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*/
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void mpc52xx_lpbfifo_poll(void)
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{
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struct mpc52xx_lpbfifo_request *req = lpbfifo.req;
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int dma = !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA);
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int write = req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
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/*
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* For more information, see comments on the "Fat Lady"
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*/
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if (dma && write)
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mpc52xx_lpbfifo_irq(0, NULL);
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else
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mpc52xx_lpbfifo_bcom_irq(0, NULL);
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}
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EXPORT_SYMBOL(mpc52xx_lpbfifo_poll);
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/**
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* mpc52xx_lpbfifo_submit - Submit an LPB FIFO transfer request.
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* @req: Pointer to request structure
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*/
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int mpc52xx_lpbfifo_submit(struct mpc52xx_lpbfifo_request *req)
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{
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unsigned long flags;
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if (!lpbfifo.regs)
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return -ENODEV;
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spin_lock_irqsave(&lpbfifo.lock, flags);
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/* If the req pointer is already set, then a transfer is in progress */
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if (lpbfifo.req) {
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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return -EBUSY;
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}
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/* Setup the transfer */
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lpbfifo.req = req;
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req->irq_count = 0;
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req->irq_ticks = 0;
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req->buffer_not_done_cnt = 0;
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req->pos = 0;
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mpc52xx_lpbfifo_kick(req);
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(mpc52xx_lpbfifo_submit);
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int mpc52xx_lpbfifo_start_xfer(struct mpc52xx_lpbfifo_request *req)
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{
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unsigned long flags;
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if (!lpbfifo.regs)
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return -ENODEV;
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spin_lock_irqsave(&lpbfifo.lock, flags);
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|
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/*
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* If the req pointer is already set and a transfer was
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* started on submit, then this transfer is in progress
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*/
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if (lpbfifo.req && !lpbfifo.req->defer_xfer_start) {
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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return -EBUSY;
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}
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/*
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* If the req was previously submitted but not
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* started, start it now
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*/
|
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if (lpbfifo.req && lpbfifo.req == req &&
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lpbfifo.req->defer_xfer_start) {
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out_8(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, 0x01);
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}
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(mpc52xx_lpbfifo_start_xfer);
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void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_request *req)
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{
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unsigned long flags;
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spin_lock_irqsave(&lpbfifo.lock, flags);
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if (lpbfifo.req == req) {
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/* Put it into reset and clear the state */
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bcom_gen_bd_rx_reset(lpbfifo.bcom_rx_task);
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bcom_gen_bd_tx_reset(lpbfifo.bcom_tx_task);
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out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
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lpbfifo.req = NULL;
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}
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spin_unlock_irqrestore(&lpbfifo.lock, flags);
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}
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EXPORT_SYMBOL(mpc52xx_lpbfifo_abort);
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|
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static int mpc52xx_lpbfifo_probe(struct platform_device *op)
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{
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struct resource res;
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int rc = -ENOMEM;
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|
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if (lpbfifo.dev != NULL)
|
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return -ENOSPC;
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|
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lpbfifo.irq = irq_of_parse_and_map(op->dev.of_node, 0);
|
|
if (!lpbfifo.irq)
|
|
return -ENODEV;
|
|
|
|
if (of_address_to_resource(op->dev.of_node, 0, &res))
|
|
return -ENODEV;
|
|
lpbfifo.regs_phys = res.start;
|
|
lpbfifo.regs = of_iomap(op->dev.of_node, 0);
|
|
if (!lpbfifo.regs)
|
|
return -ENOMEM;
|
|
|
|
spin_lock_init(&lpbfifo.lock);
|
|
|
|
/* Put FIFO into reset */
|
|
out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
|
|
|
|
/* Register the interrupt handler */
|
|
rc = request_irq(lpbfifo.irq, mpc52xx_lpbfifo_irq, 0,
|
|
"mpc52xx-lpbfifo", &lpbfifo);
|
|
if (rc)
|
|
goto err_irq;
|
|
|
|
/* Request the Bestcomm receive (fifo --> memory) task and IRQ */
|
|
lpbfifo.bcom_rx_task =
|
|
bcom_gen_bd_rx_init(2, res.start + LPBFIFO_REG_FIFO_DATA,
|
|
BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC,
|
|
16*1024*1024);
|
|
if (!lpbfifo.bcom_rx_task)
|
|
goto err_bcom_rx;
|
|
|
|
rc = request_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task),
|
|
mpc52xx_lpbfifo_bcom_irq, 0,
|
|
"mpc52xx-lpbfifo-rx", &lpbfifo);
|
|
if (rc)
|
|
goto err_bcom_rx_irq;
|
|
|
|
lpbfifo.dma_irqs_enabled = 1;
|
|
|
|
/* Request the Bestcomm transmit (memory --> fifo) task and IRQ */
|
|
lpbfifo.bcom_tx_task =
|
|
bcom_gen_bd_tx_init(2, res.start + LPBFIFO_REG_FIFO_DATA,
|
|
BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC);
|
|
if (!lpbfifo.bcom_tx_task)
|
|
goto err_bcom_tx;
|
|
|
|
lpbfifo.dev = &op->dev;
|
|
return 0;
|
|
|
|
err_bcom_tx:
|
|
free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo);
|
|
err_bcom_rx_irq:
|
|
bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task);
|
|
err_bcom_rx:
|
|
err_irq:
|
|
iounmap(lpbfifo.regs);
|
|
lpbfifo.regs = NULL;
|
|
|
|
dev_err(&op->dev, "mpc52xx_lpbfifo_probe() failed\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
|
|
static int mpc52xx_lpbfifo_remove(struct platform_device *op)
|
|
{
|
|
if (lpbfifo.dev != &op->dev)
|
|
return 0;
|
|
|
|
/* Put FIFO in reset */
|
|
out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
|
|
|
|
/* Release the bestcomm transmit task */
|
|
free_irq(bcom_get_task_irq(lpbfifo.bcom_tx_task), &lpbfifo);
|
|
bcom_gen_bd_tx_release(lpbfifo.bcom_tx_task);
|
|
|
|
/* Release the bestcomm receive task */
|
|
free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo);
|
|
bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task);
|
|
|
|
free_irq(lpbfifo.irq, &lpbfifo);
|
|
iounmap(lpbfifo.regs);
|
|
lpbfifo.regs = NULL;
|
|
lpbfifo.dev = NULL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct of_device_id mpc52xx_lpbfifo_match[] = {
|
|
{ .compatible = "fsl,mpc5200-lpbfifo", },
|
|
{},
|
|
};
|
|
|
|
static struct platform_driver mpc52xx_lpbfifo_driver = {
|
|
.driver = {
|
|
.name = "mpc52xx-lpbfifo",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = mpc52xx_lpbfifo_match,
|
|
},
|
|
.probe = mpc52xx_lpbfifo_probe,
|
|
.remove = mpc52xx_lpbfifo_remove,
|
|
};
|
|
module_platform_driver(mpc52xx_lpbfifo_driver);
|
|
|