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679 lines
26 KiB
679 lines
26 KiB
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How To Write Linux PCI Drivers
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by Martin Mares <mj@ucw.cz> on 07-Feb-2000
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updated by Grant Grundler <grundler@parisc-linux.org> on 23-Dec-2006
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The world of PCI is vast and full of (mostly unpleasant) surprises.
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Since each CPU architecture implements different chip-sets and PCI devices
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have different requirements (erm, "features"), the result is the PCI support
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in the Linux kernel is not as trivial as one would wish. This short paper
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tries to introduce all potential driver authors to Linux APIs for
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PCI device drivers.
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A more complete resource is the third edition of "Linux Device Drivers"
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by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
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LDD3 is available for free (under Creative Commons License) from:
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http://lwn.net/Kernel/LDD3/
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However, keep in mind that all documents are subject to "bit rot".
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Refer to the source code if things are not working as described here.
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Please send questions/comments/patches about Linux PCI API to the
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"Linux PCI" <linux-pci@atrey.karlin.mff.cuni.cz> mailing list.
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0. Structure of PCI drivers
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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PCI drivers "discover" PCI devices in a system via pci_register_driver().
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Actually, it's the other way around. When the PCI generic code discovers
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a new device, the driver with a matching "description" will be notified.
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Details on this below.
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pci_register_driver() leaves most of the probing for devices to
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the PCI layer and supports online insertion/removal of devices [thus
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supporting hot-pluggable PCI, CardBus, and Express-Card in a single driver].
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pci_register_driver() call requires passing in a table of function
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pointers and thus dictates the high level structure of a driver.
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Once the driver knows about a PCI device and takes ownership, the
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driver generally needs to perform the following initialization:
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Enable the device
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Request MMIO/IOP resources
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Set the DMA mask size (for both coherent and streaming DMA)
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Allocate and initialize shared control data (pci_allocate_coherent())
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Access device configuration space (if needed)
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Register IRQ handler (request_irq())
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Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip)
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Enable DMA/processing engines
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When done using the device, and perhaps the module needs to be unloaded,
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the driver needs to take the follow steps:
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Disable the device from generating IRQs
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Release the IRQ (free_irq())
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Stop all DMA activity
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Release DMA buffers (both streaming and coherent)
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Unregister from other subsystems (e.g. scsi or netdev)
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Release MMIO/IOP resources
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Disable the device
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Most of these topics are covered in the following sections.
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For the rest look at LDD3 or <linux/pci.h> .
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If the PCI subsystem is not configured (CONFIG_PCI is not set), most of
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the PCI functions described below are defined as inline functions either
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completely empty or just returning an appropriate error codes to avoid
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lots of ifdefs in the drivers.
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1. pci_register_driver() call
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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PCI device drivers call pci_register_driver() during their
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initialization with a pointer to a structure describing the driver
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(struct pci_driver):
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field name Description
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---------- ------------------------------------------------------
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id_table Pointer to table of device ID's the driver is
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interested in. Most drivers should export this
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table using MODULE_DEVICE_TABLE(pci,...).
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probe This probing function gets called (during execution
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of pci_register_driver() for already existing
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devices or later if a new device gets inserted) for
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all PCI devices which match the ID table and are not
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"owned" by the other drivers yet. This function gets
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passed a "struct pci_dev *" for each device whose
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entry in the ID table matches the device. The probe
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function returns zero when the driver chooses to
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take "ownership" of the device or an error code
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(negative number) otherwise.
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The probe function always gets called from process
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context, so it can sleep.
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remove The remove() function gets called whenever a device
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being handled by this driver is removed (either during
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deregistration of the driver or when it's manually
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pulled out of a hot-pluggable slot).
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The remove function always gets called from process
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context, so it can sleep.
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suspend Put device into low power state.
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suspend_late Put device into low power state.
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resume_early Wake device from low power state.
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resume Wake device from low power state.
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(Please see Documentation/power/pci.txt for descriptions
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of PCI Power Management and the related functions.)
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enable_wake Enable device to generate wake events from a low power
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state.
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shutdown Hook into reboot_notifier_list (kernel/sys.c).
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Intended to stop any idling DMA operations.
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Useful for enabling wake-on-lan (NIC) or changing
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the power state of a device before reboot.
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e.g. drivers/net/e100.c.
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err_handler See Documentation/pci-error-recovery.txt
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The ID table is an array of struct pci_device_id entries ending with an
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all-zero entry. Each entry consists of:
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vendor,device Vendor and device ID to match (or PCI_ANY_ID)
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subvendor, Subsystem vendor and device ID to match (or PCI_ANY_ID)
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subdevice,
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class Device class, subclass, and "interface" to match.
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See Appendix D of the PCI Local Bus Spec or
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include/linux/pci_ids.h for a full list of classes.
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Most drivers do not need to specify class/class_mask
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as vendor/device is normally sufficient.
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class_mask limit which sub-fields of the class field are compared.
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See drivers/scsi/sym53c8xx_2/ for example of usage.
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driver_data Data private to the driver.
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Most drivers don't need to use driver_data field.
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Best practice is to use driver_data as an index
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into a static list of equivalent device types,
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instead of using it as a pointer.
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Most drivers only need PCI_DEVICE() or PCI_DEVICE_CLASS() to set up
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a pci_device_id table.
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New PCI IDs may be added to a device driver pci_ids table at runtime
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as shown below:
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echo "vendor device subvendor subdevice class class_mask driver_data" > \
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/sys/bus/pci/drivers/{driver}/new_id
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All fields are passed in as hexadecimal values (no leading 0x).
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The vendor and device fields are mandatory, the others are optional. Users
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need pass only as many optional fields as necessary:
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o subvendor and subdevice fields default to PCI_ANY_ID (FFFFFFFF)
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o class and classmask fields default to 0
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o driver_data defaults to 0UL.
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Once added, the driver probe routine will be invoked for any unclaimed
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PCI devices listed in its (newly updated) pci_ids list.
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When the driver exits, it just calls pci_unregister_driver() and the PCI layer
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automatically calls the remove hook for all devices handled by the driver.
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1.1 "Attributes" for driver functions/data
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Please mark the initialization and cleanup functions where appropriate
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(the corresponding macros are defined in <linux/init.h>):
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__init Initialization code. Thrown away after the driver
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initializes.
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__exit Exit code. Ignored for non-modular drivers.
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__devinit Device initialization code.
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Identical to __init if the kernel is not compiled
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with CONFIG_HOTPLUG, normal function otherwise.
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__devexit The same for __exit.
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Tips on when/where to use the above attributes:
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o The module_init()/module_exit() functions (and all
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initialization functions called _only_ from these)
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should be marked __init/__exit.
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o Do not mark the struct pci_driver.
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o The ID table array should be marked __devinitdata.
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o The probe() and remove() functions should be marked __devinit
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and __devexit respectively. All initialization functions
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exclusively called by the probe() routine, can be marked __devinit.
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Ditto for remove() and __devexit.
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o If mydriver_remove() is marked with __devexit(), then all address
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references to mydriver_remove must use __devexit_p(mydriver_remove)
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(in the struct pci_driver declaration for example).
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__devexit_p() will generate the function name _or_ NULL if the
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function will be discarded. For an example, see drivers/net/tg3.c.
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o Do NOT mark a function if you are not sure which mark to use.
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Better to not mark the function than mark the function wrong.
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2. How to find PCI devices manually
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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PCI drivers should have a really good reason for not using the
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pci_register_driver() interface to search for PCI devices.
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The main reason PCI devices are controlled by multiple drivers
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is because one PCI device implements several different HW services.
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E.g. combined serial/parallel port/floppy controller.
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A manual search may be performed using the following constructs:
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Searching by vendor and device ID:
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struct pci_dev *dev = NULL;
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while (dev = pci_get_device(VENDOR_ID, DEVICE_ID, dev))
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configure_device(dev);
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Searching by class ID (iterate in a similar way):
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pci_get_class(CLASS_ID, dev)
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Searching by both vendor/device and subsystem vendor/device ID:
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pci_get_subsys(VENDOR_ID,DEVICE_ID, SUBSYS_VENDOR_ID, SUBSYS_DEVICE_ID, dev).
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You can use the constant PCI_ANY_ID as a wildcard replacement for
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VENDOR_ID or DEVICE_ID. This allows searching for any device from a
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specific vendor, for example.
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These functions are hotplug-safe. They increment the reference count on
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the pci_dev that they return. You must eventually (possibly at module unload)
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decrement the reference count on these devices by calling pci_dev_put().
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3. Device Initialization Steps
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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As noted in the introduction, most PCI drivers need the following steps
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for device initialization:
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Enable the device
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Request MMIO/IOP resources
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Set the DMA mask size (for both coherent and streaming DMA)
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Allocate and initialize shared control data (pci_allocate_coherent())
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Access device configuration space (if needed)
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Register IRQ handler (request_irq())
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Initialize non-PCI (i.e. LAN/SCSI/etc parts of the chip)
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Enable DMA/processing engines.
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The driver can access PCI config space registers at any time.
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(Well, almost. When running BIST, config space can go away...but
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that will just result in a PCI Bus Master Abort and config reads
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will return garbage).
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3.1 Enable the PCI device
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~~~~~~~~~~~~~~~~~~~~~~~~~
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Before touching any device registers, the driver needs to enable
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the PCI device by calling pci_enable_device(). This will:
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o wake up the device if it was in suspended state,
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o allocate I/O and memory regions of the device (if BIOS did not),
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o allocate an IRQ (if BIOS did not).
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NOTE: pci_enable_device() can fail! Check the return value.
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NOTE2: Also see pci_enable_device_bars() below. Drivers can
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attempt to enable only a subset of BARs they need.
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[ OS BUG: we don't check resource allocations before enabling those
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resources. The sequence would make more sense if we called
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pci_request_resources() before calling pci_enable_device().
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Currently, the device drivers can't detect the bug when when two
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devices have been allocated the same range. This is not a common
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problem and unlikely to get fixed soon.
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This has been discussed before but not changed as of 2.6.19:
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http://lkml.org/lkml/2006/3/2/194
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]
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pci_set_master() will enable DMA by setting the bus master bit
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in the PCI_COMMAND register. It also fixes the latency timer value if
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it's set to something bogus by the BIOS.
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If the PCI device can use the PCI Memory-Write-Invalidate transaction,
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call pci_set_mwi(). This enables the PCI_COMMAND bit for Mem-Wr-Inval
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and also ensures that the cache line size register is set correctly.
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Check the return value of pci_set_mwi() as not all architectures
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or chip-sets may support Memory-Write-Invalidate.
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3.2 Request MMIO/IOP resources
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Memory (MMIO), and I/O port addresses should NOT be read directly
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from the PCI device config space. Use the values in the pci_dev structure
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as the PCI "bus address" might have been remapped to a "host physical"
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address by the arch/chip-set specific kernel support.
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See Documentation/IO-mapping.txt for how to access device registers
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or device memory.
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The device driver needs to call pci_request_region() to verify
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no other device is already using the same address resource.
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Conversely, drivers should call pci_release_region() AFTER
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calling pci_disable_device().
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The idea is to prevent two devices colliding on the same address range.
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[ See OS BUG comment above. Currently (2.6.19), The driver can only
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determine MMIO and IO Port resource availability _after_ calling
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pci_enable_device(). ]
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Generic flavors of pci_request_region() are request_mem_region()
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(for MMIO ranges) and request_region() (for IO Port ranges).
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Use these for address resources that are not described by "normal" PCI
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BARs.
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Also see pci_request_selected_regions() below.
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3.3 Set the DMA mask size
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~~~~~~~~~~~~~~~~~~~~~~~~~
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[ If anything below doesn't make sense, please refer to
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Documentation/DMA-API.txt. This section is just a reminder that
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drivers need to indicate DMA capabilities of the device and is not
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an authoritative source for DMA interfaces. ]
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While all drivers should explicitly indicate the DMA capability
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(e.g. 32 or 64 bit) of the PCI bus master, devices with more than
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32-bit bus master capability for streaming data need the driver
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to "register" this capability by calling pci_set_dma_mask() with
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appropriate parameters. In general this allows more efficient DMA
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on systems where System RAM exists above 4G _physical_ address.
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Drivers for all PCI-X and PCIe compliant devices must call
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pci_set_dma_mask() as they are 64-bit DMA devices.
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Similarly, drivers must also "register" this capability if the device
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can directly address "consistent memory" in System RAM above 4G physical
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address by calling pci_set_consistent_dma_mask().
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Again, this includes drivers for all PCI-X and PCIe compliant devices.
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Many 64-bit "PCI" devices (before PCI-X) and some PCI-X devices are
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64-bit DMA capable for payload ("streaming") data but not control
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("consistent") data.
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3.4 Setup shared control data
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Once the DMA masks are set, the driver can allocate "consistent" (a.k.a. shared)
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memory. See Documentation/DMA-API.txt for a full description of
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the DMA APIs. This section is just a reminder that it needs to be done
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before enabling DMA on the device.
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3.5 Initialize device registers
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Some drivers will need specific "capability" fields programmed
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or other "vendor specific" register initialized or reset.
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E.g. clearing pending interrupts.
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3.6 Register IRQ handler
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~~~~~~~~~~~~~~~~~~~~~~~~
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While calling request_irq() is the the last step described here,
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this is often just another intermediate step to initialize a device.
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This step can often be deferred until the device is opened for use.
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All interrupt handlers for IRQ lines should be registered with IRQF_SHARED
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and use the devid to map IRQs to devices (remember that all PCI IRQ lines
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can be shared).
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request_irq() will associate an interrupt handler and device handle
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with an interrupt number. Historically interrupt numbers represent
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IRQ lines which run from the PCI device to the Interrupt controller.
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With MSI and MSI-X (more below) the interrupt number is a CPU "vector".
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request_irq() also enables the interrupt. Make sure the device is
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quiesced and does not have any interrupts pending before registering
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the interrupt handler.
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MSI and MSI-X are PCI capabilities. Both are "Message Signaled Interrupts"
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which deliver interrupts to the CPU via a DMA write to a Local APIC.
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The fundamental difference between MSI and MSI-X is how multiple
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"vectors" get allocated. MSI requires contiguous blocks of vectors
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while MSI-X can allocate several individual ones.
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MSI capability can be enabled by calling pci_enable_msi() or
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pci_enable_msix() before calling request_irq(). This causes
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the PCI support to program CPU vector data into the PCI device
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capability registers.
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If your PCI device supports both, try to enable MSI-X first.
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Only one can be enabled at a time. Many architectures, chip-sets,
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or BIOSes do NOT support MSI or MSI-X and the call to pci_enable_msi/msix
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will fail. This is important to note since many drivers have
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two (or more) interrupt handlers: one for MSI/MSI-X and another for IRQs.
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They choose which handler to register with request_irq() based on the
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return value from pci_enable_msi/msix().
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There are (at least) two really good reasons for using MSI:
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1) MSI is an exclusive interrupt vector by definition.
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This means the interrupt handler doesn't have to verify
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its device caused the interrupt.
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2) MSI avoids DMA/IRQ race conditions. DMA to host memory is guaranteed
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to be visible to the host CPU(s) when the MSI is delivered. This
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is important for both data coherency and avoiding stale control data.
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This guarantee allows the driver to omit MMIO reads to flush
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the DMA stream.
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See drivers/infiniband/hw/mthca/ or drivers/net/tg3.c for examples
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of MSI/MSI-X usage.
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4. PCI device shutdown
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~~~~~~~~~~~~~~~~~~~~~~~
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When a PCI device driver is being unloaded, most of the following
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steps need to be performed:
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Disable the device from generating IRQs
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Release the IRQ (free_irq())
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Stop all DMA activity
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Release DMA buffers (both streaming and consistent)
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Unregister from other subsystems (e.g. scsi or netdev)
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Disable device from responding to MMIO/IO Port addresses
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Release MMIO/IO Port resource(s)
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4.1 Stop IRQs on the device
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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How to do this is chip/device specific. If it's not done, it opens
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the possibility of a "screaming interrupt" if (and only if)
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the IRQ is shared with another device.
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When the shared IRQ handler is "unhooked", the remaining devices
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using the same IRQ line will still need the IRQ enabled. Thus if the
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"unhooked" device asserts IRQ line, the system will respond assuming
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it was one of the remaining devices asserted the IRQ line. Since none
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of the other devices will handle the IRQ, the system will "hang" until
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it decides the IRQ isn't going to get handled and masks the IRQ (100,000
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iterations later). Once the shared IRQ is masked, the remaining devices
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will stop functioning properly. Not a nice situation.
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This is another reason to use MSI or MSI-X if it's available.
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MSI and MSI-X are defined to be exclusive interrupts and thus
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are not susceptible to the "screaming interrupt" problem.
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4.2 Release the IRQ
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~~~~~~~~~~~~~~~~~~~
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Once the device is quiesced (no more IRQs), one can call free_irq().
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This function will return control once any pending IRQs are handled,
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"unhook" the drivers IRQ handler from that IRQ, and finally release
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the IRQ if no one else is using it.
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4.3 Stop all DMA activity
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~~~~~~~~~~~~~~~~~~~~~~~~~
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It's extremely important to stop all DMA operations BEFORE attempting
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to deallocate DMA control data. Failure to do so can result in memory
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corruption, hangs, and on some chip-sets a hard crash.
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Stopping DMA after stopping the IRQs can avoid races where the
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IRQ handler might restart DMA engines.
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While this step sounds obvious and trivial, several "mature" drivers
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didn't get this step right in the past.
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4.4 Release DMA buffers
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~~~~~~~~~~~~~~~~~~~~~~~
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Once DMA is stopped, clean up streaming DMA first.
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I.e. unmap data buffers and return buffers to "upstream"
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owners if there is one.
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Then clean up "consistent" buffers which contain the control data.
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See Documentation/DMA-API.txt for details on unmapping interfaces.
|
|
|
|
|
|
4.5 Unregister from other subsystems
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
Most low level PCI device drivers support some other subsystem
|
|
like USB, ALSA, SCSI, NetDev, Infiniband, etc. Make sure your
|
|
driver isn't losing resources from that other subsystem.
|
|
If this happens, typically the symptom is an Oops (panic) when
|
|
the subsystem attempts to call into a driver that has been unloaded.
|
|
|
|
|
|
4.6 Disable Device from responding to MMIO/IO Port addresses
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
io_unmap() MMIO or IO Port resources and then call pci_disable_device().
|
|
This is the symmetric opposite of pci_enable_device().
|
|
Do not access device registers after calling pci_disable_device().
|
|
|
|
|
|
4.7 Release MMIO/IO Port Resource(s)
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
Call pci_release_region() to mark the MMIO or IO Port range as available.
|
|
Failure to do so usually results in the inability to reload the driver.
|
|
|
|
|
|
|
|
5. How to access PCI config space
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
You can use pci_(read|write)_config_(byte|word|dword) to access the config
|
|
space of a device represented by struct pci_dev *. All these functions return 0
|
|
when successful or an error code (PCIBIOS_...) which can be translated to a text
|
|
string by pcibios_strerror. Most drivers expect that accesses to valid PCI
|
|
devices don't fail.
|
|
|
|
If you don't have a struct pci_dev available, you can call
|
|
pci_bus_(read|write)_config_(byte|word|dword) to access a given device
|
|
and function on that bus.
|
|
|
|
If you access fields in the standard portion of the config header, please
|
|
use symbolic names of locations and bits declared in <linux/pci.h>.
|
|
|
|
If you need to access Extended PCI Capability registers, just call
|
|
pci_find_capability() for the particular capability and it will find the
|
|
corresponding register block for you.
|
|
|
|
|
|
|
|
6. Other interesting functions
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
pci_find_slot() Find pci_dev corresponding to given bus and
|
|
slot numbers.
|
|
pci_set_power_state() Set PCI Power Management state (0=D0 ... 3=D3)
|
|
pci_find_capability() Find specified capability in device's capability
|
|
list.
|
|
pci_resource_start() Returns bus start address for a given PCI region
|
|
pci_resource_end() Returns bus end address for a given PCI region
|
|
pci_resource_len() Returns the byte length of a PCI region
|
|
pci_set_drvdata() Set private driver data pointer for a pci_dev
|
|
pci_get_drvdata() Return private driver data pointer for a pci_dev
|
|
pci_set_mwi() Enable Memory-Write-Invalidate transactions.
|
|
pci_clear_mwi() Disable Memory-Write-Invalidate transactions.
|
|
|
|
|
|
|
|
7. Miscellaneous hints
|
|
~~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
When displaying PCI device names to the user (for example when a driver wants
|
|
to tell the user what card has it found), please use pci_name(pci_dev).
|
|
|
|
Always refer to the PCI devices by a pointer to the pci_dev structure.
|
|
All PCI layer functions use this identification and it's the only
|
|
reasonable one. Don't use bus/slot/function numbers except for very
|
|
special purposes -- on systems with multiple primary buses their semantics
|
|
can be pretty complex.
|
|
|
|
Don't try to turn on Fast Back to Back writes in your driver. All devices
|
|
on the bus need to be capable of doing it, so this is something which needs
|
|
to be handled by platform and generic code, not individual drivers.
|
|
|
|
|
|
|
|
8. Vendor and device identifications
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
One is not not required to add new device ids to include/linux/pci_ids.h.
|
|
Please add PCI_VENDOR_ID_xxx for vendors and a hex constant for device ids.
|
|
|
|
PCI_VENDOR_ID_xxx constants are re-used. The device ids are arbitrary
|
|
hex numbers (vendor controlled) and normally used only in a single
|
|
location, the pci_device_id table.
|
|
|
|
Please DO submit new vendor/device ids to pciids.sourceforge.net project.
|
|
|
|
|
|
|
|
9. Obsolete functions
|
|
~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
There are several functions which you might come across when trying to
|
|
port an old driver to the new PCI interface. They are no longer present
|
|
in the kernel as they aren't compatible with hotplug or PCI domains or
|
|
having sane locking.
|
|
|
|
pci_find_device() Superseded by pci_get_device()
|
|
pci_find_subsys() Superseded by pci_get_subsys()
|
|
pci_find_slot() Superseded by pci_get_slot()
|
|
|
|
|
|
The alternative is the traditional PCI device driver that walks PCI
|
|
device lists. This is still possible but discouraged.
|
|
|
|
|
|
|
|
10. pci_enable_device_bars() and Legacy I/O Port space
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
Large servers may not be able to provide I/O port resources to all PCI
|
|
devices. I/O Port space is only 64KB on Intel Architecture[1] and is
|
|
likely also fragmented since the I/O base register of PCI-to-PCI
|
|
bridge will usually be aligned to a 4KB boundary[2]. On such systems,
|
|
pci_enable_device() and pci_request_region() will fail when
|
|
attempting to enable I/O Port regions that don't have I/O Port
|
|
resources assigned.
|
|
|
|
Fortunately, many PCI devices which request I/O Port resources also
|
|
provide access to the same registers via MMIO BARs. These devices can
|
|
be handled without using I/O port space and the drivers typically
|
|
offer a CONFIG_ option to only use MMIO regions
|
|
(e.g. CONFIG_TULIP_MMIO). PCI devices typically provide I/O port
|
|
interface for legacy OSes and will work when I/O port resources are not
|
|
assigned. The "PCI Local Bus Specification Revision 3.0" discusses
|
|
this on p.44, "IMPLEMENTATION NOTE".
|
|
|
|
If your PCI device driver doesn't need I/O port resources assigned to
|
|
I/O Port BARs, you should use pci_enable_device_bars() instead of
|
|
pci_enable_device() in order not to enable I/O port regions for the
|
|
corresponding devices. In addition, you should use
|
|
pci_request_selected_regions() and pci_release_selected_regions()
|
|
instead of pci_request_regions()/pci_release_regions() in order not to
|
|
request/release I/O port regions for the corresponding devices.
|
|
|
|
[1] Some systems support 64KB I/O port space per PCI segment.
|
|
[2] Some PCI-to-PCI bridges support optional 1KB aligned I/O base.
|
|
|
|
|
|
|
|
11. MMIO Space and "Write Posting"
|
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
Converting a driver from using I/O Port space to using MMIO space
|
|
often requires some additional changes. Specifically, "write posting"
|
|
needs to be handled. Many drivers (e.g. tg3, acenic, sym53c8xx_2)
|
|
already do this. I/O Port space guarantees write transactions reach the PCI
|
|
device before the CPU can continue. Writes to MMIO space allow the CPU
|
|
to continue before the transaction reaches the PCI device. HW weenies
|
|
call this "Write Posting" because the write completion is "posted" to
|
|
the CPU before the transaction has reached its destination.
|
|
|
|
Thus, timing sensitive code should add readl() where the CPU is
|
|
expected to wait before doing other work. The classic "bit banging"
|
|
sequence works fine for I/O Port space:
|
|
|
|
for (i = 8; --i; val >>= 1) {
|
|
outb(val & 1, ioport_reg); /* write bit */
|
|
udelay(10);
|
|
}
|
|
|
|
The same sequence for MMIO space should be:
|
|
|
|
for (i = 8; --i; val >>= 1) {
|
|
writeb(val & 1, mmio_reg); /* write bit */
|
|
readb(safe_mmio_reg); /* flush posted write */
|
|
udelay(10);
|
|
}
|
|
|
|
It is important that "safe_mmio_reg" not have any side effects that
|
|
interferes with the correct operation of the device.
|
|
|
|
Another case to watch out for is when resetting a PCI device. Use PCI
|
|
Configuration space reads to flush the writel(). This will gracefully
|
|
handle the PCI master abort on all platforms if the PCI device is
|
|
expected to not respond to a readl(). Most x86 platforms will allow
|
|
MMIO reads to master abort (a.k.a. "Soft Fail") and return garbage
|
|
(e.g. ~0). But many RISC platforms will crash (a.k.a."Hard Fail").
|
|
|
|
|