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269 lines
7.4 KiB
269 lines
7.4 KiB
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/*
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Copyright 2003-2004 Red Hat, Inc. All rights reserved.
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Copyright 2003-2004 Jeff Garzik
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The contents of this file are subject to the Open
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Software License version 1.1 that can be found at
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http://www.opensource.org/licenses/osl-1.1.txt and is included herein
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by reference.
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Alternatively, the contents of this file may be used under the terms
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of the GNU General Public License version 2 (the "GPL") as distributed
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in the kernel source COPYING file, in which case the provisions of
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the GPL are applicable instead of the above. If you wish to allow
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the use of your version of this file only under the terms of the
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GPL and not to allow others to use your version of this file under
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the OSL, indicate your decision by deleting the provisions above and
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replace them with the notice and other provisions required by the GPL.
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If you do not delete the provisions above, a recipient may use your
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version of this file under either the OSL or the GPL.
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*/
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#ifndef __LINUX_ATA_H__
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#define __LINUX_ATA_H__
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#include <linux/types.h>
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/* defines only for the constants which don't work well as enums */
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#define ATA_DMA_BOUNDARY 0xffffUL
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#define ATA_DMA_MASK 0xffffffffULL
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enum {
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/* various global constants */
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ATA_MAX_DEVICES = 2, /* per bus/port */
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ATA_MAX_PRD = 256, /* we could make these 256/256 */
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ATA_SECT_SIZE = 512,
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ATA_ID_WORDS = 256,
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ATA_ID_PROD_OFS = 27,
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ATA_ID_FW_REV_OFS = 23,
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ATA_ID_SERNO_OFS = 10,
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ATA_ID_MAJOR_VER = 80,
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ATA_ID_PIO_MODES = 64,
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ATA_ID_MWDMA_MODES = 63,
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ATA_ID_UDMA_MODES = 88,
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ATA_ID_PIO4 = (1 << 1),
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ATA_PCI_CTL_OFS = 2,
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ATA_SERNO_LEN = 20,
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ATA_UDMA0 = (1 << 0),
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ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
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ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
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ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
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ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
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ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
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ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
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ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
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/* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
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ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
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/* DMA-related */
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ATA_PRD_SZ = 8,
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ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
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ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
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ATA_DMA_TABLE_OFS = 4,
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ATA_DMA_STATUS = 2,
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ATA_DMA_CMD = 0,
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ATA_DMA_WR = (1 << 3),
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ATA_DMA_START = (1 << 0),
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ATA_DMA_INTR = (1 << 2),
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ATA_DMA_ERR = (1 << 1),
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ATA_DMA_ACTIVE = (1 << 0),
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/* bits in ATA command block registers */
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ATA_HOB = (1 << 7), /* LBA48 selector */
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ATA_NIEN = (1 << 1), /* disable-irq flag */
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ATA_LBA = (1 << 6), /* LBA28 selector */
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ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
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ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
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ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
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ATA_BUSY = (1 << 7), /* BSY status bit */
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ATA_DRDY = (1 << 6), /* device ready */
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ATA_DF = (1 << 5), /* device fault */
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ATA_DRQ = (1 << 3), /* data request i/o */
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ATA_ERR = (1 << 0), /* have an error */
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ATA_SRST = (1 << 2), /* software reset */
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ATA_ABORTED = (1 << 2), /* command aborted */
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/* ATA command block registers */
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ATA_REG_DATA = 0x00,
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ATA_REG_ERR = 0x01,
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ATA_REG_NSECT = 0x02,
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ATA_REG_LBAL = 0x03,
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ATA_REG_LBAM = 0x04,
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ATA_REG_LBAH = 0x05,
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ATA_REG_DEVICE = 0x06,
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ATA_REG_STATUS = 0x07,
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ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
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ATA_REG_CMD = ATA_REG_STATUS,
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ATA_REG_BYTEL = ATA_REG_LBAM,
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ATA_REG_BYTEH = ATA_REG_LBAH,
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ATA_REG_DEVSEL = ATA_REG_DEVICE,
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ATA_REG_IRQ = ATA_REG_NSECT,
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/* ATA device commands */
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ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
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ATA_CMD_EDD = 0x90, /* execute device diagnostic */
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ATA_CMD_FLUSH = 0xE7,
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ATA_CMD_FLUSH_EXT = 0xEA,
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ATA_CMD_ID_ATA = 0xEC,
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ATA_CMD_ID_ATAPI = 0xA1,
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ATA_CMD_READ = 0xC8,
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ATA_CMD_READ_EXT = 0x25,
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ATA_CMD_WRITE = 0xCA,
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ATA_CMD_WRITE_EXT = 0x35,
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ATA_CMD_PIO_READ = 0x20,
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ATA_CMD_PIO_READ_EXT = 0x24,
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ATA_CMD_PIO_WRITE = 0x30,
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ATA_CMD_PIO_WRITE_EXT = 0x34,
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ATA_CMD_SET_FEATURES = 0xEF,
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ATA_CMD_PACKET = 0xA0,
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ATA_CMD_VERIFY = 0x40,
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ATA_CMD_VERIFY_EXT = 0x42,
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/* SETFEATURES stuff */
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SETFEATURES_XFER = 0x03,
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XFER_UDMA_7 = 0x47,
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XFER_UDMA_6 = 0x46,
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XFER_UDMA_5 = 0x45,
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XFER_UDMA_4 = 0x44,
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XFER_UDMA_3 = 0x43,
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XFER_UDMA_2 = 0x42,
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XFER_UDMA_1 = 0x41,
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XFER_UDMA_0 = 0x40,
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XFER_MW_DMA_2 = 0x22,
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XFER_MW_DMA_1 = 0x21,
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XFER_MW_DMA_0 = 0x20,
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XFER_PIO_4 = 0x0C,
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XFER_PIO_3 = 0x0B,
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XFER_PIO_2 = 0x0A,
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XFER_PIO_1 = 0x09,
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XFER_PIO_0 = 0x08,
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XFER_SW_DMA_2 = 0x12,
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XFER_SW_DMA_1 = 0x11,
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XFER_SW_DMA_0 = 0x10,
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XFER_PIO_SLOW = 0x00,
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/* ATAPI stuff */
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ATAPI_PKT_DMA = (1 << 0),
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ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
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0=to device, 1=to host */
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ATAPI_CDB_LEN = 16,
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/* cable types */
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ATA_CBL_NONE = 0,
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ATA_CBL_PATA40 = 1,
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ATA_CBL_PATA80 = 2,
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ATA_CBL_PATA_UNK = 3,
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ATA_CBL_SATA = 4,
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/* SATA Status and Control Registers */
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SCR_STATUS = 0,
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SCR_ERROR = 1,
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SCR_CONTROL = 2,
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SCR_ACTIVE = 3,
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SCR_NOTIFICATION = 4,
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/* struct ata_taskfile flags */
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ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */
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ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */
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ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */
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ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */
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};
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enum ata_tf_protocols {
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/* ATA taskfile protocols */
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ATA_PROT_UNKNOWN, /* unknown/invalid */
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ATA_PROT_NODATA, /* no data */
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ATA_PROT_PIO, /* PIO single sector */
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ATA_PROT_PIO_MULT, /* PIO multiple sector */
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ATA_PROT_DMA, /* DMA */
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ATA_PROT_ATAPI, /* packet command, PIO data xfer*/
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ATA_PROT_ATAPI_NODATA, /* packet command, no data */
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ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */
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};
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enum ata_ioctls {
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ATA_IOC_GET_IO32 = 0x309,
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ATA_IOC_SET_IO32 = 0x324,
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};
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/* core structures */
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struct ata_prd {
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u32 addr;
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u32 flags_len;
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};
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struct ata_taskfile {
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unsigned long flags; /* ATA_TFLAG_xxx */
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u8 protocol; /* ATA_PROT_xxx */
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u8 ctl; /* control reg */
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u8 hob_feature; /* additional data */
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u8 hob_nsect; /* to support LBA48 */
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u8 hob_lbal;
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u8 hob_lbam;
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u8 hob_lbah;
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u8 feature;
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u8 nsect;
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u8 lbal;
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u8 lbam;
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u8 lbah;
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u8 device;
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u8 command; /* IO operation */
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};
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#define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0)
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#define ata_id_is_sata(id) ((id)[93] == 0)
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#define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6))
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#define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5))
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#define ata_id_has_flush(id) ((id)[83] & (1 << 12))
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#define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13))
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#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
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#define ata_id_has_wcache(id) ((id)[82] & (1 << 5))
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#define ata_id_has_pm(id) ((id)[82] & (1 << 3))
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#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
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#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
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#define ata_id_removeable(id) ((id)[0] & (1 << 7))
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#define ata_id_u32(id,n) \
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(((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
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#define ata_id_u64(id,n) \
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( ((u64) (id)[(n) + 3] << 48) | \
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((u64) (id)[(n) + 2] << 32) | \
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((u64) (id)[(n) + 1] << 16) | \
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((u64) (id)[(n) + 0]) )
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static inline int atapi_cdb_len(u16 *dev_id)
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{
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u16 tmp = dev_id[0] & 0x3;
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switch (tmp) {
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case 0: return 12;
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case 1: return 16;
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default: return -1;
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}
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}
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static inline int is_atapi_taskfile(struct ata_taskfile *tf)
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{
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return (tf->protocol == ATA_PROT_ATAPI) ||
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(tf->protocol == ATA_PROT_ATAPI_NODATA) ||
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(tf->protocol == ATA_PROT_ATAPI_DMA);
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}
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static inline int ata_ok(u8 status)
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{
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return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
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== ATA_DRDY);
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}
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#endif /* __LINUX_ATA_H__ */
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