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361 lines
9.8 KiB
361 lines
9.8 KiB
/*
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* Board setup routines for Motorola PrPMC750
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*
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* Author: Matt Porter <mporter@mvista.com>
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*
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* 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/reboot.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/types.h>
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#include <linux/major.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/seq_file.h>
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#include <linux/ide.h>
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#include <linux/root_dev.h>
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#include <linux/slab.h>
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#include <linux/serial_reg.h>
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#include <asm/byteorder.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/dma.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <asm/uaccess.h>
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#include <asm/time.h>
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#include <asm/open_pic.h>
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#include <asm/bootinfo.h>
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#include <asm/hawk.h>
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#include "prpmc750.h"
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extern unsigned long loops_per_jiffy;
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extern void gen550_progress(char *, unsigned short);
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static u_char prpmc750_openpic_initsenses[] __initdata =
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{
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT0 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UART */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_DEBUGINT */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HAWK_WDT */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_ABORT */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT1 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT2 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_HOSTINT3 */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTA */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTB */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTC */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_PMC_INTD */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
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(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PRPMC750_INT_UNUSED */
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};
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/*
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* Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
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* Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22.
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*/
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static inline int
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prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
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{
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static char pci_irq_table[][4] =
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/*
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* PCI IDSEL/INTPIN->INTLINE
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* A B C D
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*/
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{
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{12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */
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{0, 0, 0, 0}, /* IDSEL 15 - unused */
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{10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */
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{10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */
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{11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
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{0, 0, 0, 0}, /* IDSEL 19 - unused */
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{9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */
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{11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */
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{12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */
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};
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const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
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return PCI_IRQ_TABLE_LOOKUP;
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};
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static void __init prpmc750_pcibios_fixup(void)
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{
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struct pci_dev *dev;
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unsigned short wtmp;
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/*
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* Kludge to clean up after PPC6BUG which doesn't
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* configure the CL5446 VGA card. Also the
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* resource subsystem doesn't fixup the
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* PCI mem resources on the CL5446.
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*/
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if ((dev = pci_get_device(PCI_VENDOR_ID_CIRRUS,
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PCI_DEVICE_ID_CIRRUS_5446, 0))) {
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dev->resource[0].start += PRPMC750_PCI_PHY_MEM_OFFSET;
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dev->resource[0].end += PRPMC750_PCI_PHY_MEM_OFFSET;
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pci_read_config_word(dev, PCI_COMMAND, &wtmp);
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pci_write_config_word(dev, PCI_COMMAND, wtmp | 3);
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/* Enable Color mode in MISC reg */
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outb(0x03, 0x3c2);
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/* Select DRAM config reg */
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outb(0x0f, 0x3c4);
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/* Set proper DRAM config */
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outb(0xdf, 0x3c5);
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pci_dev_put(dev);
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}
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}
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void __init prpmc750_find_bridges(void)
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{
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struct pci_controller *hose;
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hose = pcibios_alloc_controller();
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if (!hose)
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return;
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hose->first_busno = 0;
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hose->last_busno = 0xff;
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hose->io_base_virt = (void *)PRPMC750_ISA_IO_BASE;
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hose->pci_mem_offset = PRPMC750_PCI_PHY_MEM_OFFSET;
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pci_init_resource(&hose->io_resource,
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PRPMC750_PCI_IO_START,
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PRPMC750_PCI_IO_END,
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IORESOURCE_IO, "PCI host bridge");
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pci_init_resource(&hose->mem_resources[0],
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PRPMC750_PROC_PCI_MEM_START,
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PRPMC750_PROC_PCI_MEM_END,
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IORESOURCE_MEM, "PCI host bridge");
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hose->io_space.start = PRPMC750_PCI_IO_START;
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hose->io_space.end = PRPMC750_PCI_IO_END;
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hose->mem_space.start = PRPMC750_PCI_MEM_START;
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hose->mem_space.end = PRPMC750_PCI_MEM_END - HAWK_MPIC_SIZE;
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if (hawk_init(hose, PRPMC750_HAWK_PPC_REG_BASE,
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PRPMC750_PROC_PCI_MEM_START,
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PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE,
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PRPMC750_PROC_PCI_IO_START, PRPMC750_PROC_PCI_IO_END,
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PRPMC750_PROC_PCI_MEM_END - HAWK_MPIC_SIZE + 1)
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!= 0) {
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printk(KERN_CRIT "Could not initialize host bridge\n");
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}
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hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
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ppc_md.pcibios_fixup = prpmc750_pcibios_fixup;
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ppc_md.pci_swizzle = common_swizzle;
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ppc_md.pci_map_irq = prpmc_map_irq;
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}
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static int prpmc750_show_cpuinfo(struct seq_file *m)
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{
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seq_printf(m, "machine\t\t: PrPMC750\n");
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return 0;
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}
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static void __init prpmc750_setup_arch(void)
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{
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/* init to some ~sane value until calibrate_delay() runs */
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loops_per_jiffy = 50000000 / HZ;
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/* Lookup PCI host bridges */
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prpmc750_find_bridges();
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#ifdef CONFIG_BLK_DEV_INITRD
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if (initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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#endif
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#ifdef CONFIG_ROOT_NFS
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ROOT_DEV = Root_NFS;
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#else
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ROOT_DEV = Root_SDA2;
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#endif
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OpenPIC_InitSenses = prpmc750_openpic_initsenses;
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OpenPIC_NumInitSenses = sizeof(prpmc750_openpic_initsenses);
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printk(KERN_INFO "Port by MontaVista Software, Inc. "
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"(source@mvista.com)\n");
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}
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/*
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* Compute the PrPMC750's bus speed using the baud clock as a
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* reference.
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*/
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static unsigned long __init prpmc750_get_bus_speed(void)
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{
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unsigned long tbl_start, tbl_end;
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unsigned long current_state, old_state, bus_speed;
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unsigned char lcr, dll, dlm;
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int baud_divisor, count;
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/* Read the UART's baud clock divisor */
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lcr = readb(PRPMC750_SERIAL_0_LCR);
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writeb(lcr | UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
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dll = readb(PRPMC750_SERIAL_0_DLL);
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dlm = readb(PRPMC750_SERIAL_0_DLM);
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writeb(lcr & ~UART_LCR_DLAB, PRPMC750_SERIAL_0_LCR);
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baud_divisor = (dlm << 8) | dll;
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/*
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* Use the baud clock divisor and base baud clock
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* to determine the baud rate and use that as
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* the number of baud clock edges we use for
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* the time base sample. Make it half the baud
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* rate.
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*/
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count = PRPMC750_BASE_BAUD / (baud_divisor * 16);
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/* Find the first edge of the baud clock */
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old_state = readb(PRPMC750_STATUS_REG) & PRPMC750_BAUDOUT_MASK;
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do {
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current_state = readb(PRPMC750_STATUS_REG) &
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PRPMC750_BAUDOUT_MASK;
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} while (old_state == current_state);
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old_state = current_state;
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/* Get the starting time base value */
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tbl_start = get_tbl();
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/*
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* Loop until we have found a number of edges equal
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* to half the count (half the baud rate)
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*/
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do {
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do {
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current_state = readb(PRPMC750_STATUS_REG) &
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PRPMC750_BAUDOUT_MASK;
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} while (old_state == current_state);
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old_state = current_state;
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} while (--count);
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/* Get the ending time base value */
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tbl_end = get_tbl();
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/* Compute bus speed */
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bus_speed = (tbl_end - tbl_start) * 128;
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return bus_speed;
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}
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static void __init prpmc750_calibrate_decr(void)
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{
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unsigned long freq;
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int divisor = 4;
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freq = prpmc750_get_bus_speed();
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tb_ticks_per_jiffy = freq / (HZ * divisor);
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tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
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}
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static void prpmc750_restart(char *cmd)
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{
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local_irq_disable();
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writeb(PRPMC750_MODRST_MASK, PRPMC750_MODRST_REG);
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while (1) ;
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}
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static void prpmc750_halt(void)
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{
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local_irq_disable();
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while (1) ;
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}
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static void prpmc750_power_off(void)
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{
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prpmc750_halt();
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}
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static void __init prpmc750_init_IRQ(void)
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{
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openpic_init(0);
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}
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/*
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* Set BAT 3 to map 0xf0000000 to end of physical memory space.
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*/
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static __inline__ void prpmc750_set_bat(void)
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{
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mb();
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mtspr(SPRN_DBAT1U, 0xf0001ffe);
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mtspr(SPRN_DBAT1L, 0xf000002a);
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mb();
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}
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/*
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* We need to read the Falcon/Hawk memory controller
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* to properly determine this value
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*/
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static unsigned long __init prpmc750_find_end_of_memory(void)
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{
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/* Read the memory size from the Hawk SMC */
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return hawk_get_mem_size(PRPMC750_HAWK_SMC_BASE);
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}
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static void __init prpmc750_map_io(void)
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{
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io_block_mapping(PRPMC750_ISA_IO_BASE, PRPMC750_ISA_IO_BASE,
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0x10000000, _PAGE_IO);
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#if 0
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io_block_mapping(0xf0000000, 0xc0000000, 0x08000000, _PAGE_IO);
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#endif
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io_block_mapping(0xf8000000, 0xf8000000, 0x08000000, _PAGE_IO);
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}
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void __init
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platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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parse_bootinfo(find_bootinfo());
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/* Cover the Hawk registers with a BAT */
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prpmc750_set_bat();
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isa_io_base = PRPMC750_ISA_IO_BASE;
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isa_mem_base = PRPMC750_ISA_MEM_BASE;
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pci_dram_offset = PRPMC750_PCI_DRAM_OFFSET;
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ppc_md.setup_arch = prpmc750_setup_arch;
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ppc_md.show_cpuinfo = prpmc750_show_cpuinfo;
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ppc_md.init_IRQ = prpmc750_init_IRQ;
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ppc_md.get_irq = openpic_get_irq;
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ppc_md.find_end_of_memory = prpmc750_find_end_of_memory;
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ppc_md.setup_io_mappings = prpmc750_map_io;
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ppc_md.restart = prpmc750_restart;
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ppc_md.power_off = prpmc750_power_off;
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ppc_md.halt = prpmc750_halt;
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/* PrPMC750 has no timekeeper part */
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ppc_md.time_init = NULL;
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ppc_md.get_rtc_time = NULL;
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ppc_md.set_rtc_time = NULL;
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ppc_md.calibrate_decr = prpmc750_calibrate_decr;
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#ifdef CONFIG_SERIAL_TEXT_DEBUG
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ppc_md.progress = gen550_progress;
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#endif /* CONFIG_SERIAL_TEXT_DEBUG */
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}
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