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445 lines
11 KiB
445 lines
11 KiB
/*
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* linux/arch/arm/plat-omap/devices.c
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*
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* Common platform device setup/initialization for OMAP1 and OMAP2
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/arch/tc.h>
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#include <asm/arch/board.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/menelaus.h>
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#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
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#define OMAP1_I2C_BASE 0xfffb3800
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#define OMAP2_I2C_BASE1 0x48070000
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#define OMAP_I2C_SIZE 0x3f
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#define OMAP1_I2C_INT INT_I2C
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#define OMAP2_I2C_INT1 56
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static struct resource i2c_resources1[] = {
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{
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* DMA not used; works around erratum writing to non-empty i2c fifo */
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static struct platform_device omap_i2c_device1 = {
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.name = "i2c_omap",
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.id = 1,
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.num_resources = ARRAY_SIZE(i2c_resources1),
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.resource = i2c_resources1,
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};
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/* See also arch/arm/mach-omap2/devices.c for second I2C on 24xx */
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static void omap_init_i2c(void)
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{
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if (cpu_is_omap24xx()) {
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i2c_resources1[0].start = OMAP2_I2C_BASE1;
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i2c_resources1[0].end = OMAP2_I2C_BASE1 + OMAP_I2C_SIZE;
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i2c_resources1[1].start = OMAP2_I2C_INT1;
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} else {
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i2c_resources1[0].start = OMAP1_I2C_BASE;
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i2c_resources1[0].end = OMAP1_I2C_BASE + OMAP_I2C_SIZE;
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i2c_resources1[1].start = OMAP1_I2C_INT;
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}
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/* FIXME define and use a boot tag, in case of boards that
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* either don't wire up I2C, or chips that mux it differently...
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* it can include clocking and address info, maybe more.
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*/
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(M19_24XX_I2C1_SCL);
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omap_cfg_reg(L15_24XX_I2C1_SDA);
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} else {
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omap_cfg_reg(I2C_SCL);
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omap_cfg_reg(I2C_SDA);
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}
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(void) platform_device_register(&omap_i2c_device1);
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}
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#else
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static inline void omap_init_i2c(void) {}
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_KEYBOARD_OMAP) || defined(CONFIG_KEYBOARD_OMAP_MODULE)
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static void omap_init_kp(void)
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{
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if (machine_is_omap_h2() || machine_is_omap_h3()) {
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omap_cfg_reg(F18_1610_KBC0);
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omap_cfg_reg(D20_1610_KBC1);
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omap_cfg_reg(D19_1610_KBC2);
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omap_cfg_reg(E18_1610_KBC3);
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omap_cfg_reg(C21_1610_KBC4);
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omap_cfg_reg(G18_1610_KBR0);
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omap_cfg_reg(F19_1610_KBR1);
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omap_cfg_reg(H14_1610_KBR2);
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omap_cfg_reg(E20_1610_KBR3);
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omap_cfg_reg(E19_1610_KBR4);
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omap_cfg_reg(N19_1610_KBR5);
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} else if (machine_is_omap_perseus2() || machine_is_omap_fsample()) {
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omap_cfg_reg(E2_730_KBR0);
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omap_cfg_reg(J7_730_KBR1);
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omap_cfg_reg(E1_730_KBR2);
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omap_cfg_reg(F3_730_KBR3);
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omap_cfg_reg(D2_730_KBR4);
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omap_cfg_reg(C2_730_KBC0);
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omap_cfg_reg(D3_730_KBC1);
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omap_cfg_reg(E4_730_KBC2);
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omap_cfg_reg(F4_730_KBC3);
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omap_cfg_reg(E3_730_KBC4);
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} else if (machine_is_omap_h4()) {
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omap_cfg_reg(T19_24XX_KBR0);
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omap_cfg_reg(R19_24XX_KBR1);
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omap_cfg_reg(V18_24XX_KBR2);
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omap_cfg_reg(M21_24XX_KBR3);
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omap_cfg_reg(E5__24XX_KBR4);
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if (omap_has_menelaus()) {
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omap_cfg_reg(B3__24XX_KBR5);
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omap_cfg_reg(AA4_24XX_KBC2);
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omap_cfg_reg(B13_24XX_KBC6);
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} else {
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omap_cfg_reg(M18_24XX_KBR5);
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omap_cfg_reg(H19_24XX_KBC2);
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omap_cfg_reg(N19_24XX_KBC6);
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}
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omap_cfg_reg(R20_24XX_KBC0);
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omap_cfg_reg(M14_24XX_KBC1);
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omap_cfg_reg(V17_24XX_KBC3);
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omap_cfg_reg(P21_24XX_KBC4);
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omap_cfg_reg(L14_24XX_KBC5);
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}
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}
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#else
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static inline void omap_init_kp(void) {}
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
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#ifdef CONFIG_ARCH_OMAP24XX
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#define OMAP_MMC1_BASE 0x4809c000
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#define OMAP_MMC1_INT INT_24XX_MMC_IRQ
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#else
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#define OMAP_MMC1_BASE 0xfffb7800
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#define OMAP_MMC1_INT INT_MMC
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#endif
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#define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */
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static struct omap_mmc_conf mmc1_conf;
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static u64 mmc1_dmamask = 0xffffffff;
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static struct resource mmc1_resources[] = {
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{
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.start = OMAP_MMC1_BASE,
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.end = OMAP_MMC1_BASE + 0x7f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP_MMC1_INT,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mmc_omap_device1 = {
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.name = "mmci-omap",
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.id = 1,
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.dev = {
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.dma_mask = &mmc1_dmamask,
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.platform_data = &mmc1_conf,
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},
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.num_resources = ARRAY_SIZE(mmc1_resources),
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.resource = mmc1_resources,
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};
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#ifdef CONFIG_ARCH_OMAP16XX
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static struct omap_mmc_conf mmc2_conf;
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static u64 mmc2_dmamask = 0xffffffff;
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static struct resource mmc2_resources[] = {
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{
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.start = OMAP_MMC2_BASE,
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.end = OMAP_MMC2_BASE + 0x7f,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_1610_MMC2,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device mmc_omap_device2 = {
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.name = "mmci-omap",
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.id = 2,
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.dev = {
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.dma_mask = &mmc2_dmamask,
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.platform_data = &mmc2_conf,
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},
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.num_resources = ARRAY_SIZE(mmc2_resources),
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.resource = mmc2_resources,
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};
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#endif
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static void __init omap_init_mmc(void)
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{
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const struct omap_mmc_config *mmc_conf;
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const struct omap_mmc_conf *mmc;
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/* NOTE: assumes MMC was never (wrongly) enabled */
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mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
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if (!mmc_conf)
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return;
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/* block 1 is always available and has just one pinout option */
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mmc = &mmc_conf->mmc[0];
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if (mmc->enabled) {
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(H18_24XX_MMC_CMD);
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omap_cfg_reg(H15_24XX_MMC_CLKI);
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omap_cfg_reg(G19_24XX_MMC_CLKO);
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omap_cfg_reg(F20_24XX_MMC_DAT0);
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omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
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omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
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} else {
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omap_cfg_reg(MMC_CMD);
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omap_cfg_reg(MMC_CLK);
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omap_cfg_reg(MMC_DAT0);
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if (cpu_is_omap1710()) {
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omap_cfg_reg(M15_1710_MMC_CLKI);
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omap_cfg_reg(P19_1710_MMC_CMDDIR);
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omap_cfg_reg(P20_1710_MMC_DATDIR0);
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}
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}
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if (mmc->wire4) {
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(H14_24XX_MMC_DAT1);
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omap_cfg_reg(E19_24XX_MMC_DAT2);
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omap_cfg_reg(D19_24XX_MMC_DAT3);
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omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
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omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
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omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
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} else {
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omap_cfg_reg(MMC_DAT1);
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/* NOTE: DAT2 can be on W10 (here) or M15 */
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if (!mmc->nomux)
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omap_cfg_reg(MMC_DAT2);
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omap_cfg_reg(MMC_DAT3);
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}
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}
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mmc1_conf = *mmc;
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(void) platform_device_register(&mmc_omap_device1);
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}
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#ifdef CONFIG_ARCH_OMAP16XX
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/* block 2 is on newer chips, and has many pinout options */
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mmc = &mmc_conf->mmc[1];
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if (mmc->enabled) {
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if (!mmc->nomux) {
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omap_cfg_reg(Y8_1610_MMC2_CMD);
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omap_cfg_reg(Y10_1610_MMC2_CLK);
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omap_cfg_reg(R18_1610_MMC2_CLKIN);
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omap_cfg_reg(W8_1610_MMC2_DAT0);
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if (mmc->wire4) {
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omap_cfg_reg(V8_1610_MMC2_DAT1);
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omap_cfg_reg(W15_1610_MMC2_DAT2);
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omap_cfg_reg(R10_1610_MMC2_DAT3);
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}
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/* These are needed for the level shifter */
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omap_cfg_reg(V9_1610_MMC2_CMDDIR);
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omap_cfg_reg(V5_1610_MMC2_DATDIR0);
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omap_cfg_reg(W19_1610_MMC2_DATDIR1);
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}
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/* Feedback clock must be set on OMAP-1710 MMC2 */
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if (cpu_is_omap1710())
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omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
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MOD_CONF_CTRL_1);
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mmc2_conf = *mmc;
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(void) platform_device_register(&mmc_omap_device2);
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}
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#endif
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return;
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}
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#else
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static inline void omap_init_mmc(void) {}
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#endif
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/*-------------------------------------------------------------------------*/
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/* Numbering for the SPI-capable controllers when used for SPI:
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* spi = 1
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* uwire = 2
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* mmc1..2 = 3..4
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* mcbsp1..3 = 5..7
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*/
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#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
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#define OMAP_UWIRE_BASE 0xfffb3000
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static struct resource uwire_resources[] = {
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{
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.start = OMAP_UWIRE_BASE,
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.end = OMAP_UWIRE_BASE + 0x20,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap_uwire_device = {
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.name = "omap_uwire",
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.id = -1,
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.num_resources = ARRAY_SIZE(uwire_resources),
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.resource = uwire_resources,
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};
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static void omap_init_uwire(void)
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{
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/* FIXME define and use a boot tag; not all boards will be hooking
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* up devices to the microwire controller, and multi-board configs
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* mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
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*/
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/* board-specific code must configure chipselects (only a few
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* are normally used) and SCLK/SDI/SDO (each has two choices).
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*/
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(void) platform_device_register(&omap_uwire_device);
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}
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#else
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static inline void omap_init_uwire(void) {}
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
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#ifdef CONFIG_ARCH_OMAP24XX
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#define OMAP_WDT_BASE 0x48022000
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#else
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#define OMAP_WDT_BASE 0xfffeb000
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#endif
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static struct resource wdt_resources[] = {
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{
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.start = OMAP_WDT_BASE,
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.end = OMAP_WDT_BASE + 0x4f,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap_wdt_device = {
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.name = "omap_wdt",
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.id = -1,
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.num_resources = ARRAY_SIZE(wdt_resources),
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.resource = wdt_resources,
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};
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static void omap_init_wdt(void)
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{
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(void) platform_device_register(&omap_wdt_device);
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}
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#else
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static inline void omap_init_wdt(void) {}
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#endif
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/*-------------------------------------------------------------------------*/
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#if defined(CONFIG_OMAP_RNG) || defined(CONFIG_OMAP_RNG_MODULE)
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#ifdef CONFIG_ARCH_OMAP24XX
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#define OMAP_RNG_BASE 0x480A0000
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#else
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#define OMAP_RNG_BASE 0xfffe5000
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#endif
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static struct resource rng_resources[] = {
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{
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.start = OMAP_RNG_BASE,
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.end = OMAP_RNG_BASE + 0x4f,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device omap_rng_device = {
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.name = "omap_rng",
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.id = -1,
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.num_resources = ARRAY_SIZE(rng_resources),
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.resource = rng_resources,
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};
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static void omap_init_rng(void)
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{
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(void) platform_device_register(&omap_rng_device);
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}
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#else
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static inline void omap_init_rng(void) {}
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#endif
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/*
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* This gets called after board-specific INIT_MACHINE, and initializes most
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* on-chip peripherals accessible on this board (except for few like USB):
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*
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* (a) Does any "standard config" pin muxing needed. Board-specific
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* code will have muxed GPIO pins and done "nonstandard" setup;
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* that code could live in the boot loader.
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* (b) Populating board-specific platform_data with the data drivers
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* rely on to handle wiring variations.
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* (c) Creating platform devices as meaningful on this board and
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* with this kernel configuration.
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*
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* Claiming GPIOs, and setting their direction and initial values, is the
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* responsibility of the device drivers. So is responding to probe().
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*
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* Board-specific knowlege like creating devices or pin setup is to be
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* kept out of drivers as much as possible. In particular, pin setup
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* may be handled by the boot loader, and drivers should expect it will
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* normally have been done by the time they're probed.
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*/
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static int __init omap_init_devices(void)
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{
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/* please keep these calls, and their implementations above,
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* in alphabetical order so they're easier to sort through.
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*/
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omap_init_i2c();
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omap_init_kp();
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omap_init_mmc();
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omap_init_uwire();
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omap_init_wdt();
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omap_init_rng();
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return 0;
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}
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arch_initcall(omap_init_devices);
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