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333 lines
10 KiB
333 lines
10 KiB
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* Do not include directly; use <asm/atomic.h>.
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*/
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#ifndef _ASM_TILE_ATOMIC_32_H
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#define _ASM_TILE_ATOMIC_32_H
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#include <arch/chip.h>
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#ifndef __ASSEMBLY__
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/* Tile-specific routines to support <asm/atomic.h>. */
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int _atomic_xchg(atomic_t *v, int n);
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int _atomic_xchg_add(atomic_t *v, int i);
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int _atomic_xchg_add_unless(atomic_t *v, int a, int u);
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int _atomic_cmpxchg(atomic_t *v, int o, int n);
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/**
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* atomic_xchg - atomically exchange contents of memory with a new value
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* @v: pointer of type atomic_t
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* @i: integer value to store in memory
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*
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* Atomically sets @v to @i and returns old @v
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*/
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static inline int atomic_xchg(atomic_t *v, int n)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic_xchg(v, n);
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}
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/**
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* atomic_cmpxchg - atomically exchange contents of memory if it matches
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* @v: pointer of type atomic_t
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* @o: old value that memory should have
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* @n: new value to write to memory if it matches
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*
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* Atomically checks if @v holds @o and replaces it with @n if so.
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* Returns the old value at @v.
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*/
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static inline int atomic_cmpxchg(atomic_t *v, int o, int n)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic_cmpxchg(v, o, n);
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}
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/**
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* atomic_add - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v.
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*/
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static inline void atomic_add(int i, atomic_t *v)
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{
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_atomic_xchg_add(v, i);
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}
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/**
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* atomic_add_return - add integer and return
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* @v: pointer of type atomic_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns @i + @v
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*/
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic_xchg_add(v, i) + i;
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}
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/**
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* atomic_add_unless - add unless the number is already a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as @v was not already @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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static inline int atomic_add_unless(atomic_t *v, int a, int u)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic_xchg_add_unless(v, a, u) != u;
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}
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/**
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* atomic_set - set atomic variable
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* @v: pointer of type atomic_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*
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* atomic_set() can't be just a raw store, since it would be lost if it
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* fell between the load and store of one of the other atomic ops.
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*/
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static inline void atomic_set(atomic_t *v, int n)
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{
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_atomic_xchg(v, n);
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}
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#define xchg(ptr, x) ((typeof(*(ptr))) \
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((sizeof(*(ptr)) == sizeof(atomic_t)) ? \
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atomic_xchg((atomic_t *)(ptr), (long)(x)) : \
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__xchg_called_with_bad_pointer()))
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#define cmpxchg(ptr, o, n) ((typeof(*(ptr))) \
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((sizeof(*(ptr)) == sizeof(atomic_t)) ? \
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atomic_cmpxchg((atomic_t *)(ptr), (long)(o), (long)(n)) : \
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__cmpxchg_called_with_bad_pointer()))
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/* A 64bit atomic type */
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typedef struct {
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u64 __aligned(8) counter;
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} atomic64_t;
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#define ATOMIC64_INIT(val) { (val) }
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u64 _atomic64_xchg(atomic64_t *v, u64 n);
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u64 _atomic64_xchg_add(atomic64_t *v, u64 i);
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u64 _atomic64_xchg_add_unless(atomic64_t *v, u64 a, u64 u);
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u64 _atomic64_cmpxchg(atomic64_t *v, u64 o, u64 n);
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/**
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* atomic64_read - read atomic variable
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* @v: pointer of type atomic64_t
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*
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* Atomically reads the value of @v.
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*/
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static inline u64 atomic64_read(const atomic64_t *v)
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{
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/*
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* Requires an atomic op to read both 32-bit parts consistently.
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* Casting away const is safe since the atomic support routines
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* do not write to memory if the value has not been modified.
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*/
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return _atomic64_xchg_add((atomic64_t *)v, 0);
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}
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/**
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* atomic64_xchg - atomically exchange contents of memory with a new value
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* @v: pointer of type atomic64_t
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* @i: integer value to store in memory
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*
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* Atomically sets @v to @i and returns old @v
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*/
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static inline u64 atomic64_xchg(atomic64_t *v, u64 n)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic64_xchg(v, n);
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}
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/**
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* atomic64_cmpxchg - atomically exchange contents of memory if it matches
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* @v: pointer of type atomic64_t
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* @o: old value that memory should have
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* @n: new value to write to memory if it matches
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*
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* Atomically checks if @v holds @o and replaces it with @n if so.
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* Returns the old value at @v.
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*/
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static inline u64 atomic64_cmpxchg(atomic64_t *v, u64 o, u64 n)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic64_cmpxchg(v, o, n);
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}
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/**
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* atomic64_add - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic64_t
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*
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* Atomically adds @i to @v.
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*/
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static inline void atomic64_add(u64 i, atomic64_t *v)
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{
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_atomic64_xchg_add(v, i);
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}
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/**
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* atomic64_add_return - add integer and return
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* @v: pointer of type atomic64_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns @i + @v
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*/
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static inline u64 atomic64_add_return(u64 i, atomic64_t *v)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic64_xchg_add(v, i) + i;
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}
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/**
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* atomic64_add_unless - add unless the number is already a given value
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* @v: pointer of type atomic64_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as @v was not already @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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static inline u64 atomic64_add_unless(atomic64_t *v, u64 a, u64 u)
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{
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smp_mb(); /* barrier for proper semantics */
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return _atomic64_xchg_add_unless(v, a, u) != u;
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}
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/**
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* atomic64_set - set atomic variable
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* @v: pointer of type atomic64_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*
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* atomic64_set() can't be just a raw store, since it would be lost if it
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* fell between the load and store of one of the other atomic ops.
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*/
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static inline void atomic64_set(atomic64_t *v, u64 n)
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{
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_atomic64_xchg(v, n);
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}
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#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
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#define atomic64_inc(v) atomic64_add(1LL, (v))
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#define atomic64_inc_return(v) atomic64_add_return(1LL, (v))
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#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
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#define atomic64_sub_return(i, v) atomic64_add_return(-(i), (v))
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#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0)
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#define atomic64_sub(i, v) atomic64_add(-(i), (v))
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#define atomic64_dec(v) atomic64_sub(1LL, (v))
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#define atomic64_dec_return(v) atomic64_sub_return(1LL, (v))
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#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)
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/*
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* We need to barrier before modifying the word, since the _atomic_xxx()
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* routines just tns the lock and then read/modify/write of the word.
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* But after the word is updated, the routine issues an "mf" before returning,
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* and since it's a function call, we don't even need a compiler barrier.
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*/
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#define smp_mb__before_atomic_dec() smp_mb()
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#define smp_mb__before_atomic_inc() smp_mb()
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#define smp_mb__after_atomic_dec() do { } while (0)
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#define smp_mb__after_atomic_inc() do { } while (0)
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#endif /* !__ASSEMBLY__ */
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/*
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* Internal definitions only beyond this point.
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*/
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#define ATOMIC_LOCKS_FOUND_VIA_TABLE() \
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(!CHIP_HAS_CBOX_HOME_MAP() && defined(CONFIG_SMP))
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#if ATOMIC_LOCKS_FOUND_VIA_TABLE()
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/* Number of entries in atomic_lock_ptr[]. */
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#define ATOMIC_HASH_L1_SHIFT 6
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#define ATOMIC_HASH_L1_SIZE (1 << ATOMIC_HASH_L1_SHIFT)
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/* Number of locks in each struct pointed to by atomic_lock_ptr[]. */
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#define ATOMIC_HASH_L2_SHIFT (CHIP_L2_LOG_LINE_SIZE() - 2)
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#define ATOMIC_HASH_L2_SIZE (1 << ATOMIC_HASH_L2_SHIFT)
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#else /* ATOMIC_LOCKS_FOUND_VIA_TABLE() */
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/*
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* Number of atomic locks in atomic_locks[]. Must be a power of two.
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* There is no reason for more than PAGE_SIZE / 8 entries, since that
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* is the maximum number of pointer bits we can use to index this.
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* And we cannot have more than PAGE_SIZE / 4, since this has to
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* fit on a single page and each entry takes 4 bytes.
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*/
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#define ATOMIC_HASH_SHIFT (PAGE_SHIFT - 3)
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#define ATOMIC_HASH_SIZE (1 << ATOMIC_HASH_SHIFT)
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#ifndef __ASSEMBLY__
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extern int atomic_locks[];
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#endif
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#endif /* ATOMIC_LOCKS_FOUND_VIA_TABLE() */
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/*
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* All the code that may fault while holding an atomic lock must
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* place the pointer to the lock in ATOMIC_LOCK_REG so the fault code
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* can correctly release and reacquire the lock. Note that we
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* mention the register number in a comment in "lib/atomic_asm.S" to help
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* assembly coders from using this register by mistake, so if it
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* is changed here, change that comment as well.
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*/
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#define ATOMIC_LOCK_REG 20
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#define ATOMIC_LOCK_REG_NAME r20
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#ifndef __ASSEMBLY__
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/* Called from setup to initialize a hash table to point to per_cpu locks. */
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void __init_atomic_per_cpu(void);
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#ifdef CONFIG_SMP
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/* Support releasing the atomic lock in do_page_fault_ics(). */
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void __atomic_fault_unlock(int *lock_ptr);
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#endif
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/* Private helper routines in lib/atomic_asm_32.S */
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extern struct __get_user __atomic_cmpxchg(volatile int *p,
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int *lock, int o, int n);
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extern struct __get_user __atomic_xchg(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic_xchg_add(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic_xchg_add_unless(volatile int *p,
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int *lock, int o, int n);
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extern struct __get_user __atomic_or(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic_andn(volatile int *p, int *lock, int n);
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extern struct __get_user __atomic_xor(volatile int *p, int *lock, int n);
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extern u64 __atomic64_cmpxchg(volatile u64 *p, int *lock, u64 o, u64 n);
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extern u64 __atomic64_xchg(volatile u64 *p, int *lock, u64 n);
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extern u64 __atomic64_xchg_add(volatile u64 *p, int *lock, u64 n);
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extern u64 __atomic64_xchg_add_unless(volatile u64 *p,
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int *lock, u64 o, u64 n);
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_TILE_ATOMIC_32_H */
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