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92 lines
2.8 KiB
92 lines
2.8 KiB
/*
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* include/asm-arm/arch-at91rm9200/hardware.h
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*
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* Copyright (C) 2003 SAN People
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* Copyright (C) 2003 ATMEL
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#ifndef __ASM_ARCH_HARDWARE_H
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#define __ASM_ARCH_HARDWARE_H
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#include <asm/sizes.h>
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#include <asm/arch/at91rm9200.h>
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#include <asm/arch/at91rm9200_sys.h>
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/*
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* Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
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* to 0xFEFA0000 .. 0xFF000000. (384Kb)
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*/
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#define AT91_IO_PHYS_BASE 0xFFFA0000
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#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
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#define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE)
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/* Convert a physical IO address to virtual IO address */
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#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
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/*
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* Virtual to Physical Address mapping for IO devices.
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*/
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#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
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#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91_BASE_SPI)
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#define AT91_VA_BASE_SSC2 AT91_IO_P2V(AT91_BASE_SSC2)
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#define AT91_VA_BASE_SSC1 AT91_IO_P2V(AT91_BASE_SSC1)
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#define AT91_VA_BASE_SSC0 AT91_IO_P2V(AT91_BASE_SSC0)
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#define AT91_VA_BASE_US3 AT91_IO_P2V(AT91_BASE_US3)
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#define AT91_VA_BASE_US2 AT91_IO_P2V(AT91_BASE_US2)
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#define AT91_VA_BASE_US1 AT91_IO_P2V(AT91_BASE_US1)
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#define AT91_VA_BASE_US0 AT91_IO_P2V(AT91_BASE_US0)
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#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91_BASE_EMAC)
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#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91_BASE_TWI)
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#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91_BASE_MCI)
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#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91_BASE_UDP)
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#define AT91_VA_BASE_TCB1 AT91_IO_P2V(AT91_BASE_TCB1)
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#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0)
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/* Internal SRAM */
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#define AT91_BASE_SRAM 0x00200000 /* Internal SRAM base address */
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#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */
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/* Serial ports */
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#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */
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/* FLASH */
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#define AT91_FLASH_BASE 0x10000000 /* NCS0: Flash physical base address */
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/* SDRAM */
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#define AT91_SDRAM_BASE 0x20000000 /* NCS1: SDRAM physical base address */
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/* SmartMedia */
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#define AT91_SMARTMEDIA_BASE 0x40000000 /* NCS3: Smartmedia physical base address */
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/* Multi-Master Memory controller */
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#define AT91_UHP_BASE 0x00300000 /* USB Host controller */
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/* Clocks */
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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#ifndef __ASSEMBLY__
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#include <asm/io.h>
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static inline unsigned int at91_sys_read(unsigned int reg_offset)
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{
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void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
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return readl(addr + reg_offset);
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}
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static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
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{
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void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
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writel(value, addr + reg_offset);
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}
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#endif
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#endif
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