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66 lines
1.9 KiB
66 lines
1.9 KiB
/**************************************************************************
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* Copyright (C) 2005, Silicon Graphics, Inc. *
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* *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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* *
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**************************************************************************/
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#ifndef _ASM_IA64_SN_CE_PROVIDER_H
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#define _ASM_IA64_SN_CE_PROVIDER_H
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#include <asm/sn/pcibus_provider_defs.h>
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#include <asm/sn/tioce.h>
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/*
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* Common TIOCE structure shared between the prom and kernel
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*
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* DO NOT CHANGE THIS STRUCT WITHOUT MAKING CORRESPONDING CHANGES TO THE
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* PROM VERSION.
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*/
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struct tioce_common {
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struct pcibus_bussoft ce_pcibus; /* common pciio header */
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uint32_t ce_rev;
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uint64_t ce_kernel_private;
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uint64_t ce_prom_private;
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};
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struct tioce_kernel {
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struct tioce_common *ce_common;
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spinlock_t ce_lock;
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struct list_head ce_dmamap_list;
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uint64_t ce_ate40_shadow[TIOCE_NUM_M40_ATES];
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uint64_t ce_ate3240_shadow[TIOCE_NUM_M3240_ATES];
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uint32_t ce_ate3240_pagesize;
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uint8_t ce_port1_secondary;
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/* per-port resources */
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struct {
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int dirmap_refcnt;
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uint64_t dirmap_shadow;
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} ce_port[TIOCE_NUM_PORTS];
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};
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struct tioce_dmamap {
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struct list_head ce_dmamap_list; /* headed by tioce_kernel */
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uint32_t refcnt;
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uint64_t nbytes; /* # bytes mapped */
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uint64_t ct_start; /* coretalk start address */
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uint64_t pci_start; /* bus start address */
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uint64_t *ate_hw; /* hw ptr of first ate in map */
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uint64_t *ate_shadow; /* shadow ptr of firat ate */
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uint16_t ate_count; /* # ate's in the map */
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};
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extern int tioce_init_provider(void);
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#endif /* __ASM_IA64_SN_CE_PROVIDER_H */
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