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152 lines
3.1 KiB
152 lines
3.1 KiB
#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/physmap.h>
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#include <asm/machvec.h>
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#include <mach-se/mach/se7343.h>
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#include <asm/heartbeat.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = 0x10000000,
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.end = 0x1000000F,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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/*
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* shared with other devices via externel
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* interrupt controller in FPGA...
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*/
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.start = SMC_IRQ,
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.end = SMC_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct resource heartbeat_resources[] = {
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[0] = {
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.start = PA_LED,
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.end = PA_LED,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct heartbeat_data heartbeat_data = {
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.regsize = 16,
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.dev = {
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.platform_data = &heartbeat_data,
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},
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.num_resources = ARRAY_SIZE(heartbeat_resources),
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.resource = heartbeat_resources,
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};
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static struct mtd_partition nor_flash_partitions[] = {
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{
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.name = "loader",
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.offset = 0x00000000,
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.size = 128 * 1024,
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},
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND,
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.size = 31 * 1024 * 1024,
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},
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{
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.name = "data",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct physmap_flash_data nor_flash_data = {
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.width = 2,
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.parts = nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(nor_flash_partitions),
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};
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static struct resource nor_flash_resources[] = {
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[0] = {
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.start = 0x00000000,
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.end = 0x01ffffff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct platform_device nor_flash_device = {
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.name = "physmap-flash",
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.dev = {
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.platform_data = &nor_flash_data,
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},
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.num_resources = ARRAY_SIZE(nor_flash_resources),
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.resource = nor_flash_resources,
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};
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static struct platform_device *sh7343se_platform_devices[] __initdata = {
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&smc91x_device,
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&heartbeat_device,
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&nor_flash_device,
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};
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static int __init sh7343se_devices_setup(void)
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{
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return platform_add_devices(sh7343se_platform_devices,
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ARRAY_SIZE(sh7343se_platform_devices));
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}
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device_initcall(sh7343se_devices_setup);
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/*
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* Initialize the board
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*/
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static void __init sh7343se_setup(char **cmdline_p)
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{
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ctrl_outw(0xf900, FPGA_OUT); /* FPGA */
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ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */
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ctrl_outw(0x0020, PORT_PSELD);
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printk(KERN_INFO "MS7343CP01 Setup...done\n");
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_7343se __initmv = {
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.mv_name = "SolutionEngine 7343",
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.mv_setup = sh7343se_setup,
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.mv_nr_irqs = 108,
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.mv_inb = sh7343se_inb,
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.mv_inw = sh7343se_inw,
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.mv_inl = sh7343se_inl,
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.mv_outb = sh7343se_outb,
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.mv_outw = sh7343se_outw,
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.mv_outl = sh7343se_outl,
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.mv_inb_p = sh7343se_inb_p,
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.mv_inw_p = sh7343se_inw,
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.mv_inl_p = sh7343se_inl,
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.mv_outb_p = sh7343se_outb_p,
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.mv_outw_p = sh7343se_outw,
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.mv_outl_p = sh7343se_outl,
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.mv_insb = sh7343se_insb,
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.mv_insw = sh7343se_insw,
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.mv_insl = sh7343se_insl,
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.mv_outsb = sh7343se_outsb,
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.mv_outsw = sh7343se_outsw,
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.mv_outsl = sh7343se_outsl,
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.mv_init_irq = init_7343se_IRQ,
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};
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