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Linus Walleij f5ff9a115e clk: ux500: fix erroneous bit assignment ... Due to a typo or similar, the peripheral group 2 clock 11 gate was set to bit 1 instead of bit 11. We need to fix this to be able to set the correct enable bit in the device tree: when trying to correct the bit assignment in the device tree, the system would hang. Cc: Mike Turquette <mturquette@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>		11 years ago
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Makefile	clk: ux500: Copy u8500_clk_init() ready for DT enablement	12 years ago
abx500-clk.c	clk: ux500: abx500-clk: rename ux500 audio codec aliases	12 years ago
clk-prcc.c	ARM: ux500: get rid of <mach/[hardware|db8500-regs].h>	12 years ago
clk-prcmu.c	clk: ux500: Fix prcmu clocks registration	12 years ago
clk-sysctrl.c	clk: ux500: clk-sysctrl: handle clocks with no parents	12 years ago
clk.h	clk: ux500: fix mismatched types	12 years ago
u8500_clk.c	clk: ux500: Provide device enumeration number suffix for SMSC911x	12 years ago
u8500_of_clk.c	clk: ux500: fix erroneous bit assignment	11 years ago
u8540_clk.c	clk: ux500: Remove BML8580 clock	12 years ago
u9540_clk.c	clk: ux500: Pass clock base adresses in initcall for u8540 and u9540	12 years ago