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Marc Zyngier f142e5eeb7 arm64: KVM: add missing dsb before invalidating Stage-2 TLBs ... When performing a Stage-2 TLB invalidation, it is necessary to make sure the write to the page tables is observable by all CPUs. For this purpose, add dsb instructions to __kvm_tlb_flush_vmid_ipa and __kvm_flush_vm_context before doing the TLB invalidation itself. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>		12 years ago
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Kconfig	arm64: KVM: Kconfig integration	12 years ago
Makefile	arm64: KVM: 32bit conditional execution emulation	12 years ago
emulate.c	arm64: KVM: 32bit conditional execution emulation	12 years ago
guest.c	arm64: KVM: enable initialization of a 32bit vcpu	12 years ago
handle_exit.c	arm64: KVM: 32bit handling of coprocessor traps	12 years ago
hyp-init.S	arm64: KVM: hypervisor initialization code	12 years ago
hyp.S	arm64: KVM: add missing dsb before invalidating Stage-2 TLBs	12 years ago
inject_fault.c	arm64: KVM: 32bit guest fault injection	12 years ago
regmap.c	arm64: KVM: 32bit GP register access	12 years ago
reset.c	arm64: KVM: enable initialization of a 32bit vcpu	12 years ago
sys_regs.c	arm64: KVM: perform save/restore of PAR_EL1	12 years ago
sys_regs.h	…
sys_regs_generic_v8.c	arm64: KVM: CPU specific 32bit coprocessor access	12 years ago