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75 lines
1.5 KiB
75 lines
1.5 KiB
/*
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* arch/arm/mach-iop32x/irq.c
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*
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* Generic IOP32X IRQ handling functionality
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*
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* Author: Rory Bolt <rorybolt@pacbell.net>
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* Copyright (C) 2002 Rory Bolt
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <asm/mach/irq.h>
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#include <asm/irq.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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static u32 iop32x_mask;
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static void intctl_write(u32 val)
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{
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asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
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}
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static void intstr_write(u32 val)
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{
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asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val));
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}
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static void
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iop32x_irq_mask(unsigned int irq)
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{
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iop32x_mask &= ~(1 << irq);
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intctl_write(iop32x_mask);
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}
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static void
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iop32x_irq_unmask(unsigned int irq)
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{
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iop32x_mask |= 1 << irq;
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intctl_write(iop32x_mask);
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}
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struct irq_chip ext_chip = {
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.name = "IOP32x",
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.ack = iop32x_irq_mask,
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.mask = iop32x_irq_mask,
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.unmask = iop32x_irq_unmask,
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};
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void __init iop32x_init_irq(void)
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{
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int i;
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iop_init_cp6_handler();
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intctl_write(0);
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intstr_write(0);
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if (machine_is_glantank() ||
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machine_is_iq80321() ||
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machine_is_iq31244() ||
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machine_is_n2100() ||
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machine_is_em7210())
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*IOP3XX_PCIIRSR = 0x0f;
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for (i = 0; i < NR_IRQS; i++) {
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set_irq_chip(i, &ext_chip);
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set_irq_handler(i, handle_level_irq);
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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}
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}
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