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132 lines
3.2 KiB
132 lines
3.2 KiB
/* Copyright (c) 2015-2018, 2020, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MSM_TZ_SMMU_H__
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#define __MSM_TZ_SMMU_H__
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#include <linux/device.h>
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#include <linux/iommu.h>
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enum tz_smmu_device_id {
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TZ_DEVICE_START = 0,
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TZ_DEVICE_VIDEO = 0,
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TZ_DEVICE_MDSS,
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TZ_DEVICE_LPASS,
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TZ_DEVICE_MDSS_BOOT,
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TZ_DEVICE_USB1_HS,
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TZ_DEVICE_OCMEM,
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TZ_DEVICE_LPASS_CORE,
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TZ_DEVICE_VPU,
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TZ_DEVICE_COPSS_SMMU,
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TZ_DEVICE_USB3_0,
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TZ_DEVICE_USB3_1,
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TZ_DEVICE_PCIE_0,
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TZ_DEVICE_PCIE_1,
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TZ_DEVICE_BCSS,
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TZ_DEVICE_VCAP,
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TZ_DEVICE_PCIE20,
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TZ_DEVICE_IPA,
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TZ_DEVICE_APPS,
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TZ_DEVICE_GPU,
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TZ_DEVICE_UFS,
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TZ_DEVICE_ICE,
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TZ_DEVICE_ROT,
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TZ_DEVICE_VFE,
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TZ_DEVICE_ANOC0,
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TZ_DEVICE_ANOC1,
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TZ_DEVICE_ANOC2,
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TZ_DEVICE_CPP,
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TZ_DEVICE_JPEG,
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TZ_DEVICE_MAX,
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};
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#ifdef CONFIG_MSM_TZ_SMMU
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int msm_tz_smmu_atos_start(struct device *dev, int cb_num);
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int msm_tz_smmu_atos_end(struct device *dev, int cb_num);
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enum tz_smmu_device_id msm_dev_to_device_id(struct device *dev);
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int msm_tz_set_cb_format(enum tz_smmu_device_id sec_id, int cbndx);
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int msm_iommu_sec_pgtbl_init(void);
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int register_iommu_sec_ptbl(void);
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bool arm_smmu_skip_write(void __iomem *addr);
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extern void *get_smmu_from_addr(struct iommu_device *iommu, void __iomem *addr);
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extern void *arm_smmu_get_by_addr(void __iomem *addr);
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/* Donot write to smmu global space with CONFIG_MSM_TZ_SMMU */
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#undef writel_relaxed
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#undef writeq_relaxed
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#define writel_relaxed(v, c) do { \
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if (!arm_smmu_skip_write(c)) \
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((void)__raw_writel((u32)cpu_to_le32(v), (c))); \
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} while (0)
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#define writeq_relaxed(v, c) do { \
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if (!arm_smmu_skip_write(c)) \
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((void)__raw_writeq((u64)cpu_to_le64(v), (c))); \
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} while (0)
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#else
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static inline int msm_tz_smmu_atos_start(struct device *dev, int cb_num)
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{
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return 0;
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}
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static inline int msm_tz_smmu_atos_end(struct device *dev, int cb_num)
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{
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return 0;
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}
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static inline enum tz_smmu_device_id msm_dev_to_device_id(struct device *dev)
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{
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return -EINVAL;
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}
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static inline int msm_tz_set_cb_format(enum tz_smmu_device_id sec_id,
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int cbndx)
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{
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return -EINVAL;
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}
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static inline int msm_iommu_sec_pgtbl_init(void)
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{
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return -EINVAL;
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}
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static inline int register_iommu_sec_ptbl(void)
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{
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return -EINVAL;
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}
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static inline size_t msm_secure_smmu_unmap(struct iommu_domain *domain,
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unsigned long iova,
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size_t size)
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{
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return -EINVAL;
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}
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static inline size_t msm_secure_smmu_map_sg(struct iommu_domain *domain,
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unsigned long iova,
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struct scatterlist *sg,
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unsigned int nents, int prot)
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{
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return -EINVAL;
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}
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static inline int msm_secure_smmu_map(struct iommu_domain *domain,
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unsigned long iova,
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phys_addr_t paddr, size_t size, int prot)
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{
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return -EINVAL;
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}
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#endif /* CONFIG_MSM_TZ_SMMU */
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#endif /* __MSM_TZ_SMMU_H__ */
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