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174 lines
3.9 KiB
174 lines
3.9 KiB
/*
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* Machine specific setup for generic
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*/
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <asm/acpi.h>
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#include <asm/arch_hooks.h>
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#include <asm/e820.h>
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#include <asm/setup.h>
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#include <mach_ipi.h>
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#ifdef CONFIG_HOTPLUG_CPU
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#define DEFAULT_SEND_IPI (1)
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#else
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#define DEFAULT_SEND_IPI (0)
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#endif
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int no_broadcast = DEFAULT_SEND_IPI;
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/**
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* pre_intr_init_hook - initialisation prior to setting up interrupt vectors
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*
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* Description:
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* Perform any necessary interrupt initialisation prior to setting up
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* the "ordinary" interrupt call gates. For legacy reasons, the ISA
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* interrupts should be initialised here if the machine emulates a PC
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* in any way.
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**/
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void __init pre_intr_init_hook(void)
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{
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if (x86_quirks->arch_pre_intr_init) {
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if (x86_quirks->arch_pre_intr_init())
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return;
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}
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init_ISA_irqs();
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}
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/*
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* IRQ2 is cascade interrupt to second interrupt controller
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*/
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static struct irqaction irq2 = {
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.handler = no_action,
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.mask = CPU_MASK_NONE,
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.name = "cascade",
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};
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/**
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* intr_init_hook - post gate setup interrupt initialisation
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*
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* Description:
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* Fill in any interrupts that may have been left out by the general
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* init_IRQ() routine. interrupts having to do with the machine rather
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* than the devices on the I/O bus (like APIC interrupts in intel MP
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* systems) are started here.
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**/
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void __init intr_init_hook(void)
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{
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if (x86_quirks->arch_intr_init) {
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if (x86_quirks->arch_intr_init())
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return;
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}
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if (!acpi_ioapic)
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setup_irq(2, &irq2);
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}
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/**
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* pre_setup_arch_hook - hook called prior to any setup_arch() execution
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*
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* Description:
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* generally used to activate any machine specific identification
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* routines that may be needed before setup_arch() runs. On Voyager
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* this is used to get the board revision and type.
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**/
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void __init pre_setup_arch_hook(void)
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{
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}
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/**
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* trap_init_hook - initialise system specific traps
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*
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* Description:
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* Called as the final act of trap_init(). Used in VISWS to initialise
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* the various board specific APIC traps.
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**/
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void __init trap_init_hook(void)
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{
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if (x86_quirks->arch_trap_init) {
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if (x86_quirks->arch_trap_init())
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return;
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}
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
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.mask = CPU_MASK_NONE,
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.name = "timer"
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};
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/**
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* pre_time_init_hook - do any specific initialisations before.
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*
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**/
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void __init pre_time_init_hook(void)
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{
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if (x86_quirks->arch_pre_time_init)
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x86_quirks->arch_pre_time_init();
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}
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/**
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* time_init_hook - do any specific initialisations for the system timer.
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*
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* Description:
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* Must plug the system timer interrupt source at HZ into the IRQ listed
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* in irq_vectors.h:TIMER_IRQ
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**/
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void __init time_init_hook(void)
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{
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if (x86_quirks->arch_time_init) {
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/*
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* A nonzero return code does not mean failure, it means
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* that the architecture quirk does not want any
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* generic (timer) setup to be performed after this:
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*/
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if (x86_quirks->arch_time_init())
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return;
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}
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irq0.mask = cpumask_of_cpu(0);
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setup_irq(0, &irq0);
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}
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#ifdef CONFIG_MCA
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/**
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* mca_nmi_hook - hook into MCA specific NMI chain
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*
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* Description:
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* The MCA (Microchannel Architecture) has an NMI chain for NMI sources
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* along the MCA bus. Use this to hook into that chain if you will need
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* it.
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**/
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void mca_nmi_hook(void)
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{
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/*
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* If I recall correctly, there's a whole bunch of other things that
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* we can do to check for NMI problems, but that's all I know about
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* at the moment.
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*/
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pr_warning("NMI generated from unknown source!\n");
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}
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#endif
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static __init int no_ipi_broadcast(char *str)
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{
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get_option(&str, &no_broadcast);
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pr_info("Using %s mode\n",
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no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
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return 1;
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}
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__setup("no_ipi_broadcast=", no_ipi_broadcast);
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static int __init print_ipi_mode(void)
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{
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pr_info("Using IPI %s mode\n",
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no_broadcast ? "No-Shortcut" : "Shortcut");
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return 0;
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}
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late_initcall(print_ipi_mode);
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