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630 lines
14 KiB
630 lines
14 KiB
/* linux/drivers/char/watchdog/s3c2410_wdt.c
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*
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* Copyright (c) 2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 Watchdog Timer Support
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*
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* Based on, softdog.c by Alan Cox,
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* (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/timer.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/clk.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <linux/cpufreq.h>
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#include <linux/slab.h>
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#include <mach/map.h>
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#undef S3C_VA_WATCHDOG
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#define S3C_VA_WATCHDOG (0)
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#include <plat/regs-watchdog.h>
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#define PFX "s3c2410-wdt: "
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#define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
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#define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
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static int nowayout = WATCHDOG_NOWAYOUT;
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static int tmr_margin = CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME;
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static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT;
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static int soft_noboot;
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static int debug;
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module_param(tmr_margin, int, 0);
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module_param(tmr_atboot, int, 0);
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module_param(nowayout, int, 0);
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module_param(soft_noboot, int, 0);
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module_param(debug, int, 0);
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MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. (default="
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__MODULE_STRING(CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME) ")");
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MODULE_PARM_DESC(tmr_atboot,
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"Watchdog is started at boot time if set to 1, default="
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__MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT));
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, "
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"0 to reboot (default 0)");
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MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)");
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static unsigned long open_lock;
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static struct device *wdt_dev; /* platform device attached to */
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static struct resource *wdt_mem;
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static struct resource *wdt_irq;
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static struct clk *wdt_clock;
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static void __iomem *wdt_base;
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static unsigned int wdt_count;
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static char expect_close;
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static DEFINE_SPINLOCK(wdt_lock);
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/* watchdog control routines */
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#define DBG(msg...) do { \
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if (debug) \
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printk(KERN_INFO msg); \
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} while (0)
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/* functions */
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static void s3c2410wdt_keepalive(void)
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{
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spin_lock(&wdt_lock);
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writel(wdt_count, wdt_base + S3C2410_WTCNT);
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spin_unlock(&wdt_lock);
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}
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static void __s3c2410wdt_stop(void)
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{
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unsigned long wtcon;
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wtcon = readl(wdt_base + S3C2410_WTCON);
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wtcon &= ~(S3C2410_WTCON_ENABLE | S3C2410_WTCON_RSTEN);
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writel(wtcon, wdt_base + S3C2410_WTCON);
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}
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static void s3c2410wdt_stop(void)
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{
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spin_lock(&wdt_lock);
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__s3c2410wdt_stop();
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spin_unlock(&wdt_lock);
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}
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static void s3c2410wdt_start(void)
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{
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unsigned long wtcon;
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spin_lock(&wdt_lock);
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__s3c2410wdt_stop();
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wtcon = readl(wdt_base + S3C2410_WTCON);
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wtcon |= S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128;
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if (soft_noboot) {
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wtcon |= S3C2410_WTCON_INTEN;
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wtcon &= ~S3C2410_WTCON_RSTEN;
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} else {
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wtcon &= ~S3C2410_WTCON_INTEN;
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wtcon |= S3C2410_WTCON_RSTEN;
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}
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DBG("%s: wdt_count=0x%08x, wtcon=%08lx\n",
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__func__, wdt_count, wtcon);
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writel(wdt_count, wdt_base + S3C2410_WTDAT);
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writel(wdt_count, wdt_base + S3C2410_WTCNT);
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writel(wtcon, wdt_base + S3C2410_WTCON);
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spin_unlock(&wdt_lock);
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}
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static inline int s3c2410wdt_is_running(void)
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{
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return readl(wdt_base + S3C2410_WTCON) & S3C2410_WTCON_ENABLE;
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}
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static int s3c2410wdt_set_heartbeat(int timeout)
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{
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unsigned long freq = clk_get_rate(wdt_clock);
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unsigned int count;
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unsigned int divisor = 1;
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unsigned long wtcon;
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if (timeout < 1)
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return -EINVAL;
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freq /= 128;
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count = timeout * freq;
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DBG("%s: count=%d, timeout=%d, freq=%lu\n",
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__func__, count, timeout, freq);
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/* if the count is bigger than the watchdog register,
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then work out what we need to do (and if) we can
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actually make this value
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*/
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if (count >= 0x10000) {
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for (divisor = 1; divisor <= 0x100; divisor++) {
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if ((count / divisor) < 0x10000)
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break;
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}
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if ((count / divisor) >= 0x10000) {
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dev_err(wdt_dev, "timeout %d too big\n", timeout);
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return -EINVAL;
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}
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}
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tmr_margin = timeout;
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DBG("%s: timeout=%d, divisor=%d, count=%d (%08x)\n",
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__func__, timeout, divisor, count, count/divisor);
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count /= divisor;
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wdt_count = count;
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/* update the pre-scaler */
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wtcon = readl(wdt_base + S3C2410_WTCON);
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wtcon &= ~S3C2410_WTCON_PRESCALE_MASK;
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wtcon |= S3C2410_WTCON_PRESCALE(divisor-1);
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writel(count, wdt_base + S3C2410_WTDAT);
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writel(wtcon, wdt_base + S3C2410_WTCON);
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return 0;
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}
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/*
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* /dev/watchdog handling
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*/
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static int s3c2410wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(0, &open_lock))
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return -EBUSY;
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if (nowayout)
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__module_get(THIS_MODULE);
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expect_close = 0;
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/* start the timer */
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s3c2410wdt_start();
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return nonseekable_open(inode, file);
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}
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static int s3c2410wdt_release(struct inode *inode, struct file *file)
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{
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/*
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* Shut off the timer.
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* Lock it in if it's a module and we set nowayout
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*/
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if (expect_close == 42)
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s3c2410wdt_stop();
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else {
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dev_err(wdt_dev, "Unexpected close, not stopping watchdog\n");
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s3c2410wdt_keepalive();
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}
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expect_close = 0;
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clear_bit(0, &open_lock);
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return 0;
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}
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static ssize_t s3c2410wdt_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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/*
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* Refresh the timer.
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*/
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if (len) {
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if (!nowayout) {
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size_t i;
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/* In case it was set long ago */
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expect_close = 0;
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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expect_close = 42;
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}
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}
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s3c2410wdt_keepalive();
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}
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return len;
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}
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#define OPTIONS (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE)
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static const struct watchdog_info s3c2410_wdt_ident = {
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.options = OPTIONS,
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.firmware_version = 0,
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.identity = "S3C2410 Watchdog",
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};
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static long s3c2410wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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int new_margin;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &s3c2410_wdt_ident,
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sizeof(s3c2410_wdt_ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, p);
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case WDIOC_KEEPALIVE:
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s3c2410wdt_keepalive();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_margin, p))
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return -EFAULT;
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if (s3c2410wdt_set_heartbeat(new_margin))
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return -EINVAL;
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s3c2410wdt_keepalive();
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return put_user(tmr_margin, p);
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case WDIOC_GETTIMEOUT:
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return put_user(tmr_margin, p);
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default:
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return -ENOTTY;
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}
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}
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/* kernel interface */
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static const struct file_operations s3c2410wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = s3c2410wdt_write,
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.unlocked_ioctl = s3c2410wdt_ioctl,
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.open = s3c2410wdt_open,
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.release = s3c2410wdt_release,
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};
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static struct miscdevice s3c2410wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &s3c2410wdt_fops,
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};
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/* interrupt handler code */
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static irqreturn_t s3c2410wdt_irq(int irqno, void *param)
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{
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dev_info(wdt_dev, "watchdog timer expired (irq)\n");
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s3c2410wdt_keepalive();
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return IRQ_HANDLED;
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}
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#ifdef CONFIG_CPU_FREQ
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static int s3c2410wdt_cpufreq_transition(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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int ret;
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if (!s3c2410wdt_is_running())
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goto done;
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if (val == CPUFREQ_PRECHANGE) {
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/* To ensure that over the change we don't cause the
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* watchdog to trigger, we perform an keep-alive if
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* the watchdog is running.
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*/
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s3c2410wdt_keepalive();
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} else if (val == CPUFREQ_POSTCHANGE) {
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s3c2410wdt_stop();
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ret = s3c2410wdt_set_heartbeat(tmr_margin);
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if (ret >= 0)
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s3c2410wdt_start();
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else
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goto err;
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}
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done:
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return 0;
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err:
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dev_err(wdt_dev, "cannot set new value for timeout %d\n", tmr_margin);
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return ret;
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}
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static struct notifier_block s3c2410wdt_cpufreq_transition_nb = {
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.notifier_call = s3c2410wdt_cpufreq_transition,
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};
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static inline int s3c2410wdt_cpufreq_register(void)
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{
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return cpufreq_register_notifier(&s3c2410wdt_cpufreq_transition_nb,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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static inline void s3c2410wdt_cpufreq_deregister(void)
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{
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cpufreq_unregister_notifier(&s3c2410wdt_cpufreq_transition_nb,
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CPUFREQ_TRANSITION_NOTIFIER);
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}
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#else
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static inline int s3c2410wdt_cpufreq_register(void)
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{
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return 0;
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}
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static inline void s3c2410wdt_cpufreq_deregister(void)
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{
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}
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#endif
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/* device interface */
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static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct device *dev;
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unsigned int wtcon;
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int started = 0;
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int ret;
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int size;
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DBG("%s: probe=%p\n", __func__, pdev);
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dev = &pdev->dev;
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wdt_dev = &pdev->dev;
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/* get the memory region for the watchdog timer */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(dev, "no memory resource specified\n");
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return -ENOENT;
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}
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size = resource_size(res);
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wdt_mem = request_mem_region(res->start, size, pdev->name);
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if (wdt_mem == NULL) {
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dev_err(dev, "failed to get memory region\n");
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return -EBUSY;
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}
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wdt_base = ioremap(res->start, size);
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if (wdt_base == NULL) {
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dev_err(dev, "failed to ioremap() region\n");
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ret = -EINVAL;
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goto err_req;
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}
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DBG("probe: mapped wdt_base=%p\n", wdt_base);
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wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (wdt_irq == NULL) {
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dev_err(dev, "no irq resource specified\n");
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ret = -ENOENT;
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goto err_map;
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}
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ret = request_irq(wdt_irq->start, s3c2410wdt_irq, 0, pdev->name, pdev);
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if (ret != 0) {
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dev_err(dev, "failed to install irq (%d)\n", ret);
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goto err_map;
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}
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wdt_clock = clk_get(&pdev->dev, "watchdog");
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if (IS_ERR(wdt_clock)) {
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dev_err(dev, "failed to find watchdog clock source\n");
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ret = PTR_ERR(wdt_clock);
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goto err_irq;
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}
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clk_enable(wdt_clock);
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if (s3c2410wdt_cpufreq_register() < 0) {
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printk(KERN_ERR PFX "failed to register cpufreq\n");
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goto err_clk;
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}
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/* see if we can actually set the requested timer margin, and if
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* not, try the default value */
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if (s3c2410wdt_set_heartbeat(tmr_margin)) {
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started = s3c2410wdt_set_heartbeat(
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CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
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if (started == 0)
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dev_info(dev,
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"tmr_margin value out of range, default %d used\n",
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CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME);
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else
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dev_info(dev, "default timer value is out of range, "
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"cannot start\n");
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}
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ret = misc_register(&s3c2410wdt_miscdev);
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if (ret) {
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dev_err(dev, "cannot register miscdev on minor=%d (%d)\n",
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WATCHDOG_MINOR, ret);
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goto err_cpufreq;
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}
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if (tmr_atboot && started == 0) {
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dev_info(dev, "starting watchdog timer\n");
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s3c2410wdt_start();
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} else if (!tmr_atboot) {
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/* if we're not enabling the watchdog, then ensure it is
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* disabled if it has been left running from the bootloader
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* or other source */
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s3c2410wdt_stop();
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}
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/* print out a statement of readiness */
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wtcon = readl(wdt_base + S3C2410_WTCON);
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dev_info(dev, "watchdog %sactive, reset %sabled, irq %sabled\n",
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(wtcon & S3C2410_WTCON_ENABLE) ? "" : "in",
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(wtcon & S3C2410_WTCON_RSTEN) ? "" : "dis",
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(wtcon & S3C2410_WTCON_INTEN) ? "" : "en");
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return 0;
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err_cpufreq:
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s3c2410wdt_cpufreq_deregister();
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err_clk:
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clk_disable(wdt_clock);
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clk_put(wdt_clock);
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err_irq:
|
|
free_irq(wdt_irq->start, pdev);
|
|
|
|
err_map:
|
|
iounmap(wdt_base);
|
|
|
|
err_req:
|
|
release_resource(wdt_mem);
|
|
kfree(wdt_mem);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __devexit s3c2410wdt_remove(struct platform_device *dev)
|
|
{
|
|
s3c2410wdt_cpufreq_deregister();
|
|
|
|
release_resource(wdt_mem);
|
|
kfree(wdt_mem);
|
|
wdt_mem = NULL;
|
|
|
|
free_irq(wdt_irq->start, dev);
|
|
wdt_irq = NULL;
|
|
|
|
clk_disable(wdt_clock);
|
|
clk_put(wdt_clock);
|
|
wdt_clock = NULL;
|
|
|
|
iounmap(wdt_base);
|
|
misc_deregister(&s3c2410wdt_miscdev);
|
|
return 0;
|
|
}
|
|
|
|
static void s3c2410wdt_shutdown(struct platform_device *dev)
|
|
{
|
|
s3c2410wdt_stop();
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static unsigned long wtcon_save;
|
|
static unsigned long wtdat_save;
|
|
|
|
static int s3c2410wdt_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
/* Save watchdog state, and turn it off. */
|
|
wtcon_save = readl(wdt_base + S3C2410_WTCON);
|
|
wtdat_save = readl(wdt_base + S3C2410_WTDAT);
|
|
|
|
/* Note that WTCNT doesn't need to be saved. */
|
|
s3c2410wdt_stop();
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int s3c2410wdt_resume(struct platform_device *dev)
|
|
{
|
|
/* Restore watchdog state. */
|
|
|
|
writel(wtdat_save, wdt_base + S3C2410_WTDAT);
|
|
writel(wtdat_save, wdt_base + S3C2410_WTCNT); /* Reset count */
|
|
writel(wtcon_save, wdt_base + S3C2410_WTCON);
|
|
|
|
printk(KERN_INFO PFX "watchdog %sabled\n",
|
|
(wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis");
|
|
|
|
return 0;
|
|
}
|
|
|
|
#else
|
|
#define s3c2410wdt_suspend NULL
|
|
#define s3c2410wdt_resume NULL
|
|
#endif /* CONFIG_PM */
|
|
|
|
|
|
static struct platform_driver s3c2410wdt_driver = {
|
|
.probe = s3c2410wdt_probe,
|
|
.remove = __devexit_p(s3c2410wdt_remove),
|
|
.shutdown = s3c2410wdt_shutdown,
|
|
.suspend = s3c2410wdt_suspend,
|
|
.resume = s3c2410wdt_resume,
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "s3c2410-wdt",
|
|
},
|
|
};
|
|
|
|
|
|
static char banner[] __initdata =
|
|
KERN_INFO "S3C2410 Watchdog Timer, (c) 2004 Simtec Electronics\n";
|
|
|
|
static int __init watchdog_init(void)
|
|
{
|
|
printk(banner);
|
|
return platform_driver_register(&s3c2410wdt_driver);
|
|
}
|
|
|
|
static void __exit watchdog_exit(void)
|
|
{
|
|
platform_driver_unregister(&s3c2410wdt_driver);
|
|
}
|
|
|
|
module_init(watchdog_init);
|
|
module_exit(watchdog_exit);
|
|
|
|
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, "
|
|
"Dimitry Andric <dimitry.andric@tomtom.com>");
|
|
MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
|
MODULE_ALIAS("platform:s3c2410-wdt");
|
|
|