You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
61 lines
2.1 KiB
61 lines
2.1 KiB
STMicroelectronics SoC DWMAC glue layer controller
|
|
|
|
This file documents differences between the core properties in
|
|
Documentation/devicetree/bindings/net/stmmac.txt
|
|
and what is needed on STi platforms to program the stmmac glue logic.
|
|
|
|
The device node has following properties.
|
|
|
|
Required properties:
|
|
- compatible : Can be "st,stih415-dwmac", "st,stih416-dwmac",
|
|
"st,stih407-dwmac", "st,stid127-dwmac".
|
|
- st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
|
|
encompases the glue register, and the offset of the control register.
|
|
- st,gmac_en: this is to enable the gmac into a dedicated sysctl control
|
|
register available on STiH407 SoC.
|
|
- pinctrl-0: pin-control for all the MII mode supported.
|
|
|
|
Optional properties:
|
|
- resets : phandle pointing to the system reset controller with correct
|
|
reset line index for ethernet reset.
|
|
- st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
|
|
MAC can generate it.
|
|
- st,tx-retime-src: This specifies which clk is wired up to the mac for
|
|
retimeing tx lines. This is totally board dependent and can take one of the
|
|
posssible values from "txclk", "clk_125" or "clkgen".
|
|
If not passed, the internal clock will be used by default.
|
|
- sti-ethclk: this is the phy clock.
|
|
- sti-clkconf: this is an extra sysconfig register, available in new SoCs,
|
|
to program the clk retiming.
|
|
- st,gmac_en: to enable the GMAC, this only is present in some SoCs; e.g.
|
|
STiH407.
|
|
|
|
Example:
|
|
|
|
ethernet0: dwmac@9630000 {
|
|
device_type = "network";
|
|
status = "disabled";
|
|
compatible = "st,stih407-dwmac", "snps,dwmac", "snps,dwmac-3.710";
|
|
reg = <0x9630000 0x8000>;
|
|
reg-names = "stmmaceth";
|
|
|
|
st,syscon = <&syscfg_sbc_reg 0x80>;
|
|
st,gmac_en;
|
|
resets = <&softreset STIH407_ETH1_SOFTRESET>;
|
|
reset-names = "stmmaceth";
|
|
|
|
interrupts = <GIC_SPI 98 IRQ_TYPE_NONE>,
|
|
<GIC_SPI 99 IRQ_TYPE_NONE>,
|
|
<GIC_SPI 100 IRQ_TYPE_NONE>;
|
|
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
|
|
|
|
snps,pbl = <32>;
|
|
snps,mixed-burst;
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_rgmii1>;
|
|
|
|
clock-names = "stmmaceth", "sti-ethclk";
|
|
clocks = <&CLK_S_C0_FLEXGEN CLK_EXT2F_A9>,
|
|
<&CLK_S_C0_FLEXGEN CLK_ETH_PHY>;
|
|
};
|
|
|