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147 lines
3.5 KiB
147 lines
3.5 KiB
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* Samsung Exynos PPMU (Platform Performance Monitoring Unit) device
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The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
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each IP. PPMU provides the primitive values to get performance data. These
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PPMU events provide information of the SoC's behaviors so that you may
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use to analyze system performance, to make behaviors visible and to count
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usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
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The Exynos PPMU driver uses the devfreq-event class to provide event data
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to various devfreq devices. The devfreq devices would use the event data when
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derterming the current state of each IP.
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Required properties:
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- compatible: Should be "samsung,exynos-ppmu" or "samsung,exynos-ppmu-v2.
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- reg: physical base address of each PPMU and length of memory mapped region.
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Optional properties:
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- clock-names : the name of clock used by the PPMU, "ppmu"
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- clocks : phandles for clock specified in "clock-names" property
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Example1 : PPMUv1 nodes in exynos3250.dtsi are listed below.
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ppmu_dmc0: ppmu_dmc0@106a0000 {
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compatible = "samsung,exynos-ppmu";
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reg = <0x106a0000 0x2000>;
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status = "disabled";
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};
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ppmu_dmc1: ppmu_dmc1@106b0000 {
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compatible = "samsung,exynos-ppmu";
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reg = <0x106b0000 0x2000>;
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status = "disabled";
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};
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ppmu_cpu: ppmu_cpu@106c0000 {
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compatible = "samsung,exynos-ppmu";
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reg = <0x106c0000 0x2000>;
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status = "disabled";
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};
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ppmu_rightbus: ppmu_rightbus@112a0000 {
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compatible = "samsung,exynos-ppmu";
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reg = <0x112a0000 0x2000>;
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clocks = <&cmu CLK_PPMURIGHT>;
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clock-names = "ppmu";
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status = "disabled";
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};
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ppmu_leftbus: ppmu_leftbus0@116a0000 {
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compatible = "samsung,exynos-ppmu";
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reg = <0x116a0000 0x2000>;
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clocks = <&cmu CLK_PPMULEFT>;
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clock-names = "ppmu";
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status = "disabled";
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};
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Example2 : Events of each PPMU node in exynos3250-rinato.dts are listed below.
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&ppmu_dmc0 {
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status = "okay";
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events {
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ppmu_dmc0_3: ppmu-event3-dmc0 {
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event-name = "ppmu-event3-dmc0";
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};
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ppmu_dmc0_2: ppmu-event2-dmc0 {
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event-name = "ppmu-event2-dmc0";
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};
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ppmu_dmc0_1: ppmu-event1-dmc0 {
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event-name = "ppmu-event1-dmc0";
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};
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ppmu_dmc0_0: ppmu-event0-dmc0 {
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event-name = "ppmu-event0-dmc0";
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};
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};
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};
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&ppmu_dmc1 {
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status = "okay";
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events {
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ppmu_dmc1_3: ppmu-event3-dmc1 {
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event-name = "ppmu-event3-dmc1";
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};
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};
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};
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&ppmu_leftbus {
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status = "okay";
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events {
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ppmu_leftbus_3: ppmu-event3-leftbus {
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event-name = "ppmu-event3-leftbus";
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};
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};
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};
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&ppmu_rightbus {
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status = "okay";
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events {
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ppmu_rightbus_3: ppmu-event3-rightbus {
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event-name = "ppmu-event3-rightbus";
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};
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};
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};
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Example3 : PPMUv2 nodes in exynos5433.dtsi are listed below.
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ppmu_d0_cpu: ppmu_d0_cpu@10480000 {
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compatible = "samsung,exynos-ppmu-v2";
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reg = <0x10480000 0x2000>;
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status = "disabled";
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};
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ppmu_d0_general: ppmu_d0_general@10490000 {
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compatible = "samsung,exynos-ppmu-v2";
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reg = <0x10490000 0x2000>;
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status = "disabled";
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};
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ppmu_d0_rt: ppmu_d0_rt@104a0000 {
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compatible = "samsung,exynos-ppmu-v2";
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reg = <0x104a0000 0x2000>;
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status = "disabled";
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};
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ppmu_d1_cpu: ppmu_d1_cpu@104b0000 {
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compatible = "samsung,exynos-ppmu-v2";
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reg = <0x104b0000 0x2000>;
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status = "disabled";
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};
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ppmu_d1_general: ppmu_d1_general@104c0000 {
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compatible = "samsung,exynos-ppmu-v2";
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reg = <0x104c0000 0x2000>;
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status = "disabled";
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};
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ppmu_d1_rt: ppmu_d1_rt@104d0000 {
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compatible = "samsung,exynos-ppmu-v2";
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reg = <0x104d0000 0x2000>;
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status = "disabled";
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};
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