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94 lines
3.2 KiB
94 lines
3.2 KiB
OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
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OMAP MUSB GLUE
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- compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
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- ti,hwmods : must be "usb_otg_hs"
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- ti,has-mailbox : to specify that omap uses an external mailbox
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(in control module) to communicate with the musb core during device connect
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and disconnect.
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- multipoint : Should be "1" indicating the musb controller supports
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multipoint. This is a MUSB configuration-specific setting.
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- num-eps : Specifies the number of endpoints. This is also a
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MUSB configuration-specific setting. Should be set to "16"
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- ram-bits : Specifies the ram address size. Should be set to "12"
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- interface-type : This is a board specific setting to describe the type of
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interface between the controller and the phy. It should be "0" or "1"
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specifying ULPI and UTMI respectively.
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- mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
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represents PERIPHERAL.
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- power : Should be "50". This signifies the controller can supply up to
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100mA when operating in host mode.
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- usb-phy : the phandle for the PHY device
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Optional properties:
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- ctrl-module : phandle of the control module this glue uses to write to
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mailbox
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SOC specific device node entry
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usb_otg_hs: usb_otg_hs@4a0ab000 {
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compatible = "ti,omap4-musb";
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ti,hwmods = "usb_otg_hs";
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ti,has-mailbox;
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multipoint = <1>;
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num-eps = <16>;
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ram-bits = <12>;
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ctrl-module = <&omap_control_usb>;
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};
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Board specific device node entry
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&usb_otg_hs {
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interface-type = <1>;
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mode = <3>;
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power = <50>;
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};
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OMAP DWC3 GLUE
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- compatible : Should be "ti,dwc3"
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- ti,hwmods : Should be "usb_otg_ss"
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- reg : Address and length of the register set for the device.
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- interrupts : The irq number of this device that is used to interrupt the
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MPU
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- #address-cells, #size-cells : Must be present if the device has sub-nodes
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- utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
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It should be set to "1" for HW mode and "2" for SW mode.
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- ranges: the child address space are mapped 1:1 onto the parent address space
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Sub-nodes:
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The dwc3 core should be added as subnode to omap dwc3 glue.
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- dwc3 :
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The binding details of dwc3 can be found in:
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Documentation/devicetree/bindings/usb/dwc3.txt
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omap_dwc3 {
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compatible = "ti,dwc3";
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ti,hwmods = "usb_otg_ss";
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reg = <0x4a020000 0x1ff>;
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interrupts = <0 93 4>;
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#address-cells = <1>;
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#size-cells = <1>;
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utmi-mode = <2>;
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ranges;
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};
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OMAP CONTROL USB
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Required properties:
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- compatible: Should be "ti,omap-control-usb"
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- reg : Address and length of the register set for the device. It contains
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the address of "control_dev_conf" and "otghs_control" or "phy_power_usb"
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depending upon omap4 or omap5.
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- reg-names: The names of the register addresses corresponding to the registers
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filled in "reg".
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- ti,type: This is used to differentiate whether the control module has
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usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to
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notify events to the musb core and omap5 has usb3 phy power register to
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power on usb3 phy. Should be "1" if it has mailbox and "2" if it has usb3
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phy power.
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omap_control_usb: omap-control-usb@4a002300 {
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compatible = "ti,omap-control-usb";
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reg = <0x4a002300 0x4>,
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<0x4a00233c 0x4>;
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reg-names = "control_dev_conf", "otghs_control";
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ti,type = <1>;
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};
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