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403 lines
9.8 KiB
403 lines
9.8 KiB
/* arch/arm/mach-msm/smd_private.h
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*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2007 QUALCOMM Incorporated
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
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#define _ARCH_ARM_MACH_MSM_MSM_SMD_PRIVATE_H_
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/list.h>
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#include <linux/io.h>
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#include <mach/msm_iomap.h>
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struct smem_heap_info {
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unsigned initialized;
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unsigned free_offset;
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unsigned heap_remaining;
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unsigned reserved;
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};
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struct smem_heap_entry {
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unsigned allocated;
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unsigned offset;
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unsigned size;
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unsigned reserved;
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};
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struct smem_proc_comm {
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unsigned command;
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unsigned status;
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unsigned data1;
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unsigned data2;
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};
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#define PC_APPS 0
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#define PC_MODEM 1
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#define VERSION_SMD 0
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#define VERSION_QDSP6 4
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#define VERSION_APPS_SBL 6
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#define VERSION_MODEM_SBL 7
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#define VERSION_APPS 8
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#define VERSION_MODEM 9
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struct smem_shared {
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struct smem_proc_comm proc_comm[4];
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unsigned version[32];
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struct smem_heap_info heap_info;
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struct smem_heap_entry heap_toc[512];
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};
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#define SMSM_V1_SIZE (sizeof(unsigned) * 8)
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#define SMSM_V2_SIZE (sizeof(unsigned) * 4)
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#ifdef CONFIG_MSM_SMD_PKG3
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struct smsm_interrupt_info {
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uint32_t interrupt_mask;
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uint32_t pending_interrupts;
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uint32_t wakeup_reason;
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};
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#else
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#define DEM_MAX_PORT_NAME_LEN (20)
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struct msm_dem_slave_data {
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uint32_t sleep_time;
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uint32_t interrupt_mask;
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uint32_t resources_used;
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uint32_t reserved1;
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uint32_t wakeup_reason;
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uint32_t pending_interrupts;
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uint32_t rpc_prog;
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uint32_t rpc_proc;
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char smd_port_name[DEM_MAX_PORT_NAME_LEN];
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uint32_t reserved2;
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};
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#endif
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#define SZ_DIAG_ERR_MSG 0xC8
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#define ID_DIAG_ERR_MSG SMEM_DIAG_ERR_MESSAGE
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#define ID_SMD_CHANNELS SMEM_SMD_BASE_ID
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#define ID_SHARED_STATE SMEM_SMSM_SHARED_STATE
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#define ID_CH_ALLOC_TBL SMEM_CHANNEL_ALLOC_TBL
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#define SMSM_INIT 0x00000001
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#define SMSM_SMDINIT 0x00000008
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#define SMSM_RPCINIT 0x00000020
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#define SMSM_RESET 0x00000040
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#define SMSM_RSA 0x00000080
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#define SMSM_RUN 0x00000100
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#define SMSM_PWRC 0x00000200
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#define SMSM_TIMEWAIT 0x00000400
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#define SMSM_TIMEINIT 0x00000800
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#define SMSM_PWRC_EARLY_EXIT 0x00001000
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#define SMSM_WFPI 0x00002000
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#define SMSM_SLEEP 0x00004000
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#define SMSM_SLEEPEXIT 0x00008000
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#define SMSM_APPS_REBOOT 0x00020000
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#define SMSM_SYSTEM_POWER_DOWN 0x00040000
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#define SMSM_SYSTEM_REBOOT 0x00080000
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#define SMSM_SYSTEM_DOWNLOAD 0x00100000
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#define SMSM_PWRC_SUSPEND 0x00200000
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#define SMSM_APPS_SHUTDOWN 0x00400000
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#define SMSM_SMD_LOOPBACK 0x00800000
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#define SMSM_RUN_QUIET 0x01000000
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#define SMSM_MODEM_WAIT 0x02000000
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#define SMSM_MODEM_BREAK 0x04000000
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#define SMSM_MODEM_CONTINUE 0x08000000
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#define SMSM_UNKNOWN 0x80000000
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#define SMSM_WKUP_REASON_RPC 0x00000001
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#define SMSM_WKUP_REASON_INT 0x00000002
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#define SMSM_WKUP_REASON_GPIO 0x00000004
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#define SMSM_WKUP_REASON_TIMER 0x00000008
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#define SMSM_WKUP_REASON_ALARM 0x00000010
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#define SMSM_WKUP_REASON_RESET 0x00000020
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#ifdef CONFIG_ARCH_MSM7X00A
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enum smsm_state_item {
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SMSM_STATE_APPS = 1,
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SMSM_STATE_MODEM = 3,
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SMSM_STATE_COUNT,
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};
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#else
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enum smsm_state_item {
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SMSM_STATE_APPS,
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SMSM_STATE_MODEM,
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SMSM_STATE_HEXAGON,
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SMSM_STATE_APPS_DEM,
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SMSM_STATE_MODEM_DEM,
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SMSM_STATE_QDSP6_DEM,
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SMSM_STATE_POWER_MASTER_DEM,
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SMSM_STATE_TIME_MASTER_DEM,
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SMSM_STATE_COUNT,
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};
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#endif
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void *smem_alloc(unsigned id, unsigned size);
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int smsm_change_state(enum smsm_state_item item, uint32_t clear_mask, uint32_t set_mask);
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uint32_t smsm_get_state(enum smsm_state_item item);
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int smsm_set_sleep_duration(uint32_t delay);
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void smsm_print_sleep_info(void);
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#define SMEM_NUM_SMD_CHANNELS 64
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typedef enum {
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/* fixed items */
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SMEM_PROC_COMM = 0,
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SMEM_HEAP_INFO,
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SMEM_ALLOCATION_TABLE,
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SMEM_VERSION_INFO,
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SMEM_HW_RESET_DETECT,
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SMEM_AARM_WARM_BOOT,
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SMEM_DIAG_ERR_MESSAGE,
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SMEM_SPINLOCK_ARRAY,
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SMEM_MEMORY_BARRIER_LOCATION,
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/* dynamic items */
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SMEM_AARM_PARTITION_TABLE,
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SMEM_AARM_BAD_BLOCK_TABLE,
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SMEM_RESERVE_BAD_BLOCKS,
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SMEM_WM_UUID,
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SMEM_CHANNEL_ALLOC_TBL,
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SMEM_SMD_BASE_ID,
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SMEM_SMEM_LOG_IDX = SMEM_SMD_BASE_ID + SMEM_NUM_SMD_CHANNELS,
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SMEM_SMEM_LOG_EVENTS,
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SMEM_SMEM_STATIC_LOG_IDX,
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SMEM_SMEM_STATIC_LOG_EVENTS,
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SMEM_SMEM_SLOW_CLOCK_SYNC,
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SMEM_SMEM_SLOW_CLOCK_VALUE,
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SMEM_BIO_LED_BUF,
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SMEM_SMSM_SHARED_STATE,
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SMEM_SMSM_INT_INFO,
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SMEM_SMSM_SLEEP_DELAY,
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SMEM_SMSM_LIMIT_SLEEP,
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SMEM_SLEEP_POWER_COLLAPSE_DISABLED,
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SMEM_KEYPAD_KEYS_PRESSED,
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SMEM_KEYPAD_STATE_UPDATED,
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SMEM_KEYPAD_STATE_IDX,
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SMEM_GPIO_INT,
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SMEM_MDDI_LCD_IDX,
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SMEM_MDDI_HOST_DRIVER_STATE,
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SMEM_MDDI_LCD_DISP_STATE,
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SMEM_LCD_CUR_PANEL,
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SMEM_MARM_BOOT_SEGMENT_INFO,
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SMEM_AARM_BOOT_SEGMENT_INFO,
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SMEM_SLEEP_STATIC,
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SMEM_SCORPION_FREQUENCY,
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SMEM_SMD_PROFILES,
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SMEM_TSSC_BUSY,
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SMEM_HS_SUSPEND_FILTER_INFO,
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SMEM_BATT_INFO,
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SMEM_APPS_BOOT_MODE,
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SMEM_VERSION_FIRST,
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SMEM_VERSION_LAST = SMEM_VERSION_FIRST + 24,
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SMEM_OSS_RRCASN1_BUF1,
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SMEM_OSS_RRCASN1_BUF2,
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SMEM_ID_VENDOR0,
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SMEM_ID_VENDOR1,
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SMEM_ID_VENDOR2,
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SMEM_HW_SW_BUILD_ID,
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SMEM_SMD_BLOCK_PORT_BASE_ID,
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SMEM_SMD_BLOCK_PORT_PROC0_HEAP = SMEM_SMD_BLOCK_PORT_BASE_ID + SMEM_NUM_SMD_CHANNELS,
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SMEM_SMD_BLOCK_PORT_PROC1_HEAP = SMEM_SMD_BLOCK_PORT_PROC0_HEAP + SMEM_NUM_SMD_CHANNELS,
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SMEM_I2C_MUTEX = SMEM_SMD_BLOCK_PORT_PROC1_HEAP + SMEM_NUM_SMD_CHANNELS,
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SMEM_SCLK_CONVERSION,
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SMEM_SMD_SMSM_INTR_MUX,
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SMEM_SMSM_CPU_INTR_MASK,
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SMEM_APPS_DEM_SLAVE_DATA,
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SMEM_QDSP6_DEM_SLAVE_DATA,
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SMEM_CLKREGIM_BSP,
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SMEM_CLKREGIM_SOURCES,
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SMEM_SMD_FIFO_BASE_ID,
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SMEM_USABLE_RAM_PARTITION_TABLE = SMEM_SMD_FIFO_BASE_ID + SMEM_NUM_SMD_CHANNELS,
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SMEM_POWER_ON_STATUS_INFO,
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SMEM_DAL_AREA,
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SMEM_SMEM_LOG_POWER_IDX,
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SMEM_SMEM_LOG_POWER_WRAP,
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SMEM_SMEM_LOG_POWER_EVENTS,
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SMEM_ERR_CRASH_LOG,
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SMEM_ERR_F3_TRACE_LOG,
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SMEM_NUM_ITEMS,
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} smem_mem_type;
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#define SMD_SS_CLOSED 0x00000000
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#define SMD_SS_OPENING 0x00000001
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#define SMD_SS_OPENED 0x00000002
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#define SMD_SS_FLUSHING 0x00000003
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#define SMD_SS_CLOSING 0x00000004
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#define SMD_SS_RESET 0x00000005
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#define SMD_SS_RESET_OPENING 0x00000006
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#define SMD_BUF_SIZE 8192
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#define SMD_CHANNELS 64
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#define SMD_HEADER_SIZE 20
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struct smd_alloc_elm {
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char name[20];
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uint32_t cid;
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uint32_t ctype;
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uint32_t ref_count;
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};
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struct smd_half_channel {
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unsigned state;
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unsigned char fDSR;
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unsigned char fCTS;
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unsigned char fCD;
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unsigned char fRI;
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unsigned char fHEAD;
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unsigned char fTAIL;
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unsigned char fSTATE;
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unsigned char fUNUSED;
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unsigned tail;
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unsigned head;
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} __attribute__(( aligned(4), packed ));
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/* Only used on SMD package v3 on msm7201a */
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struct smd_shared_v1 {
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struct smd_half_channel ch0;
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unsigned char data0[SMD_BUF_SIZE];
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struct smd_half_channel ch1;
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unsigned char data1[SMD_BUF_SIZE];
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};
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/* Used on SMD package v4 */
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struct smd_shared_v2 {
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struct smd_half_channel ch0;
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struct smd_half_channel ch1;
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};
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struct smd_channel {
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volatile struct smd_half_channel *send;
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volatile struct smd_half_channel *recv;
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unsigned char *send_data;
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unsigned char *recv_data;
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unsigned fifo_mask;
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unsigned fifo_size;
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unsigned current_packet;
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unsigned n;
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struct list_head ch_list;
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void *priv;
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void (*notify)(void *priv, unsigned flags);
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int (*read)(struct smd_channel *ch, void *data, int len);
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int (*write)(struct smd_channel *ch, const void *data, int len);
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int (*read_avail)(struct smd_channel *ch);
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int (*write_avail)(struct smd_channel *ch);
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void (*update_state)(struct smd_channel *ch);
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unsigned last_state;
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void (*notify_other_cpu)(void);
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unsigned type;
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char name[32];
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struct platform_device pdev;
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};
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#define SMD_TYPE_MASK 0x0FF
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#define SMD_TYPE_APPS_MODEM 0x000
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#define SMD_TYPE_APPS_DSP 0x001
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#define SMD_TYPE_MODEM_DSP 0x002
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#define SMD_KIND_MASK 0xF00
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#define SMD_KIND_UNKNOWN 0x000
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#define SMD_KIND_STREAM 0x100
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#define SMD_KIND_PACKET 0x200
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extern struct list_head smd_ch_closed_list;
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extern struct list_head smd_ch_list_modem;
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extern struct list_head smd_ch_list_dsp;
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extern spinlock_t smd_lock;
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extern spinlock_t smem_lock;
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void *smem_find(unsigned id, unsigned size);
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void *smem_item(unsigned id, unsigned *size);
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uint32_t raw_smsm_get_state(enum smsm_state_item item);
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extern void msm_init_last_radio_log(struct module *);
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#ifdef CONFIG_MSM_SMD_PKG3
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/*
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* This allocator assumes an SMD Package v3 which only exists on
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* MSM7x00 SoC's.
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*/
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static inline int _smd_alloc_channel(struct smd_channel *ch)
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{
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struct smd_shared_v1 *shared1;
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shared1 = smem_alloc(ID_SMD_CHANNELS + ch->n, sizeof(*shared1));
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if (!shared1) {
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pr_err("smd_alloc_channel() cid %d does not exist\n", ch->n);
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return -1;
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}
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ch->send = &shared1->ch0;
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ch->recv = &shared1->ch1;
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ch->send_data = shared1->data0;
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ch->recv_data = shared1->data1;
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ch->fifo_size = SMD_BUF_SIZE;
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return 0;
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}
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#else
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/*
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* This allocator assumes an SMD Package v4, the most common
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* and the default.
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*/
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static inline int _smd_alloc_channel(struct smd_channel *ch)
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{
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struct smd_shared_v2 *shared2;
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void *buffer;
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unsigned buffer_sz;
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shared2 = smem_alloc(SMEM_SMD_BASE_ID + ch->n, sizeof(*shared2));
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buffer = smem_item(SMEM_SMD_FIFO_BASE_ID + ch->n, &buffer_sz);
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if (!buffer)
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return -1;
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/* buffer must be a power-of-two size */
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if (buffer_sz & (buffer_sz - 1))
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return -1;
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buffer_sz /= 2;
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ch->send = &shared2->ch0;
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ch->recv = &shared2->ch1;
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ch->send_data = buffer;
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ch->recv_data = buffer + buffer_sz;
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ch->fifo_size = buffer_sz;
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return 0;
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}
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#endif /* CONFIG_MSM_SMD_PKG3 */
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#if defined(CONFIG_ARCH_MSM7X30)
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static inline void msm_a2m_int(uint32_t irq)
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{
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writel(1 << irq, MSM_GCC_BASE + 0x8);
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}
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#else
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static inline void msm_a2m_int(uint32_t irq)
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{
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writel(1, MSM_CSR_BASE + 0x400 + (irq * 4));
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}
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#endif /* CONFIG_ARCH_MSM7X30 */
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#endif
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