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389 lines
10 KiB
389 lines
10 KiB
/*
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* This module supports the iSeries PCI bus interrupt handling
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* Copyright (C) 20yy <Robert L Holtorf> <IBM Corp>
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* Copyright (C) 2004-2005 IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the:
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* Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330,
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* Boston, MA 02111-1307 USA
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*
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* Change Activity:
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* Created, December 13, 2000 by Wayne Holm
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* End Change Activity
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/bootmem.h>
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#include <linux/ide.h>
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#include <linux/irq.h>
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#include <linux/spinlock.h>
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#include <asm/paca.h>
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#include <asm/iseries/hv_types.h>
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#include <asm/iseries/hv_lp_event.h>
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#include <asm/iseries/hv_call_xm.h>
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#include <asm/iseries/it_lp_queue.h>
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#include "irq.h"
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#include "pci.h"
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#include "call_pci.h"
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#if defined(CONFIG_SMP)
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extern void iSeries_smp_message_recv(struct pt_regs *);
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#endif
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#ifdef CONFIG_PCI
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enum pci_event_type {
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pe_bus_created = 0, /* PHB has been created */
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pe_bus_error = 1, /* PHB has failed */
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pe_bus_failed = 2, /* Msg to Secondary, Primary failed bus */
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pe_node_failed = 4, /* Multi-adapter bridge has failed */
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pe_node_recovered = 5, /* Multi-adapter bridge has recovered */
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pe_bus_recovered = 12, /* PHB has been recovered */
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pe_unquiese_bus = 18, /* Secondary bus unqiescing */
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pe_bridge_error = 21, /* Bridge Error */
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pe_slot_interrupt = 22 /* Slot interrupt */
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};
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struct pci_event {
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struct HvLpEvent event;
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union {
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u64 __align; /* Align on an 8-byte boundary */
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struct {
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u32 fisr;
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HvBusNumber bus_number;
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HvSubBusNumber sub_bus_number;
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HvAgentId dev_id;
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} slot;
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struct {
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HvBusNumber bus_number;
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HvSubBusNumber sub_bus_number;
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} bus;
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struct {
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HvBusNumber bus_number;
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HvSubBusNumber sub_bus_number;
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HvAgentId dev_id;
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} node;
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} data;
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};
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static DEFINE_SPINLOCK(pending_irqs_lock);
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static int num_pending_irqs;
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static int pending_irqs[NR_IRQS];
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static void int_received(struct pci_event *event, struct pt_regs *regs)
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{
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int irq;
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switch (event->event.xSubtype) {
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case pe_slot_interrupt:
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irq = event->event.xCorrelationToken;
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if (irq < NR_IRQS) {
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spin_lock(&pending_irqs_lock);
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pending_irqs[irq]++;
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num_pending_irqs++;
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spin_unlock(&pending_irqs_lock);
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} else {
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printk(KERN_WARNING "int_received: bad irq number %d\n",
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irq);
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HvCallPci_eoi(event->data.slot.bus_number,
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event->data.slot.sub_bus_number,
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event->data.slot.dev_id);
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}
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break;
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/* Ignore error recovery events for now */
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case pe_bus_created:
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printk(KERN_INFO "int_received: system bus %d created\n",
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event->data.bus.bus_number);
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break;
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case pe_bus_error:
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case pe_bus_failed:
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printk(KERN_INFO "int_received: system bus %d failed\n",
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event->data.bus.bus_number);
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break;
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case pe_bus_recovered:
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case pe_unquiese_bus:
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printk(KERN_INFO "int_received: system bus %d recovered\n",
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event->data.bus.bus_number);
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break;
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case pe_node_failed:
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case pe_bridge_error:
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printk(KERN_INFO
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"int_received: multi-adapter bridge %d/%d/%d failed\n",
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event->data.node.bus_number,
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event->data.node.sub_bus_number,
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event->data.node.dev_id);
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break;
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case pe_node_recovered:
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printk(KERN_INFO
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"int_received: multi-adapter bridge %d/%d/%d recovered\n",
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event->data.node.bus_number,
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event->data.node.sub_bus_number,
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event->data.node.dev_id);
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break;
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default:
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printk(KERN_ERR
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"int_received: unrecognized event subtype 0x%x\n",
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event->event.xSubtype);
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break;
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}
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}
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static void pci_event_handler(struct HvLpEvent *event, struct pt_regs *regs)
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{
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if (event && (event->xType == HvLpEvent_Type_PciIo)) {
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if (hvlpevent_is_int(event))
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int_received((struct pci_event *)event, regs);
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else
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printk(KERN_ERR
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"pci_event_handler: unexpected ack received\n");
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} else if (event)
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printk(KERN_ERR
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"pci_event_handler: Unrecognized PCI event type 0x%x\n",
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(int)event->xType);
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else
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printk(KERN_ERR "pci_event_handler: NULL event received\n");
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}
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#define REAL_IRQ_TO_SUBBUS(irq) (((irq) >> 14) & 0xff)
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#define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
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#define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
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#define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
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/*
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* This will be called by device drivers (via enable_IRQ)
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* to enable INTA in the bridge interrupt status register.
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*/
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static void iseries_enable_IRQ(unsigned int irq)
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{
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u32 bus, dev_id, function, mask;
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const u32 sub_bus = 0;
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unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
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/* The IRQ has already been locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Unmask secondary INTA */
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mask = 0x80000000;
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HvCallPci_unmaskInterrupts(bus, sub_bus, dev_id, mask);
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}
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/* This is called by iseries_activate_IRQs */
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static unsigned int iseries_startup_IRQ(unsigned int irq)
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{
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u32 bus, dev_id, function, mask;
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const u32 sub_bus = 0;
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unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Link the IRQ number to the bridge */
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HvCallXm_connectBusUnit(bus, sub_bus, dev_id, irq);
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/* Unmask bridge interrupts in the FISR */
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mask = 0x01010000 << function;
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HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask);
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iseries_enable_IRQ(irq);
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return 0;
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}
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/*
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* This is called out of iSeries_fixup to activate interrupt
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* generation for usable slots
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*/
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void __init iSeries_activate_IRQs()
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{
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int irq;
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unsigned long flags;
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for_each_irq (irq) {
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irq_desc_t *desc = get_irq_desc(irq);
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if (desc && desc->chip && desc->chip->startup) {
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spin_lock_irqsave(&desc->lock, flags);
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desc->chip->startup(irq);
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spin_unlock_irqrestore(&desc->lock, flags);
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}
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}
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}
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/* this is not called anywhere currently */
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static void iseries_shutdown_IRQ(unsigned int irq)
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{
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u32 bus, dev_id, function, mask;
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const u32 sub_bus = 0;
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unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
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/* irq should be locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Invalidate the IRQ number in the bridge */
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HvCallXm_connectBusUnit(bus, sub_bus, dev_id, 0);
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/* Mask bridge interrupts in the FISR */
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mask = 0x01010000 << function;
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HvCallPci_maskFisr(bus, sub_bus, dev_id, mask);
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}
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/*
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* This will be called by device drivers (via disable_IRQ)
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* to disable INTA in the bridge interrupt status register.
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*/
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static void iseries_disable_IRQ(unsigned int irq)
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{
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u32 bus, dev_id, function, mask;
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const u32 sub_bus = 0;
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unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
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/* The IRQ has already been locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Mask secondary INTA */
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mask = 0x80000000;
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HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask);
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}
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static void iseries_end_IRQ(unsigned int irq)
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{
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unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
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HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
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(REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq));
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}
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static struct irq_chip iseries_pic = {
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.typename = "iSeries irq controller",
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.startup = iseries_startup_IRQ,
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.shutdown = iseries_shutdown_IRQ,
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.unmask = iseries_enable_IRQ,
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.mask = iseries_disable_IRQ,
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.eoi = iseries_end_IRQ
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};
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/*
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* This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
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* It calculates the irq value for the slot.
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* Note that sub_bus is always 0 (at the moment at least).
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*/
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int __init iSeries_allocate_IRQ(HvBusNumber bus,
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HvSubBusNumber sub_bus, u32 bsubbus)
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{
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unsigned int realirq;
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u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus);
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u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus);
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realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3)
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+ function;
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return irq_create_mapping(NULL, realirq);
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}
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#endif /* CONFIG_PCI */
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/*
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* Get the next pending IRQ.
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*/
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unsigned int iSeries_get_irq(struct pt_regs *regs)
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{
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int irq = NO_IRQ_IGNORE;
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#ifdef CONFIG_SMP
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if (get_lppaca()->int_dword.fields.ipi_cnt) {
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get_lppaca()->int_dword.fields.ipi_cnt = 0;
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iSeries_smp_message_recv(regs);
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}
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#endif /* CONFIG_SMP */
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if (hvlpevent_is_pending())
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process_hvlpevents(regs);
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#ifdef CONFIG_PCI
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if (num_pending_irqs) {
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spin_lock(&pending_irqs_lock);
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for (irq = 0; irq < NR_IRQS; irq++) {
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if (pending_irqs[irq]) {
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pending_irqs[irq]--;
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num_pending_irqs--;
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break;
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}
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}
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spin_unlock(&pending_irqs_lock);
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if (irq >= NR_IRQS)
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irq = NO_IRQ_IGNORE;
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}
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#endif
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return irq;
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}
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static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
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return 0;
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}
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static struct irq_host_ops iseries_irq_host_ops = {
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.map = iseries_irq_host_map,
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};
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/*
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* This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
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* It must be called before the bus walk.
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*/
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void __init iSeries_init_IRQ(void)
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{
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/* Register PCI event handler and open an event path */
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struct irq_host *host;
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int ret;
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/*
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* The Hypervisor only allows us up to 256 interrupt
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* sources (the irq number is passed in a u8).
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*/
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irq_set_virq_count(256);
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/* Create irq host. No need for a revmap since HV will give us
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* back our virtual irq number
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*/
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host = irq_alloc_host(IRQ_HOST_MAP_NOMAP, 0, &iseries_irq_host_ops, 0);
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BUG_ON(host == NULL);
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irq_set_default_host(host);
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ret = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
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&pci_event_handler);
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if (ret == 0) {
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ret = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
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if (ret != 0)
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printk(KERN_ERR "iseries_init_IRQ: open event path "
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"failed with rc 0x%x\n", ret);
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} else
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printk(KERN_ERR "iseries_init_IRQ: register handler "
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"failed with rc 0x%x\n", ret);
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}
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