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263 lines
9.2 KiB
263 lines
9.2 KiB
/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _SOC_QCOM_LLCC_PERFMON_H_
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#define _SOC_QCOM_LLCC_PERFMON_H_
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#define LLCC_COMMON_HW_INFO (0x30000)
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#define LLCC_COMMON_STATUS0 (0x3000C)
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/* FEAC */
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#define FEAC_PROF_FILTER_0_CFG5 (0x037014)
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#define FEAC_PROF_FILTER_0_CFG6 (0x037018)
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#define FEAC_PROF_EVENT_n_CFG(n) (0x037060 + 4 * (n))
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#define FEAC_PROF_CFG (0x0370A0)
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/* FERC */
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#define FERC_PROF_FILTER_0_CFG0 (0x03B000)
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#define FERC_PROF_EVENT_n_CFG(n) (0x03B020 + 4 * (n))
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#define FERC_PROF_CFG (0x03B060)
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/* FEWC */
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#define FEWC_PROF_FILTER_0_CFG0 (0x033000)
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#define FEWC_PROF_EVENT_n_CFG(n) (0x033020 + 4 * (n))
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/* BEAC */
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#define BEAC_PROF_FILTER_0_CFG5 (0x049014)
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#define BEAC_PROF_EVENT_n_CFG(n) (0x049040 + 4 * (n))
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#define BEAC_PROF_CFG (0x049080)
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#define BEAC_INST_OFF (0x4000)
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/* BERC */
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#define BERC_PROF_FILTER_0_CFG0 (0x039000)
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#define BERC_PROF_EVENT_n_CFG(n) (0x039020 + 4 * (n))
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#define BERC_PROF_CFG (0x039060)
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/* TRP */
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#define TRP_PROF_FILTER_0_CFG1 (0x024004)
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#define TRP_PROF_EVENT_n_CFG(n) (0x024020 + 4 * (n))
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#define TRP_SCID_n_STATUS(n) (0x000004 + 0x1000 * (n))
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/* DRP */
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#define DRP_PROF_EVENT_n_CFG(n) (0x044010 + 4 * (n))
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#define DRP_PROF_CFG (0x044050)
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/* PMGR */
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#define PMGR_PROF_EVENT_n_CFG(n) (0x03F000 + 4 * (n))
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#define PERFMON_COUNTER_n_CONFIG(n) (0x031020 + 4 * (n))
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#define PERFMON_MODE (0x03100C)
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#define PERFMON_DUMP (0x031010)
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#define BROADCAST_COUNTER_n_VALUE(n) (0x031060 + 4 * (n))
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#define LLCC_COUNTER_n_VALUE(n) (0x031060 + 4 * (n))
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#define EVENT_NUM_MAX (64)
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#define SCID_MAX (32)
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/* Perfmon */
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#define CLEAR_ON_ENABLE BIT(31)
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#define CLEAR_ON_DUMP BIT(30)
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#define FREEZE_ON_SATURATE BIT(29)
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#define CHAINING_EN BIT(28)
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#define COUNT_CLOCK_EVENT BIT(24)
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#define EVENT_SELECT_SHIFT (16)
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#define PERFMON_EVENT_SELECT_MASK GENMASK(EVENT_SELECT_SHIFT + 4,\
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EVENT_SELECT_SHIFT)
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#define PORT_SELECT_SHIFT (0)
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#define PERFMON_PORT_SELECT_MASK GENMASK(PORT_SELECT_SHIFT + 3,\
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PORT_SELECT_SHIFT)
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#define MANUAL_MODE (0)
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#define TIMED_MODE (1)
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#define TRIGGER_MODE (2)
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#define MONITOR_EN_SHIFT (15)
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#define MONITOR_EN BIT(MONITOR_EN_SHIFT)
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#define PERFMON_MODE_MONITOR_EN_MASK GENMASK(MONITOR_EN_SHIFT + 0,\
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MONITOR_EN_SHIFT)
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#define MONITOR_MODE_SHIFT (0)
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#define PERFMON_MODE_MONITOR_MODE_MASK GENMASK(MONITOR_MODE_SHIFT + 0,\
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MONITOR_MODE_SHIFT)
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#define MONITOR_DUMP BIT(0)
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/* COMMON */
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#define BYTE_SCALING (1024)
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#define BEAT_SCALING (32)
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#define LB_CNT_SHIFT (28)
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#define LB_CNT_MASK GENMASK(LB_CNT_SHIFT + 3, \
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LB_CNT_SHIFT)
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#define NUM_MC_SHIFT (10)
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#define NUM_MC_MASK GENMASK(NUM_MC_SHIFT + 1, \
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NUM_MC_SHIFT)
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#define BYTE_SCALING_SHIFT (16)
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#define PROF_CFG_BYTE_SCALING_MASK GENMASK(BYTE_SCALING_SHIFT + 11,\
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BYTE_SCALING_SHIFT)
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#define BEAT_SCALING_SHIFT (8)
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#define PROF_CFG_BEAT_SCALING_MASK GENMASK(BEAT_SCALING_SHIFT + 7,\
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BEAT_SCALING_SHIFT)
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#define PROF_EN_SHIFT (0)
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#define PROF_EN BIT(PROF_EN_SHIFT)
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#define PROF_CFG_EN_MASK GENMASK(PROF_EN_SHIFT + 0,\
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PROF_EN_SHIFT)
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#define FILTER_EN_SHIFT (31)
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#define FILTER_EN BIT(FILTER_EN_SHIFT)
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#define FILTER_EN_MASK GENMASK(FILTER_EN_SHIFT + 0,\
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FILTER_EN_SHIFT)
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#define FILTER_0 (0)
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#define FILTER_0_MASK GENMASK(FILTER_0 + 0, \
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FILTER_0)
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#define FILTER_1 (1)
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#define FILTER_1_MASK GENMASK(FILTER_1 + 0, \
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FILTER_1)
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#define FILTER_SEL_SHIFT (16)
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#define FILTER_SEL_MASK GENMASK(FILTER_SEL_SHIFT + 0,\
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FILTER_SEL_SHIFT)
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#define EVENT_SEL_SHIFT (0)
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#define EVENT_SEL_MASK GENMASK(EVENT_SEL_SHIFT + 5,\
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EVENT_SEL_SHIFT)
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#define MID_MASK_SHIFT (16)
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#define MID_MASK_MASK GENMASK(MID_MASK_SHIFT + 15, \
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MID_MASK_SHIFT)
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#define MID_MATCH_SHIFT (0)
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#define MID_MATCH_MASK GENMASK(MID_MATCH_SHIFT + 15, \
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MID_MATCH_SHIFT)
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#define SCID_MASK_SHIFT (16)
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#define SCID_MASK_MASK GENMASK(SCID_MASK_SHIFT + 15, \
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SCID_MASK_SHIFT)
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#define SCID_MATCH_SHIFT (0)
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#define SCID_MATCH_MASK GENMASK(SCID_MATCH_SHIFT + 15, \
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SCID_MATCH_SHIFT)
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#define SCID_MULTI_MATCH_SHIFT (0)
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#define SCID_MULTI_MATCH_MASK GENMASK(SCID_MULTI_MATCH_SHIFT + 31, \
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SCID_MULTI_MATCH_SHIFT)
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#define PROFTAG_MASK_SHIFT (2)
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#define PROFTAG_MASK_MASK GENMASK(PROFTAG_MASK_SHIFT + 1,\
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PROFTAG_MASK_SHIFT)
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#define PROFTAG_MATCH_SHIFT (0)
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#define PROFTAG_MATCH_MASK GENMASK(PROFTAG_MATCH_SHIFT + 1,\
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PROFTAG_MATCH_SHIFT)
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/* FEAC */
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#define FEAC_SCALING_FILTER_SEL_SHIFT (2)
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#define FEAC_SCALING_FILTER_SEL_MASK GENMASK(FEAC_SCALING_FILTER_SEL_SHIFT \
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+ 0, \
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FEAC_SCALING_FILTER_SEL_SHIFT)
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#define FEAC_SCALING_FILTER_EN_SHIFT (1)
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#define FEAC_SCALING_FILTER_EN BIT(FEAC_SCALING_FILTER_EN_SHIFT)
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#define FEAC_SCALING_FILTER_EN_MASK GENMASK(FEAC_SCALING_FILTER_EN_SHIFT \
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+ 0, \
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FEAC_SCALING_FILTER_EN_SHIFT)
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#define FEAC_WR_BEAT_FILTER_SEL_SHIFT (29)
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#define FEAC_WR_BEAT_FILTER_SEL_MASK GENMASK(FEAC_WR_BEAT_FILTER_SEL_SHIFT \
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+ 0, \
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FEAC_WR_BEAT_FILTER_SEL_SHIFT)
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#define FEAC_WR_BEAT_FILTER_EN_SHIFT (28)
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#define FEAC_WR_BEAT_FILTER_EN_MASK GENMASK(FEAC_WR_BEAT_FILTER_EN_SHIFT \
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+ 0, \
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FEAC_WR_BEAT_FILTER_EN_SHIFT)
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#define FEAC_WR_BEAT_FILTER_EN BIT(FEAC_WR_BEAT_FILTER_EN_SHIFT)
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#define FEAC_WR_BYTE_FILTER_SEL_SHIFT (6)
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#define FEAC_WR_BYTE_FILTER_SEL_MASK GENMASK(FEAC_WR_BYTE_FILTER_SEL_SHIFT \
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+ 0, \
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FEAC_WR_BYTE_FILTER_SEL_SHIFT)
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#define FEAC_WR_BYTE_FILTER_EN_SHIFT (5)
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#define FEAC_WR_BYTE_FILTER_EN_MASK GENMASK(FEAC_WR_BYTE_FILTER_EN_SHIFT \
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+ 0, \
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FEAC_WR_BYTE_FILTER_EN_SHIFT)
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#define FEAC_WR_BYTE_FILTER_EN BIT(FEAC_WR_BYTE_FILTER_EN_SHIFT)
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#define FEAC_RD_BEAT_FILTER_SEL_SHIFT (4)
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#define FEAC_RD_BEAT_FILTER_SEL_MASK GENMASK(FEAC_RD_BEAT_FILTER_SEL_SHIFT \
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+ 0, \
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FEAC_RD_BEAT_FILTER_SEL_SHIFT)
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#define FEAC_RD_BEAT_FILTER_EN_SHIFT (3)
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#define FEAC_RD_BEAT_FILTER_EN_MASK GENMASK(FEAC_RD_BEAT_FILTER_EN_SHIFT \
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+ 0, \
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FEAC_RD_BEAT_FILTER_EN_SHIFT)
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#define FEAC_RD_BEAT_FILTER_EN BIT(FEAC_RD_BEAT_FILTER_EN_SHIFT)
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#define FEAC_RD_BYTE_FILTER_SEL_SHIFT (2)
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#define FEAC_RD_BYTE_FILTER_SEL_MASK GENMASK(FEAC_RD_BYTE_FILTER_SEL_SHIFT \
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+ 0, \
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FEAC_RD_BYTE_FILTER_SEL_SHIFT)
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#define FEAC_RD_BYTE_FILTER_EN_SHIFT (1)
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#define FEAC_RD_BYTE_FILTER_EN_MASK GENMASK(FEAC_RD_BYTE_FILTER_EN_SHIFT \
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+ 0, \
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FEAC_RD_BYTE_FILTER_EN_SHIFT)
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#define FEAC_RD_BYTE_FILTER_EN BIT(FEAC_RD_BYTE_FILTER_EN_SHIFT)
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/* BEAC */
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#define BEAC_PROFTAG_MASK_SHIFT (14)
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#define BEAC_PROFTAG_MASK_MASK GENMASK(BEAC_PROFTAG_MASK_SHIFT + 1,\
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BEAC_PROFTAG_MASK_SHIFT)
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#define BEAC_PROFTAG_MATCH_SHIFT (12)
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#define BEAC_PROFTAG_MATCH_MASK GENMASK(BEAC_PROFTAG_MATCH_SHIFT + 1,\
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BEAC_PROFTAG_MATCH_SHIFT)
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#define BEAC_MC_PROFTAG_SHIFT (1)
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#define BEAC_MC_PROFTAG_MASK GENMASK(BEAC_MC_PROFTAG_SHIFT + 1,\
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BEAC_MC_PROFTAG_SHIFT)
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#define BEAC_WR_BEAT_FILTER_SEL_SHIFT (6)
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#define BEAC_WR_BEAT_FILTER_SEL_MASK GENMASK(BEAC_WR_BEAT_FILTER_SEL_SHIFT \
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+ 0, \
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BEAC_WR_BEAT_FILTER_SEL_SHIFT)
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#define BEAC_WR_BEAT_FILTER_EN_SHIFT (5)
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#define BEAC_WR_BEAT_FILTER_EN_MASK GENMASK(BEAC_WR_BEAT_FILTER_EN_SHIFT \
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+ 0, \
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BEAC_WR_BEAT_FILTER_EN_SHIFT)
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#define BEAC_WR_BEAT_FILTER_EN BIT(BEAC_WR_BEAT_FILTER_EN_SHIFT)
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#define BEAC_RD_BEAT_FILTER_SEL_SHIFT (4)
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#define BEAC_RD_BEAT_FILTER_SEL_MASK GENMASK(BEAC_RD_BEAT_FILTER_SEL_SHIFT \
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+ 0, \
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BEAC_RD_BEAT_FILTER_SEL_SHIFT)
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#define BEAC_RD_BEAT_FILTER_EN_SHIFT (3)
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#define BEAC_RD_BEAT_FILTER_EN_MASK GENMASK(BEAC_RD_BEAT_FILTER_EN_SHIFT \
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+ 0, \
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BEAC_RD_BEAT_FILTER_EN_SHIFT)
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#define BEAC_RD_BEAT_FILTER_EN BIT(BEAC_RD_BEAT_FILTER_EN_SHIFT)
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/* TRP */
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#define TRP_SCID_MATCH_SHIFT (0)
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#define TRP_SCID_MATCH_MASK GENMASK(TRP_SCID_MATCH_SHIFT + 4,\
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TRP_SCID_MATCH_SHIFT)
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#define TRP_SCID_MASK_SHIFT (8)
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#define TRP_SCID_MASK_MASK GENMASK(TRP_SCID_MASK_SHIFT + 4,\
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TRP_SCID_MASK_SHIFT)
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#define TRP_WAY_ID_MATCH_SHIFT (16)
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#define TRP_WAY_ID_MATCH_MASK GENMASK(TRP_WAY_ID_MATCH_SHIFT + 3,\
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TRP_WAY_ID_MATCH_SHIFT)
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#define TRP_WAY_ID_MASK_SHIFT (20)
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#define TRP_WAY_ID_MASK_MASK GENMASK(TRP_WAY_ID_MASK_SHIFT + 3,\
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TRP_WAY_ID_MASK_SHIFT)
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#define TRP_PROFTAG_MATCH_SHIFT (24)
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#define TRP_PROFTAG_MATCH_MASK GENMASK(TRP_PROFTAG_MATCH_SHIFT + 1,\
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TRP_PROFTAG_MATCH_SHIFT)
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#define TRP_PROFTAG_MASK_SHIFT (28)
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#define TRP_PROFTAG_MASK_MASK GENMASK(TRP_PROFTAG_MASK_SHIFT + 1,\
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TRP_PROFTAG_MASK_SHIFT)
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#define TRP_SCID_STATUS_ACTIVE_SHIFT (0)
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#define TRP_SCID_STATUS_ACTIVE_MASK GENMASK( \
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TRP_SCID_STATUS_ACTIVE_SHIFT \
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+ 0, \
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TRP_SCID_STATUS_ACTIVE_SHIFT)
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#define TRP_SCID_STATUS_DEACTIVE_SHIFT (1)
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#define TRP_SCID_STATUS_CURRENT_CAP_SHIFT (16)
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#define TRP_SCID_STATUS_CURRENT_CAP_MASK GENMASK( \
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TRP_SCID_STATUS_CURRENT_CAP_SHIFT \
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+ 13, \
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TRP_SCID_STATUS_CURRENT_CAP_SHIFT)
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#define LLCC_VERSION (0x01010200)
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#define REV_0 (0x0)
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#define REV_1 (0x1)
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#endif /* _SOC_QCOM_LLCC_PERFMON_H_ */
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