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795 lines
19 KiB
795 lines
19 KiB
/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* Qualcomm Technologies, Inc. EMAC Gigabit Ethernet Driver */
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#include <linux/if_ether.h>
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#include <linux/if_vlan.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_net.h>
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#include <linux/of_device.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/acpi.h>
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#include "emac.h"
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#include "emac-mac.h"
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#include "emac-phy.h"
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#include "emac-sgmii.h"
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#define EMAC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
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NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
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#define EMAC_RRD_SIZE 4
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/* The RRD size if timestamping is enabled: */
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#define EMAC_TS_RRD_SIZE 6
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#define EMAC_TPD_SIZE 4
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#define EMAC_RFD_SIZE 2
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#define REG_MAC_RX_STATUS_BIN EMAC_RXMAC_STATC_REG0
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#define REG_MAC_RX_STATUS_END EMAC_RXMAC_STATC_REG22
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#define REG_MAC_TX_STATUS_BIN EMAC_TXMAC_STATC_REG0
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#define REG_MAC_TX_STATUS_END EMAC_TXMAC_STATC_REG24
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#define RXQ0_NUM_RFD_PREF_DEF 8
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#define TXQ0_NUM_TPD_PREF_DEF 5
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#define EMAC_PREAMBLE_DEF 7
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#define DMAR_DLY_CNT_DEF 15
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#define DMAW_DLY_CNT_DEF 4
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#define IMR_NORMAL_MASK (ISR_ERROR | ISR_OVER | ISR_TX_PKT)
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#define ISR_TX_PKT (\
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TX_PKT_INT |\
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TX_PKT_INT1 |\
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TX_PKT_INT2 |\
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TX_PKT_INT3)
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#define ISR_OVER (\
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RFD0_UR_INT |\
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RFD1_UR_INT |\
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RFD2_UR_INT |\
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RFD3_UR_INT |\
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RFD4_UR_INT |\
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RXF_OF_INT |\
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TXF_UR_INT)
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#define ISR_ERROR (\
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DMAR_TO_INT |\
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DMAW_TO_INT |\
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TXQ_TO_INT)
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/* in sync with enum emac_clk_id */
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static const char * const emac_clk_name[] = {
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"axi_clk", "cfg_ahb_clk", "high_speed_clk", "mdio_clk", "tx_clk",
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"rx_clk", "sys_clk"
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};
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void emac_reg_update32(void __iomem *addr, u32 mask, u32 val)
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{
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u32 data = readl(addr);
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writel(((data & ~mask) | val), addr);
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}
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/* reinitialize */
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int emac_reinit_locked(struct emac_adapter *adpt)
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{
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int ret;
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mutex_lock(&adpt->reset_lock);
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emac_mac_down(adpt);
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emac_sgmii_reset(adpt);
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ret = emac_mac_up(adpt);
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mutex_unlock(&adpt->reset_lock);
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return ret;
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}
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/* NAPI */
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static int emac_napi_rtx(struct napi_struct *napi, int budget)
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{
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struct emac_rx_queue *rx_q =
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container_of(napi, struct emac_rx_queue, napi);
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struct emac_adapter *adpt = netdev_priv(rx_q->netdev);
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struct emac_irq *irq = rx_q->irq;
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int work_done = 0;
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emac_mac_rx_process(adpt, rx_q, &work_done, budget);
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if (work_done < budget) {
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napi_complete_done(napi, work_done);
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irq->mask |= rx_q->intr;
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writel(irq->mask, adpt->base + EMAC_INT_MASK);
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}
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return work_done;
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}
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/* Transmit the packet */
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static int emac_start_xmit(struct sk_buff *skb, struct net_device *netdev)
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{
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struct emac_adapter *adpt = netdev_priv(netdev);
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return emac_mac_tx_buf_send(adpt, &adpt->tx_q, skb);
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}
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irqreturn_t emac_isr(int _irq, void *data)
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{
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struct emac_irq *irq = data;
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struct emac_adapter *adpt =
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container_of(irq, struct emac_adapter, irq);
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struct emac_rx_queue *rx_q = &adpt->rx_q;
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u32 isr, status;
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/* disable the interrupt */
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writel(0, adpt->base + EMAC_INT_MASK);
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isr = readl_relaxed(adpt->base + EMAC_INT_STATUS);
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status = isr & irq->mask;
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if (status == 0)
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goto exit;
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if (status & ISR_ERROR) {
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netif_warn(adpt, intr, adpt->netdev,
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"warning: error irq status 0x%lx\n",
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status & ISR_ERROR);
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/* reset MAC */
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schedule_work(&adpt->work_thread);
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}
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/* Schedule the napi for receive queue with interrupt
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* status bit set
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*/
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if (status & rx_q->intr) {
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if (napi_schedule_prep(&rx_q->napi)) {
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irq->mask &= ~rx_q->intr;
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__napi_schedule(&rx_q->napi);
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}
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}
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if (status & TX_PKT_INT)
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emac_mac_tx_process(adpt, &adpt->tx_q);
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if (status & ISR_OVER)
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net_warn_ratelimited("warning: TX/RX overflow\n");
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exit:
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/* enable the interrupt */
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writel(irq->mask, adpt->base + EMAC_INT_MASK);
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return IRQ_HANDLED;
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}
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/* Configure VLAN tag strip/insert feature */
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static int emac_set_features(struct net_device *netdev,
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netdev_features_t features)
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{
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netdev_features_t changed = features ^ netdev->features;
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struct emac_adapter *adpt = netdev_priv(netdev);
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/* We only need to reprogram the hardware if the VLAN tag features
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* have changed, and if it's already running.
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*/
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if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX)))
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return 0;
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if (!netif_running(netdev))
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return 0;
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/* emac_mac_mode_config() uses netdev->features to configure the EMAC,
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* so make sure it's set first.
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*/
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netdev->features = features;
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return emac_reinit_locked(adpt);
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}
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/* Configure Multicast and Promiscuous modes */
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static void emac_rx_mode_set(struct net_device *netdev)
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{
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struct emac_adapter *adpt = netdev_priv(netdev);
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struct netdev_hw_addr *ha;
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emac_mac_mode_config(adpt);
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/* update multicast address filtering */
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emac_mac_multicast_addr_clear(adpt);
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netdev_for_each_mc_addr(ha, netdev)
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emac_mac_multicast_addr_set(adpt, ha->addr);
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}
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/* Change the Maximum Transfer Unit (MTU) */
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static int emac_change_mtu(struct net_device *netdev, int new_mtu)
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{
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struct emac_adapter *adpt = netdev_priv(netdev);
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netif_info(adpt, hw, adpt->netdev,
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"changing MTU from %d to %d\n", netdev->mtu,
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new_mtu);
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netdev->mtu = new_mtu;
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if (netif_running(netdev))
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return emac_reinit_locked(adpt);
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return 0;
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}
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/* Called when the network interface is made active */
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static int emac_open(struct net_device *netdev)
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{
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struct emac_adapter *adpt = netdev_priv(netdev);
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struct emac_irq *irq = &adpt->irq;
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int ret;
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ret = request_irq(irq->irq, emac_isr, 0, "emac-core0", irq);
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if (ret) {
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netdev_err(adpt->netdev, "could not request emac-core0 irq\n");
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return ret;
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}
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/* allocate rx/tx dma buffer & descriptors */
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ret = emac_mac_rx_tx_rings_alloc_all(adpt);
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if (ret) {
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netdev_err(adpt->netdev, "error allocating rx/tx rings\n");
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free_irq(irq->irq, irq);
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return ret;
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}
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ret = emac_mac_up(adpt);
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if (ret) {
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emac_mac_rx_tx_rings_free_all(adpt);
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free_irq(irq->irq, irq);
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return ret;
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}
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ret = adpt->phy.open(adpt);
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if (ret) {
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emac_mac_down(adpt);
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emac_mac_rx_tx_rings_free_all(adpt);
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free_irq(irq->irq, irq);
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return ret;
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}
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return 0;
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}
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/* Called when the network interface is disabled */
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static int emac_close(struct net_device *netdev)
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{
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struct emac_adapter *adpt = netdev_priv(netdev);
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mutex_lock(&adpt->reset_lock);
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adpt->phy.close(adpt);
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emac_mac_down(adpt);
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emac_mac_rx_tx_rings_free_all(adpt);
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free_irq(adpt->irq.irq, &adpt->irq);
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mutex_unlock(&adpt->reset_lock);
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return 0;
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}
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/* Respond to a TX hang */
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static void emac_tx_timeout(struct net_device *netdev)
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{
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struct emac_adapter *adpt = netdev_priv(netdev);
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schedule_work(&adpt->work_thread);
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}
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/* IOCTL support for the interface */
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static int emac_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
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{
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if (!netif_running(netdev))
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return -EINVAL;
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if (!netdev->phydev)
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return -ENODEV;
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return phy_mii_ioctl(netdev->phydev, ifr, cmd);
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}
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/**
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* emac_update_hw_stats - read the EMAC stat registers
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*
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* Reads the stats registers and write the values to adpt->stats.
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*
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* adpt->stats.lock must be held while calling this function,
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* and while reading from adpt->stats.
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*/
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void emac_update_hw_stats(struct emac_adapter *adpt)
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{
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struct emac_stats *stats = &adpt->stats;
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u64 *stats_itr = &adpt->stats.rx_ok;
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void __iomem *base = adpt->base;
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unsigned int addr;
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addr = REG_MAC_RX_STATUS_BIN;
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while (addr <= REG_MAC_RX_STATUS_END) {
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*stats_itr += readl_relaxed(base + addr);
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stats_itr++;
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addr += sizeof(u32);
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}
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/* additional rx status */
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stats->rx_crc_align += readl_relaxed(base + EMAC_RXMAC_STATC_REG23);
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stats->rx_jabbers += readl_relaxed(base + EMAC_RXMAC_STATC_REG24);
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/* update tx status */
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addr = REG_MAC_TX_STATUS_BIN;
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stats_itr = &stats->tx_ok;
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while (addr <= REG_MAC_TX_STATUS_END) {
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*stats_itr += readl_relaxed(base + addr);
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stats_itr++;
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addr += sizeof(u32);
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}
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/* additional tx status */
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stats->tx_col += readl_relaxed(base + EMAC_TXMAC_STATC_REG25);
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}
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/* Provide network statistics info for the interface */
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static void emac_get_stats64(struct net_device *netdev,
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struct rtnl_link_stats64 *net_stats)
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{
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struct emac_adapter *adpt = netdev_priv(netdev);
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struct emac_stats *stats = &adpt->stats;
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spin_lock(&stats->lock);
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emac_update_hw_stats(adpt);
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/* return parsed statistics */
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net_stats->rx_packets = stats->rx_ok;
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net_stats->tx_packets = stats->tx_ok;
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net_stats->rx_bytes = stats->rx_byte_cnt;
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net_stats->tx_bytes = stats->tx_byte_cnt;
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net_stats->multicast = stats->rx_mcast;
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net_stats->collisions = stats->tx_1_col + stats->tx_2_col * 2 +
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stats->tx_late_col + stats->tx_abort_col;
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net_stats->rx_errors = stats->rx_frag + stats->rx_fcs_err +
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stats->rx_len_err + stats->rx_sz_ov +
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stats->rx_align_err;
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net_stats->rx_fifo_errors = stats->rx_rxf_ov;
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net_stats->rx_length_errors = stats->rx_len_err;
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net_stats->rx_crc_errors = stats->rx_fcs_err;
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net_stats->rx_frame_errors = stats->rx_align_err;
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net_stats->rx_over_errors = stats->rx_rxf_ov;
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net_stats->rx_missed_errors = stats->rx_rxf_ov;
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net_stats->tx_errors = stats->tx_late_col + stats->tx_abort_col +
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stats->tx_underrun + stats->tx_trunc;
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net_stats->tx_fifo_errors = stats->tx_underrun;
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net_stats->tx_aborted_errors = stats->tx_abort_col;
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net_stats->tx_window_errors = stats->tx_late_col;
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spin_unlock(&stats->lock);
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}
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static const struct net_device_ops emac_netdev_ops = {
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.ndo_open = emac_open,
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.ndo_stop = emac_close,
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.ndo_validate_addr = eth_validate_addr,
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.ndo_start_xmit = emac_start_xmit,
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.ndo_set_mac_address = eth_mac_addr,
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.ndo_change_mtu = emac_change_mtu,
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.ndo_do_ioctl = emac_ioctl,
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.ndo_tx_timeout = emac_tx_timeout,
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.ndo_get_stats64 = emac_get_stats64,
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.ndo_set_features = emac_set_features,
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.ndo_set_rx_mode = emac_rx_mode_set,
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};
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/* Watchdog task routine, called to reinitialize the EMAC */
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static void emac_work_thread(struct work_struct *work)
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{
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struct emac_adapter *adpt =
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container_of(work, struct emac_adapter, work_thread);
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emac_reinit_locked(adpt);
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}
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/* Initialize various data structures */
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static void emac_init_adapter(struct emac_adapter *adpt)
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{
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u32 reg;
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adpt->rrd_size = EMAC_RRD_SIZE;
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adpt->tpd_size = EMAC_TPD_SIZE;
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adpt->rfd_size = EMAC_RFD_SIZE;
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/* descriptors */
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adpt->tx_desc_cnt = EMAC_DEF_TX_DESCS;
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adpt->rx_desc_cnt = EMAC_DEF_RX_DESCS;
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/* dma */
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adpt->dma_order = emac_dma_ord_out;
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adpt->dmar_block = emac_dma_req_4096;
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adpt->dmaw_block = emac_dma_req_128;
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adpt->dmar_dly_cnt = DMAR_DLY_CNT_DEF;
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adpt->dmaw_dly_cnt = DMAW_DLY_CNT_DEF;
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adpt->tpd_burst = TXQ0_NUM_TPD_PREF_DEF;
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adpt->rfd_burst = RXQ0_NUM_RFD_PREF_DEF;
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/* irq moderator */
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reg = ((EMAC_DEF_RX_IRQ_MOD >> 1) << IRQ_MODERATOR2_INIT_SHFT) |
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((EMAC_DEF_TX_IRQ_MOD >> 1) << IRQ_MODERATOR_INIT_SHFT);
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adpt->irq_mod = reg;
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/* others */
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adpt->preamble = EMAC_PREAMBLE_DEF;
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|
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/* default to automatic flow control */
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adpt->automatic = true;
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|
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/* Disable single-pause-frame mode by default */
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adpt->single_pause_mode = false;
|
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}
|
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|
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/* Get the clock */
|
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static int emac_clks_get(struct platform_device *pdev,
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struct emac_adapter *adpt)
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{
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unsigned int i;
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for (i = 0; i < EMAC_CLK_CNT; i++) {
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struct clk *clk = devm_clk_get(&pdev->dev, emac_clk_name[i]);
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if (IS_ERR(clk)) {
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dev_err(&pdev->dev,
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"could not claim clock %s (error=%li)\n",
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emac_clk_name[i], PTR_ERR(clk));
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return PTR_ERR(clk);
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}
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adpt->clk[i] = clk;
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}
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|
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return 0;
|
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}
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|
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/* Initialize clocks */
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static int emac_clks_phase1_init(struct platform_device *pdev,
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struct emac_adapter *adpt)
|
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{
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int ret;
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|
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/* On ACPI platforms, clocks are controlled by firmware and/or
|
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* ACPI, not by drivers.
|
|
*/
|
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if (has_acpi_companion(&pdev->dev))
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return 0;
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|
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ret = emac_clks_get(pdev, adpt);
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if (ret)
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return ret;
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|
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ret = clk_prepare_enable(adpt->clk[EMAC_CLK_AXI]);
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if (ret)
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return ret;
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|
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ret = clk_prepare_enable(adpt->clk[EMAC_CLK_CFG_AHB]);
|
|
if (ret)
|
|
return ret;
|
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|
|
ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 19200000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return clk_prepare_enable(adpt->clk[EMAC_CLK_HIGH_SPEED]);
|
|
}
|
|
|
|
/* Enable clocks; needs emac_clks_phase1_init to be called before */
|
|
static int emac_clks_phase2_init(struct platform_device *pdev,
|
|
struct emac_adapter *adpt)
|
|
{
|
|
int ret;
|
|
|
|
if (has_acpi_companion(&pdev->dev))
|
|
return 0;
|
|
|
|
ret = clk_set_rate(adpt->clk[EMAC_CLK_TX], 125000000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_prepare_enable(adpt->clk[EMAC_CLK_TX]);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 125000000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_set_rate(adpt->clk[EMAC_CLK_MDIO], 25000000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_prepare_enable(adpt->clk[EMAC_CLK_MDIO]);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = clk_prepare_enable(adpt->clk[EMAC_CLK_RX]);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return clk_prepare_enable(adpt->clk[EMAC_CLK_SYS]);
|
|
}
|
|
|
|
static void emac_clks_teardown(struct emac_adapter *adpt)
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < EMAC_CLK_CNT; i++)
|
|
clk_disable_unprepare(adpt->clk[i]);
|
|
}
|
|
|
|
/* Get the resources */
|
|
static int emac_probe_resources(struct platform_device *pdev,
|
|
struct emac_adapter *adpt)
|
|
{
|
|
struct net_device *netdev = adpt->netdev;
|
|
struct resource *res;
|
|
char maddr[ETH_ALEN];
|
|
int ret = 0;
|
|
|
|
/* get mac address */
|
|
if (device_get_mac_address(&pdev->dev, maddr, ETH_ALEN))
|
|
ether_addr_copy(netdev->dev_addr, maddr);
|
|
else
|
|
eth_hw_addr_random(netdev);
|
|
|
|
/* Core 0 interrupt */
|
|
ret = platform_get_irq(pdev, 0);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev,
|
|
"error: missing core0 irq resource (error=%i)\n", ret);
|
|
return ret;
|
|
}
|
|
adpt->irq.irq = ret;
|
|
|
|
/* base register address */
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
adpt->base = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(adpt->base))
|
|
return PTR_ERR(adpt->base);
|
|
|
|
/* CSR register address */
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
|
adpt->csr = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(adpt->csr))
|
|
return PTR_ERR(adpt->csr);
|
|
|
|
netdev->base_addr = (unsigned long)adpt->base;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id emac_dt_match[] = {
|
|
{
|
|
.compatible = "qcom,fsm9900-emac",
|
|
},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, emac_dt_match);
|
|
|
|
#if IS_ENABLED(CONFIG_ACPI)
|
|
static const struct acpi_device_id emac_acpi_match[] = {
|
|
{
|
|
.id = "QCOM8070",
|
|
},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(acpi, emac_acpi_match);
|
|
#endif
|
|
|
|
static int emac_probe(struct platform_device *pdev)
|
|
{
|
|
struct net_device *netdev;
|
|
struct emac_adapter *adpt;
|
|
struct emac_sgmii *phy;
|
|
u16 devid, revid;
|
|
u32 reg;
|
|
int ret;
|
|
|
|
/* The EMAC itself is capable of 64-bit DMA, so try that first. */
|
|
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
|
|
if (ret) {
|
|
/* Some platforms may restrict the EMAC's address bus to less
|
|
* then the size of DDR. In this case, we need to try a
|
|
* smaller mask. We could try every possible smaller mask,
|
|
* but that's overkill. Instead, just fall to 32-bit, which
|
|
* should always work.
|
|
*/
|
|
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "could not set DMA mask\n");
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
netdev = alloc_etherdev(sizeof(struct emac_adapter));
|
|
if (!netdev)
|
|
return -ENOMEM;
|
|
|
|
dev_set_drvdata(&pdev->dev, netdev);
|
|
SET_NETDEV_DEV(netdev, &pdev->dev);
|
|
emac_set_ethtool_ops(netdev);
|
|
|
|
adpt = netdev_priv(netdev);
|
|
adpt->netdev = netdev;
|
|
adpt->msg_enable = EMAC_MSG_DEFAULT;
|
|
|
|
phy = &adpt->phy;
|
|
atomic_set(&phy->decode_error_count, 0);
|
|
|
|
mutex_init(&adpt->reset_lock);
|
|
spin_lock_init(&adpt->stats.lock);
|
|
|
|
adpt->irq.mask = RX_PKT_INT0 | IMR_NORMAL_MASK;
|
|
|
|
ret = emac_probe_resources(pdev, adpt);
|
|
if (ret)
|
|
goto err_undo_netdev;
|
|
|
|
/* initialize clocks */
|
|
ret = emac_clks_phase1_init(pdev, adpt);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "could not initialize clocks\n");
|
|
goto err_undo_netdev;
|
|
}
|
|
|
|
netdev->watchdog_timeo = EMAC_WATCHDOG_TIME;
|
|
netdev->irq = adpt->irq.irq;
|
|
|
|
netdev->netdev_ops = &emac_netdev_ops;
|
|
|
|
emac_init_adapter(adpt);
|
|
|
|
/* init external phy */
|
|
ret = emac_phy_config(pdev, adpt);
|
|
if (ret)
|
|
goto err_undo_clocks;
|
|
|
|
/* init internal sgmii phy */
|
|
ret = emac_sgmii_config(pdev, adpt);
|
|
if (ret)
|
|
goto err_undo_mdiobus;
|
|
|
|
/* enable clocks */
|
|
ret = emac_clks_phase2_init(pdev, adpt);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "could not initialize clocks\n");
|
|
goto err_undo_mdiobus;
|
|
}
|
|
|
|
/* set hw features */
|
|
netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
|
|
NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
|
|
NETIF_F_HW_VLAN_CTAG_TX;
|
|
netdev->hw_features = netdev->features;
|
|
|
|
netdev->vlan_features |= NETIF_F_SG | NETIF_F_HW_CSUM |
|
|
NETIF_F_TSO | NETIF_F_TSO6;
|
|
|
|
/* MTU range: 46 - 9194 */
|
|
netdev->min_mtu = EMAC_MIN_ETH_FRAME_SIZE -
|
|
(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
|
|
netdev->max_mtu = EMAC_MAX_ETH_FRAME_SIZE -
|
|
(ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
|
|
|
|
INIT_WORK(&adpt->work_thread, emac_work_thread);
|
|
|
|
/* Initialize queues */
|
|
emac_mac_rx_tx_ring_init_all(pdev, adpt);
|
|
|
|
netif_napi_add(netdev, &adpt->rx_q.napi, emac_napi_rtx,
|
|
NAPI_POLL_WEIGHT);
|
|
|
|
ret = register_netdev(netdev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "could not register net device\n");
|
|
goto err_undo_napi;
|
|
}
|
|
|
|
reg = readl_relaxed(adpt->base + EMAC_DMA_MAS_CTRL);
|
|
devid = (reg & DEV_ID_NUM_BMSK) >> DEV_ID_NUM_SHFT;
|
|
revid = (reg & DEV_REV_NUM_BMSK) >> DEV_REV_NUM_SHFT;
|
|
reg = readl_relaxed(adpt->base + EMAC_CORE_HW_VERSION);
|
|
|
|
netif_info(adpt, probe, netdev,
|
|
"hardware id %d.%d, hardware version %d.%d.%d\n",
|
|
devid, revid,
|
|
(reg & MAJOR_BMSK) >> MAJOR_SHFT,
|
|
(reg & MINOR_BMSK) >> MINOR_SHFT,
|
|
(reg & STEP_BMSK) >> STEP_SHFT);
|
|
|
|
return 0;
|
|
|
|
err_undo_napi:
|
|
netif_napi_del(&adpt->rx_q.napi);
|
|
err_undo_mdiobus:
|
|
put_device(&adpt->phydev->mdio.dev);
|
|
mdiobus_unregister(adpt->mii_bus);
|
|
err_undo_clocks:
|
|
emac_clks_teardown(adpt);
|
|
err_undo_netdev:
|
|
free_netdev(netdev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int emac_remove(struct platform_device *pdev)
|
|
{
|
|
struct net_device *netdev = dev_get_drvdata(&pdev->dev);
|
|
struct emac_adapter *adpt = netdev_priv(netdev);
|
|
|
|
unregister_netdev(netdev);
|
|
netif_napi_del(&adpt->rx_q.napi);
|
|
|
|
emac_clks_teardown(adpt);
|
|
|
|
put_device(&adpt->phydev->mdio.dev);
|
|
mdiobus_unregister(adpt->mii_bus);
|
|
free_netdev(netdev);
|
|
|
|
if (adpt->phy.digital)
|
|
iounmap(adpt->phy.digital);
|
|
iounmap(adpt->phy.base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void emac_shutdown(struct platform_device *pdev)
|
|
{
|
|
struct net_device *netdev = dev_get_drvdata(&pdev->dev);
|
|
struct emac_adapter *adpt = netdev_priv(netdev);
|
|
struct emac_sgmii *sgmii = &adpt->phy;
|
|
|
|
if (netdev->flags & IFF_UP) {
|
|
/* Closing the SGMII turns off its interrupts */
|
|
sgmii->close(adpt);
|
|
|
|
/* Resetting the MAC turns off all DMA and its interrupts */
|
|
emac_mac_reset(adpt);
|
|
}
|
|
}
|
|
|
|
static struct platform_driver emac_platform_driver = {
|
|
.probe = emac_probe,
|
|
.remove = emac_remove,
|
|
.driver = {
|
|
.name = "qcom-emac",
|
|
.of_match_table = emac_dt_match,
|
|
.acpi_match_table = ACPI_PTR(emac_acpi_match),
|
|
},
|
|
.shutdown = emac_shutdown,
|
|
};
|
|
|
|
module_platform_driver(emac_platform_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:qcom-emac");
|
|
|