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338 lines
8.7 KiB
338 lines
8.7 KiB
/*
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* Copyright 2012 Red Hat Inc
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Dave Airlie <airlied@redhat.com>
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*/
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#include <linux/dma-buf.h>
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#include <linux/reservation.h>
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#include <drm/drmP.h>
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#include "i915_drv.h"
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static struct drm_i915_gem_object *dma_buf_to_obj(struct dma_buf *buf)
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{
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return to_intel_bo(buf->priv);
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}
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static struct sg_table *i915_gem_map_dma_buf(struct dma_buf_attachment *attachment,
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enum dma_data_direction dir)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
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struct sg_table *st;
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struct scatterlist *src, *dst;
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int ret, i;
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ret = i915_gem_object_pin_pages(obj);
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if (ret)
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goto err;
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/* Copy sg so that we make an independent mapping */
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st = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
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if (st == NULL) {
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ret = -ENOMEM;
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goto err_unpin_pages;
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}
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ret = sg_alloc_table(st, obj->mm.pages->nents, GFP_KERNEL);
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if (ret)
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goto err_free;
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src = obj->mm.pages->sgl;
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dst = st->sgl;
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for (i = 0; i < obj->mm.pages->nents; i++) {
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sg_set_page(dst, sg_page(src), src->length, 0);
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dst = sg_next(dst);
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src = sg_next(src);
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}
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if (!dma_map_sg(attachment->dev, st->sgl, st->nents, dir)) {
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ret = -ENOMEM;
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goto err_free_sg;
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}
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return st;
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err_free_sg:
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sg_free_table(st);
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err_free:
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kfree(st);
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err_unpin_pages:
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i915_gem_object_unpin_pages(obj);
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err:
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return ERR_PTR(ret);
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}
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static void i915_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
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struct sg_table *sg,
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enum dma_data_direction dir)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(attachment->dmabuf);
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dma_unmap_sg(attachment->dev, sg->sgl, sg->nents, dir);
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sg_free_table(sg);
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kfree(sg);
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i915_gem_object_unpin_pages(obj);
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}
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static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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return i915_gem_object_pin_map(obj, I915_MAP_WB);
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}
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static void i915_gem_dmabuf_vunmap(struct dma_buf *dma_buf, void *vaddr)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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i915_gem_object_unpin_map(obj);
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}
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static void *i915_gem_dmabuf_kmap_atomic(struct dma_buf *dma_buf, unsigned long page_num)
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{
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return NULL;
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}
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static void i915_gem_dmabuf_kunmap_atomic(struct dma_buf *dma_buf, unsigned long page_num, void *addr)
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{
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}
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static void *i915_gem_dmabuf_kmap(struct dma_buf *dma_buf, unsigned long page_num)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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struct page *page;
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if (page_num >= obj->base.size >> PAGE_SHIFT)
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return NULL;
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if (!i915_gem_object_has_struct_page(obj))
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return NULL;
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if (i915_gem_object_pin_pages(obj))
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return NULL;
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/* Synchronisation is left to the caller (via .begin_cpu_access()) */
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page = i915_gem_object_get_page(obj, page_num);
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if (IS_ERR(page))
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goto err_unpin;
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return kmap(page);
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err_unpin:
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i915_gem_object_unpin_pages(obj);
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return NULL;
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}
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static void i915_gem_dmabuf_kunmap(struct dma_buf *dma_buf, unsigned long page_num, void *addr)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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kunmap(virt_to_page(addr));
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i915_gem_object_unpin_pages(obj);
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}
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static int i915_gem_dmabuf_mmap(struct dma_buf *dma_buf, struct vm_area_struct *vma)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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int ret;
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if (obj->base.size < vma->vm_end - vma->vm_start)
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return -EINVAL;
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if (!obj->base.filp)
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return -ENODEV;
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ret = call_mmap(obj->base.filp, vma);
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if (ret)
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return ret;
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fput(vma->vm_file);
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vma->vm_file = get_file(obj->base.filp);
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return 0;
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}
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static int i915_gem_begin_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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struct drm_device *dev = obj->base.dev;
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bool write = (direction == DMA_BIDIRECTIONAL || direction == DMA_TO_DEVICE);
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int err;
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err = i915_gem_object_pin_pages(obj);
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if (err)
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return err;
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err = i915_mutex_lock_interruptible(dev);
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if (err)
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goto out;
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err = i915_gem_object_set_to_cpu_domain(obj, write);
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mutex_unlock(&dev->struct_mutex);
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out:
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i915_gem_object_unpin_pages(obj);
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return err;
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}
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static int i915_gem_end_cpu_access(struct dma_buf *dma_buf, enum dma_data_direction direction)
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{
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struct drm_i915_gem_object *obj = dma_buf_to_obj(dma_buf);
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struct drm_device *dev = obj->base.dev;
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int err;
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err = i915_gem_object_pin_pages(obj);
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if (err)
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return err;
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err = i915_mutex_lock_interruptible(dev);
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if (err)
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goto out;
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err = i915_gem_object_set_to_gtt_domain(obj, false);
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mutex_unlock(&dev->struct_mutex);
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out:
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i915_gem_object_unpin_pages(obj);
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return err;
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}
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static const struct dma_buf_ops i915_dmabuf_ops = {
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.map_dma_buf = i915_gem_map_dma_buf,
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.unmap_dma_buf = i915_gem_unmap_dma_buf,
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.release = drm_gem_dmabuf_release,
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.map = i915_gem_dmabuf_kmap,
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.map_atomic = i915_gem_dmabuf_kmap_atomic,
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.unmap = i915_gem_dmabuf_kunmap,
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.unmap_atomic = i915_gem_dmabuf_kunmap_atomic,
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.mmap = i915_gem_dmabuf_mmap,
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.vmap = i915_gem_dmabuf_vmap,
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.vunmap = i915_gem_dmabuf_vunmap,
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.begin_cpu_access = i915_gem_begin_cpu_access,
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.end_cpu_access = i915_gem_end_cpu_access,
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};
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struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
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struct drm_gem_object *gem_obj, int flags)
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{
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struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
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DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
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exp_info.ops = &i915_dmabuf_ops;
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exp_info.size = gem_obj->size;
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exp_info.flags = flags;
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exp_info.priv = gem_obj;
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exp_info.resv = obj->resv;
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if (obj->ops->dmabuf_export) {
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int ret = obj->ops->dmabuf_export(obj);
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if (ret)
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return ERR_PTR(ret);
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}
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return drm_gem_dmabuf_export(dev, &exp_info);
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}
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static struct sg_table *
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i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
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{
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return dma_buf_map_attachment(obj->base.import_attach,
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DMA_BIDIRECTIONAL);
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}
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static void i915_gem_object_put_pages_dmabuf(struct drm_i915_gem_object *obj,
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struct sg_table *pages)
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{
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dma_buf_unmap_attachment(obj->base.import_attach, pages,
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DMA_BIDIRECTIONAL);
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}
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static const struct drm_i915_gem_object_ops i915_gem_object_dmabuf_ops = {
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.get_pages = i915_gem_object_get_pages_dmabuf,
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.put_pages = i915_gem_object_put_pages_dmabuf,
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};
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struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
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struct dma_buf *dma_buf)
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{
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struct dma_buf_attachment *attach;
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struct drm_i915_gem_object *obj;
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int ret;
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/* is this one of own objects? */
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if (dma_buf->ops == &i915_dmabuf_ops) {
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obj = dma_buf_to_obj(dma_buf);
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/* is it from our device? */
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if (obj->base.dev == dev) {
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/*
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* Importing dmabuf exported from out own gem increases
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* refcount on gem itself instead of f_count of dmabuf.
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*/
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return &i915_gem_object_get(obj)->base;
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}
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}
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/* need to attach */
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attach = dma_buf_attach(dma_buf, dev->dev);
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if (IS_ERR(attach))
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return ERR_CAST(attach);
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get_dma_buf(dma_buf);
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obj = i915_gem_object_alloc(to_i915(dev));
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if (obj == NULL) {
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ret = -ENOMEM;
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goto fail_detach;
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}
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drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
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i915_gem_object_init(obj, &i915_gem_object_dmabuf_ops);
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obj->base.import_attach = attach;
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obj->resv = dma_buf->resv;
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/* We use GTT as shorthand for a coherent domain, one that is
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* neither in the GPU cache nor in the CPU cache, where all
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* writes are immediately visible in memory. (That's not strictly
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* true, but it's close! There are internal buffers such as the
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* write-combined buffer or a delay through the chipset for GTT
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* writes that do require us to treat GTT as a separate cache domain.)
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*/
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obj->base.read_domains = I915_GEM_DOMAIN_GTT;
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obj->base.write_domain = 0;
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return &obj->base;
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fail_detach:
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dma_buf_detach(dma_buf, attach);
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dma_buf_put(dma_buf);
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return ERR_PTR(ret);
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}
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#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
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#include "selftests/mock_dmabuf.c"
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#include "selftests/i915_gem_dmabuf.c"
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#endif
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