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Martin Blumenstingl 800ffac107 clk: meson: mpll: use 64-bit maths in params_from_rate ... [ Upstream commit 86aacdca66774051cbc0958110a48074b57a060b ] "rem * SDM_DEN" can easily overflow on the 32-bit Meson8 and Meson8b SoCs if the "remainder" (after the division operation) is greater than 262143Hz. This is likely to happen since the input clock for the MPLLs on Meson8 and Meson8b is "fixed_pll", which is running at a rate of 2550MHz. One example where this was observed to be problematic was the Ethernet clock calculation (which takes MPLL2 as input). When requesting a rate of 125MHz there is a remainder of 2500000Hz. The resulting MPLL2 rate before this patch was 127488329Hz. The resulting MPLL2 rate after this patch is 124999103Hz. Commit b609338b26 ("clk: meson: mpll: use 64bit math in rate_from_params") already fixed a similar issue in rate_from_params. Fixes: 007e6e5c5f ("clk: meson: mpll: add rw operation") Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		7 years ago
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Kconfig	clk: meson: meson8b: register the built-in reset controller	8 years ago
Makefile	clk: meson: gxbb-aoclk: Add CEC 32k clock	8 years ago
clk-audio-divider.c	clk: meson: add audio clock divider support	8 years ago
clk-cpu.c	clk: meson8b: clean up cpu clocks	9 years ago
clk-mpll.c	clk: meson: mpll: use 64-bit maths in params_from_rate	7 years ago
clk-pll.c	clk: meson: Add support for parameters for specific PLLs	8 years ago
clkc.h	clk: meson: mpll: fix mpll0 fractional part ignored	8 years ago
gxbb-aoclk-32k.c	clk: meson: gxbb-aoclk: Add CEC 32k clock	8 years ago
gxbb-aoclk-regmap.c	clk: meson: gxbb-aoclk: Switch to regmap for register access	8 years ago
gxbb-aoclk.c	clk: meson: gxbb-aoclk: Add CEC 32k clock	8 years ago
gxbb-aoclk.h	clk: meson: gxbb-aoclk: Add CEC 32k clock	8 years ago
gxbb.c	clk: meson: gxbb: fix wrong clock for SARADC/SANA	7 years ago
gxbb.h	clk: meson: gxbb: Add sd_emmc clk0 clkids	8 years ago
meson8b.c	Amlogic clock driver updates for 4.14	8 years ago
meson8b.h	clk: meson: meson8b: register the built-in reset controller	8 years ago