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388 lines
10 KiB
388 lines
10 KiB
/*
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* Copyright (C) 2016 Broadcom Limited
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* DOC: VC4 DPI module
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*
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* The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
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* signals. On BCM2835, these can be routed out to GPIO0-27 with the
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* ALT2 function.
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*/
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_bridge.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/of_graph.h>
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#include <linux/of_platform.h>
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#include "vc4_drv.h"
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#include "vc4_regs.h"
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#define DPI_C 0x00
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# define DPI_OUTPUT_ENABLE_MODE BIT(16)
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/* The order field takes the incoming 24 bit RGB from the pixel valve
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* and shuffles the 3 channels.
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*/
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# define DPI_ORDER_MASK VC4_MASK(15, 14)
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# define DPI_ORDER_SHIFT 14
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# define DPI_ORDER_RGB 0
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# define DPI_ORDER_BGR 1
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# define DPI_ORDER_GRB 2
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# define DPI_ORDER_BRG 3
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/* The format field takes the ORDER-shuffled pixel valve data and
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* formats it onto the output lines.
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*/
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# define DPI_FORMAT_MASK VC4_MASK(13, 11)
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# define DPI_FORMAT_SHIFT 11
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/* This define is named in the hardware, but actually just outputs 0. */
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# define DPI_FORMAT_9BIT_666_RGB 0
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/* Outputs 00000000rrrrrggggggbbbbb */
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# define DPI_FORMAT_16BIT_565_RGB_1 1
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/* Outputs 000rrrrr00gggggg000bbbbb */
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# define DPI_FORMAT_16BIT_565_RGB_2 2
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/* Outputs 00rrrrr000gggggg00bbbbb0 */
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# define DPI_FORMAT_16BIT_565_RGB_3 3
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/* Outputs 000000rrrrrrggggggbbbbbb */
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# define DPI_FORMAT_18BIT_666_RGB_1 4
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/* Outputs 00rrrrrr00gggggg00bbbbbb */
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# define DPI_FORMAT_18BIT_666_RGB_2 5
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/* Outputs rrrrrrrrggggggggbbbbbbbb */
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# define DPI_FORMAT_24BIT_888_RGB 6
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/* Reverses the polarity of the corresponding signal */
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# define DPI_PIXEL_CLK_INVERT BIT(10)
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# define DPI_HSYNC_INVERT BIT(9)
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# define DPI_VSYNC_INVERT BIT(8)
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# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
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/* Outputs the signal the falling clock edge instead of rising. */
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# define DPI_HSYNC_NEGATE BIT(6)
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# define DPI_VSYNC_NEGATE BIT(5)
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# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
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/* Disables the signal */
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# define DPI_HSYNC_DISABLE BIT(3)
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# define DPI_VSYNC_DISABLE BIT(2)
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# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
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/* Power gate to the device, full reset at 0 -> 1 transition */
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# define DPI_ENABLE BIT(0)
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/* All other registers besides DPI_C return the ID */
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#define DPI_ID 0x04
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# define DPI_ID_VALUE 0x00647069
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/* General DPI hardware state. */
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struct vc4_dpi {
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struct platform_device *pdev;
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struct drm_encoder *encoder;
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struct drm_connector *connector;
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struct drm_bridge *bridge;
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bool is_panel_bridge;
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void __iomem *regs;
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struct clk *pixel_clock;
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struct clk *core_clock;
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};
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#define DPI_READ(offset) readl(dpi->regs + (offset))
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#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
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/* VC4 DPI encoder KMS struct */
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struct vc4_dpi_encoder {
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struct vc4_encoder base;
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struct vc4_dpi *dpi;
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};
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static inline struct vc4_dpi_encoder *
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to_vc4_dpi_encoder(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct vc4_dpi_encoder, base.base);
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}
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#define DPI_REG(reg) { reg, #reg }
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static const struct {
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u32 reg;
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const char *name;
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} dpi_regs[] = {
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DPI_REG(DPI_C),
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DPI_REG(DPI_ID),
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};
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#ifdef CONFIG_DEBUG_FS
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int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused)
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{
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struct drm_info_node *node = (struct drm_info_node *)m->private;
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struct drm_device *dev = node->minor->dev;
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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struct vc4_dpi *dpi = vc4->dpi;
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int i;
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if (!dpi)
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return 0;
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for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
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seq_printf(m, "%s (0x%04x): 0x%08x\n",
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dpi_regs[i].name, dpi_regs[i].reg,
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DPI_READ(dpi_regs[i].reg));
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}
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return 0;
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}
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#endif
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static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
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{
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struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
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struct vc4_dpi *dpi = vc4_encoder->dpi;
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clk_disable_unprepare(dpi->pixel_clock);
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}
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static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
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{
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struct drm_display_mode *mode = &encoder->crtc->mode;
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struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
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struct vc4_dpi *dpi = vc4_encoder->dpi;
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u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
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int ret;
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if (dpi->connector->display_info.num_bus_formats) {
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u32 bus_format = dpi->connector->display_info.bus_formats[0];
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switch (bus_format) {
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case MEDIA_BUS_FMT_RGB888_1X24:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
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DPI_FORMAT);
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break;
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case MEDIA_BUS_FMT_BGR888_1X24:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
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DPI_FORMAT);
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dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
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break;
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case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
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DPI_FORMAT);
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break;
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case MEDIA_BUS_FMT_RGB666_1X18:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
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DPI_FORMAT);
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break;
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case MEDIA_BUS_FMT_RGB565_1X16:
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dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
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DPI_FORMAT);
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break;
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default:
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DRM_ERROR("Unknown media bus format %d\n", bus_format);
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break;
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}
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}
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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dpi_c |= DPI_HSYNC_INVERT;
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else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
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dpi_c |= DPI_HSYNC_DISABLE;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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dpi_c |= DPI_VSYNC_INVERT;
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else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
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dpi_c |= DPI_VSYNC_DISABLE;
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DPI_WRITE(DPI_C, dpi_c);
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ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
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if (ret)
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DRM_ERROR("Failed to set clock rate: %d\n", ret);
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ret = clk_prepare_enable(dpi->pixel_clock);
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if (ret)
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DRM_ERROR("Failed to set clock rate: %d\n", ret);
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}
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static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
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const struct drm_display_mode *mode)
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{
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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return MODE_NO_INTERLACE;
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return MODE_OK;
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}
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static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
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.disable = vc4_dpi_encoder_disable,
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.enable = vc4_dpi_encoder_enable,
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.mode_valid = vc4_dpi_encoder_mode_valid,
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};
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static const struct of_device_id vc4_dpi_dt_match[] = {
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{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
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{}
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};
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/* Sets up the next link in the display chain, whether it's a panel or
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* a bridge.
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*/
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static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
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{
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struct device *dev = &dpi->pdev->dev;
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struct drm_panel *panel;
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int ret;
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ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
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&panel, &dpi->bridge);
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if (ret) {
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/* If nothing was connected in the DT, that's not an
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* error.
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*/
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if (ret == -ENODEV)
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return 0;
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else
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return ret;
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}
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if (panel) {
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dpi->bridge = drm_panel_bridge_add(panel,
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DRM_MODE_CONNECTOR_DPI);
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dpi->is_panel_bridge = true;
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}
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return drm_bridge_attach(dpi->encoder, dpi->bridge, NULL);
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}
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static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct drm_device *drm = dev_get_drvdata(master);
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struct vc4_dev *vc4 = to_vc4_dev(drm);
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struct vc4_dpi *dpi;
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struct vc4_dpi_encoder *vc4_dpi_encoder;
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int ret;
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dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
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if (!dpi)
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return -ENOMEM;
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vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
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GFP_KERNEL);
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if (!vc4_dpi_encoder)
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return -ENOMEM;
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vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
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vc4_dpi_encoder->dpi = dpi;
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dpi->encoder = &vc4_dpi_encoder->base.base;
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dpi->pdev = pdev;
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dpi->regs = vc4_ioremap_regs(pdev, 0);
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if (IS_ERR(dpi->regs))
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return PTR_ERR(dpi->regs);
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if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
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dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
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DPI_READ(DPI_ID), DPI_ID_VALUE);
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return -ENODEV;
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}
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dpi->core_clock = devm_clk_get(dev, "core");
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if (IS_ERR(dpi->core_clock)) {
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ret = PTR_ERR(dpi->core_clock);
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if (ret != -EPROBE_DEFER)
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DRM_ERROR("Failed to get core clock: %d\n", ret);
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return ret;
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}
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dpi->pixel_clock = devm_clk_get(dev, "pixel");
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if (IS_ERR(dpi->pixel_clock)) {
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ret = PTR_ERR(dpi->pixel_clock);
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if (ret != -EPROBE_DEFER)
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DRM_ERROR("Failed to get pixel clock: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(dpi->core_clock);
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if (ret)
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DRM_ERROR("Failed to turn on core clock: %d\n", ret);
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drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
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DRM_MODE_ENCODER_DPI, NULL);
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drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
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ret = vc4_dpi_init_bridge(dpi);
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if (ret)
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goto err_destroy_encoder;
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dev_set_drvdata(dev, dpi);
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vc4->dpi = dpi;
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return 0;
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err_destroy_encoder:
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drm_encoder_cleanup(dpi->encoder);
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clk_disable_unprepare(dpi->core_clock);
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return ret;
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}
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static void vc4_dpi_unbind(struct device *dev, struct device *master,
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void *data)
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{
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struct drm_device *drm = dev_get_drvdata(master);
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struct vc4_dev *vc4 = to_vc4_dev(drm);
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struct vc4_dpi *dpi = dev_get_drvdata(dev);
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if (dpi->is_panel_bridge)
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drm_panel_bridge_remove(dpi->bridge);
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drm_encoder_cleanup(dpi->encoder);
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clk_disable_unprepare(dpi->core_clock);
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vc4->dpi = NULL;
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}
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static const struct component_ops vc4_dpi_ops = {
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.bind = vc4_dpi_bind,
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.unbind = vc4_dpi_unbind,
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};
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static int vc4_dpi_dev_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &vc4_dpi_ops);
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}
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static int vc4_dpi_dev_remove(struct platform_device *pdev)
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{
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component_del(&pdev->dev, &vc4_dpi_ops);
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return 0;
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}
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struct platform_driver vc4_dpi_driver = {
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.probe = vc4_dpi_dev_probe,
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.remove = vc4_dpi_dev_remove,
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.driver = {
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.name = "vc4_dpi",
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.of_match_table = vc4_dpi_dt_match,
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},
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};
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