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68 lines
2.4 KiB
68 lines
2.4 KiB
/*
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* Copyright (c) 2015, Linaro Limited
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* Copyright (c) 2014, 2017, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __QCOM_CLK_REGMAP_MUX_DIV_H__
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#define __QCOM_CLK_REGMAP_MUX_DIV_H__
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#include <linux/clk-provider.h>
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#include "clk-rcg.h"
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#include "clk-regmap.h"
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/**
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* struct mux_div_clk - combined mux/divider clock
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* @reg_offset: offset of the mux/divider register
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* @hid_width: number of bits in half integer divider
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* @hid_shift: lowest bit of hid value field
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* @src_width: number of bits in source select
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* @src_shift: lowest bit of source select field
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* @div: the divider raw configuration value
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* @src: the mux index which will be used if the clock is enabled
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* @safe_src: the safe source mux value we switch to, while the main PLL is
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* reconfigured
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* @safe_div: the safe divider value that we set, while the main PLL is
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* reconfigured
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* @safe_freq: When switching rates from A to B, the mux div clock will
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* instead switch from A -> safe_freq -> B. This allows the
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* mux_div clock to change rates while enabled, even if this
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* behavior is not supported by the parent clocks.
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* If changing the rate of parent A also causes the rate of
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* parent B to change, then safe_freq must be defined.
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* safe_freq is expected to have a source clock which is always
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* on and runs at only one rate.
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* @parent_map: pointer to parent_map struct
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* @clkr: handle between common and hardware-specific interfaces
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* @clk_nb: clock notifier registered for clock rate change
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*/
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struct clk_regmap_mux_div {
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u32 reg_offset;
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u32 hid_width;
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u32 hid_shift;
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u32 src_width;
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u32 src_shift;
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u32 div;
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u32 src;
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u32 safe_src;
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u32 safe_div;
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unsigned long safe_freq;
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const struct parent_map *parent_map;
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struct clk_regmap clkr;
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struct notifier_block clk_nb;
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};
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extern const struct clk_ops clk_regmap_mux_div_ops;
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int __mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div);
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int mux_div_get_src_div(struct clk_regmap_mux_div *md, u32 *src, u32 *div);
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#endif
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