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35 lines
1.3 KiB
35 lines
1.3 KiB
Qualcomm Technologies, Inc. GPU powerlevels
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Powerlevels are defined in sets by qcom,gpu-pwrlevels. Multiple sets (bins)
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can be defined within qcom,gpu-pwrelvel-bins. Each powerlevel defines a
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voltage, bus, bandwidth level, and a DVM value.
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- qcom,gpu-pwrlevel-bins: Contains one or more qcom,gpu-pwrlevels sets
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Properties:
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- compatible: Must be qcom,gpu-pwrlevel-bins
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- qcom,gpu-pwrlevels: Defines a set of powerlevels
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Properties:
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- qcom,speed-bin: Speed bin identifier for the set - must match
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the value read from the hardware
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- qcom,initial-pwrlevel: GPU wakeup powerlevel
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- qcom,gpu-pwrlevel: A single powerlevel
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- qcom,ca-target-pwrlevel:
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This value indicates which qcom,gpu-pwrlevel
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to jump on in case of context aware power level
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jump.
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Properties:
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- reg: Index of the powerlevel (0 = highest perf)
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- qcom,gpu-freq GPU frequency for the powerlevel (in Hz)
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- qcom,bus-freq Index to a bus level (defined by the bus
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settings)
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- qcom,bus-min Minimum bus level to set for the power level
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- qcom,bus-max maximum bus level to set for the power level
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- qcom,dvm-val: Value that is used as a register setting for
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the ACD power feature. It helps determine the
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threshold for when ACD activates. 0xFFFFFFFF
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is the default value, and the setting where
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ACD will never activate.
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