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488 lines
17 KiB
488 lines
17 KiB
Qualcomm Technologies, Inc. OSM Bindings
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Operating State Manager (OSM) is a hardware engine used by some
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Qualcomm Technologies, Inc. (QTI) SoCs to manage frequency and voltage scaling
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in hardware. OSM is capable of controlling frequency and voltage requests
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for multiple clusters via the existence of multiple OSM domains.
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Properties:
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- compatible
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Usage: required
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Value type: <string>
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Definition: must be "qcom,clk-cpu-osm" or
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"qcom,clk-cpu-osm-sdm630".
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- reg
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Addresses and sizes for the memory of the OSM controller,
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cluster PLL management, and APCS common register regions.
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Optionally, the address of the efuse registers used to
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determine the pwrcl or perfcl speed-bins and/or the ACD
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register space to initialize prior to enabling OSM.
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- reg-names
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Usage: required
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Value type: <stringlist>
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Definition: Address names. Must be "osm", "pwrcl_pll", "perfcl_pll",
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"apcs_common", and "debug". Optionally, "pwrcl_efuse",
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"perfcl_efuse", "pwrcl_acd", or "perfcl_acd".
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Must be specified in the same order as the corresponding
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addresses are specified in the reg property.
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- vdd-pwrcl-supply
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Usage: required
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Value type: <phandle>
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Definition: phandle of the underlying regulator device that manages
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the voltage supply of the Power cluster.
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- vdd-perfcl-supply
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Usage: required
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Value type: <phandle>
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Definition: phandle of the underlying regulator device that manages
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the voltage supply of the Performance cluster.
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- interrupts
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Usage: required
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Value type: <prop-encoded-array>
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Definition: OSM interrupt specifier.
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- interrupt-names
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Usage: required
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Value type: <stringlist>
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Definition: Interrupt names. this list must match up 1-to-1 with the
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interrupts specified in the 'interrupts' property.
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"pwrcl-irq" and "perfcl-irq" must be specified.
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- qcom,pwrcl-speedbinX-v0
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the frequency in Hertz, frequency,
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PLL override data, ACC level, and virtual corner used
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by the OSM hardware for each supported DCVS setpoint
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of the Power cluster.
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- qcom,perfcl-speedbinX-v0
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the frequency in Hertz, frequency,
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PLL override data, ACC level and virtual corner used
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by the OSM hardware for each supported DCVS setpoint
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of the Performance cluster.
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- qcom,osm-no-tz
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates that there is no programming
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of the OSM hardware performed by the secure world.
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- qcom,osm-pll-setup
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates that the PLL setup sequence
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must be executed for each clock domain managed by the OSM
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controller.
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- qcom,up-timer
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array which defines the DCVS up timer value in nanoseconds
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for each of the two clusters managed by the OSM controller.
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- qcom,down-timer
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array which defines the DCVS down timer value in nanoseconds
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for each of the two clusters managed by the OSM controller.
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- qcom,pc-override-index
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array which defines the OSM performance index to be used
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when each cluster enters certain low power modes.
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- qcom,set-ret-inactive
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if domains in retention must
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be treated as inactive.
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- qcom,enable-llm-freq-vote
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if Limits hardware frequency
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votes must be honored by OSM.
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- qcom,llm-freq-up-timer
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array which defines the LLM frequency up timer value in
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nanoseconds for each of the two clusters managed by the
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OSM controller.
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- qcom,llm-freq-down-timer
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array which defines the LLM frequency down timer value in
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nanoseconds for each of the two clusters managed by the
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OSM controller.
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- qcom,enable-llm-volt-vote
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if Limits hardware voltage
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votes must be honored by OSM.
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- qcom,llm-volt-up-timer
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array which defines the LLM voltage up timer value in
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nanoseconds for each of the two clusters managed by the
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OSM controller.
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- qcom,llm-volt-down-timer
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array which defines the LLM voltage down timer value in
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nanoseconds for each of the two clusters managed by the
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OSM controller.
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- qcom,cc-reads
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Usage: optional
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Value type: <integer>
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Definition: Defines the number of times the cycle counters must be
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read to determine the performance level of each clock
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domain.
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- qcom,l-val-base
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the register addresses of the L_VAL
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control register for each of the two clusters managed
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by the OSM controller.
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- qcom,apcs-itm-present
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the register addresses of the ITM
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control register for each of the two clusters managed
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by the OSM controller.
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- qcom,apcs-pll-user-ctl
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the register addresses of the PLL
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user control register for each of the two clusters managed
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by the OSM controller.
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- qcom,apcs-cfg-rcgr
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the register addresses of the RCGR
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configuration register for each of the two clusters managed
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by the OSM controller.
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- qcom,apcs-cmd-rcgr
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the register addresses of the RCGR
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command register for each of the two clusters managed
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by the OSM controller.
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- qcom,apm-threshold-voltage
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Usage: required
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Value type: <u32>
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Definition: Specifies the APM threshold voltage in microvolts. If the
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VDD_APCC supply voltage is above or at this level, then the
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APM is switched to use VDD_APCC. If VDD_APCC is below
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this level, then the APM is switched to use VDD_MX.
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- qcom,apm-mode-ctl
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the register addresses of the APM
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control register for each of the two clusters managed
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by the OSM controller.
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- qcom,apm-ctrl-status
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Array which defines the register addresses of the APM
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controller status register for each of the two clusters
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managed by the OSM controller.
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- qcom,llm-sw-overr
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Array of tuples which defines the three non-zero LLM SW
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override values to write to the OSM controller for each
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of the two clusters. Each tuple must contain three elements.
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- qcom,acdtd-val
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Usage: required if pwrcl_acd or perfcl_acd registers are specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the values to program to the ACD
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Tunable-Length Delay register for the power and performance
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clusters.
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- qcom,acdcr-val
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Usage: required if pwrcl_acd or perfcl_acd registers are specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the values for the ACD control register
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for the power and performance clusters.
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- qcom,acdsscr-val
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Usage: required if pwrcl_acd or perfcl_acd registers are specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the values for the ACD Soft Start Control
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register for the power and performance clusters.
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- qcom,acdextint0-val
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Usage: required if pwrcl_acd or perfcl_acd registers are specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the initial values for the ACD
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external interface configuration register for the power
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and performance clusters.
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- qcom,acdextint1-val
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Usage: required if pwrcl_acd or perfcl_acd registers are specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the final values for the ACD
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external interface configuration register for the power
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and performance clusters.
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- qcom,acdautoxfer-val
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Usage: required if pwrcl_acd or perfcl_acd registers are specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the values for the ACD auto transfer
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control register for the power and performance clusters.
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- qcom,pwrcl-apcs-mem-acc-cfg
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Usage: required if qcom,osm-no-tz is specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the addresses of the mem-acc
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configuration registers for the Power cluster.
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The array must contain exactly three elements.
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- qcom,perfcl-apcs-mem-acc-cfg
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Usage: required if qcom,osm-no-tz is specified
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Value type: <prop-encoded-array>
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Definition: Array which defines the addresses of the mem-acc
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configuration registers for the Performance cluster.
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The array must contain exactly three elements.
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- qcom,pwrcl-apcs-mem-acc-val
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Usage: required if qcom,osm-no-tz is specified
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Value type: <prop-encoded-array>
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Definition: List of integer tuples which define the mem-acc values
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for each performance mode of the Power cluster. Each tuple
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is of length 3 corresponding to the mem-acc values per
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performance mode with a total of 4 tuples corresponding
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to each supported performance mode.
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- qcom,pwrcl-apcs-mem-acc-threshold-voltage
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Usage: optional
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Value type: <u32>
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Definition: Specifies the highest MEM ACC threshold voltage in
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microvolts for the Power cluster. This voltage is
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used to determine which MEM ACC setting is used for the
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highest frequencies. If specified, the voltage must match
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the MEM ACC threshold voltage specified for the
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corresponding CPRh device.
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- qcom,perfcl-apcs-mem-acc-val
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Usage: required if qcom,osm-no-tz is specified
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Value type: <prop-encoded-array>
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Definition: List of integer tuples which define the mem-acc values
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for each performance mode of the Performance cluster.
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Each tuple is of length 3 corresponding to the mem-acc
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values per performance mode with a total of 4 tuples
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corresponding to each supported performance mode.
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- qcom,perfcl-apcs-mem-acc-threshold-voltage
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Usage: optional
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Value type: <u32>
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Definition: Specifies the highest MEM ACC threshold voltage in
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microvolts for the Performance cluster. This voltage is
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used to determine which MEM ACC setting is used for the
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highest frequencies. If specified, the voltage must match
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the MEM ACC threshold voltage specified for the
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corresponding CPRh device.
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- qcom,red-fsm-en
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if the reduction FSM
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should be enabled.
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- qcom,boost-fsm-en
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if the boost FSM should
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be enabled.
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- qcom,safe-fsm-en
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if the safe FSM should
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be enabled.
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- qcom,ps-fsm-en
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if the PS FSM should be
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enabled.
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- qcom,droop-fsm-en
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if the droop FSM should
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be enabled.
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- qcom,wfx-fsm-en
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if the WFX FSM should
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be enabled.
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- qcom,pc-fsm-en
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Usage: optional
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Value type: <empty>
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Definition: Boolean flag which indicates if the PC/RET FSM should
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be enabled.
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- clock-names
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Usage: required
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Value type: <string>
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Definition: Must be "aux_clk".
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- clocks
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Usage: required
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Value type: <phandle>
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Definition: Phandle to the aux clock device.
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Example:
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clock_cpu: qcom,clk-cpu-660@179c0000 {
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compatible = "qcom,clk-cpu-osm";
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reg = <0x179c0000 0x4000>, <0x17916000 0x1000>,
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<0x17816000 0x1000>, <0x179d1000 0x1000>,
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<0x00784130 0x8>, <0x00784130 0x8>;
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reg-names = "osm", "pwrcl_pll", "perfcl_pll",
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"apcs_common", "pwrcl_efuse",
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"perfcl_efuse";
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vdd-pwrcl-supply = <&apc0_pwrcl_vreg>;
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vdd-perfcl-supply = <&apc1_perfcl_vreg>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "pwrcl-irq", "perfcl-irq";
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qcom,pwrcl-speedbin0-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 633600000 0x05040021 0x03200020 0x1 2 >,
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< 902400000 0x0404002f 0x04260026 0x1 3 >,
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< 1113600000 0x0404003a 0x052e002e 0x2 4 >,
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< 1401600000 0x04040049 0x073a003a 0x2 5 >,
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< 1536000000 0x04040050 0x08400040 0x2 6 >,
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< 1747200000 0x0404005b 0x09480048 0x2 7 >,
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< 1843200000 0x04040060 0x094c004c 0x3 8 >;
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qcom,pwrcl-speedbin1-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 633600000 0x05040021 0x03200020 0x1 2 >,
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< 902400000 0x0404002f 0x04260026 0x1 3 >,
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< 1113600000 0x0404003a 0x052e002e 0x2 4 >,
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< 1401600000 0x04040049 0x073a003a 0x2 5 >,
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< 1536000000 0x04040050 0x08400040 0x2 6 >,
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< 1747200000 0x0404005b 0x09480048 0x2 7 >,
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< 1843200000 0x04040060 0x094c004c 0x3 8 >;
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qcom,pwrcl-speedbin3-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 633600000 0x05040021 0x03200020 0x1 2 >,
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< 902400000 0x0404002f 0x04260026 0x1 3 >,
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< 1113600000 0x0404003a 0x052e002e 0x2 4 >,
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< 1401600000 0x04040049 0x073a003a 0x2 5 >,
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< 1536000000 0x04040050 0x08400040 0x2 6 >,
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< 1612800000 0x04040054 0x09430043 0x2 7 >;
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qcom,pwrcl-speedbin4-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 633600000 0x05040021 0x03200020 0x1 2 >,
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< 902400000 0x0404002f 0x04260026 0x1 3 >,
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< 1113600000 0x0404003a 0x052e002e 0x2 4 >,
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< 1401600000 0x04040049 0x073a003a 0x2 5 >,
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< 1536000000 0x04040050 0x08400040 0x2 6 >,
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< 1747200000 0x0404005b 0x09480048 0x2 7 >,
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< 1843200000 0x04040060 0x094c004c 0x3 8 >;
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qcom,perfcl-speedbin0-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 1113600000 0x0404003a 0x052e002e 0x1 2 >,
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< 1401600000 0x04040049 0x073a003a 0x2 3 >,
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< 1747200000 0x0404005b 0x09480048 0x2 4 >,
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< 1958400000 0x04040066 0x0a510051 0x2 5 >,
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< 2150400000 0x04040070 0x0b590059 0x2 6 >,
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< 2457600000 0x04040080 0x0c660066 0x3 7 >;
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qcom,perfcl-speedbin1-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 1113600000 0x0404003a 0x052e002e 0x1 2 >,
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< 1401600000 0x04040049 0x073a003a 0x2 3 >,
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< 1747200000 0x0404005b 0x09480048 0x2 4 >,
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< 1958400000 0x04040066 0x0a510051 0x2 5 >,
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< 2150400000 0x04040070 0x0b590059 0x2 6 >,
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< 2208000000 0x04040073 0x0b5c005c 0x3 7 >;
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qcom,perfcl-speedbin3-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 1113600000 0x0404003a 0x052e002e 0x1 2 >,
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< 1401600000 0x04040049 0x073a003a 0x2 3 >,
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< 1747200000 0x0404005b 0x09480048 0x2 4 >,
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< 1804800000 0x0404005e 0x094b004b 0x2 5 >;
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qcom,perfcl-speedbin4-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 1113600000 0x0404003a 0x052e002e 0x1 2 >,
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< 1401600000 0x04040049 0x073a003a 0x2 3 >,
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< 1747200000 0x0404005b 0x09480048 0x2 4 >,
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< 1958400000 0x04040066 0x0a510051 0x2 5 >;
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qcom,up-timer = <1000 1000>;
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qcom,down-timer = <1000 1000>;
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qcom,set-ret-inactive;
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qcom,enable-llm-freq-vote;
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qcom,llm-freq-up-timer = <327675 327675>;
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qcom,llm-freq-down-timer = <327675 327675>;
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qcom,enable-llm-volt-vote;
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qcom,llm-volt-up-timer = <327675 327675>;
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qcom,llm-volt-down-timer = <327675 327675>;
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qcom,cc-reads = <10>;
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qcom,cc-delay = <5>;
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qcom,cc-factor = <100>;
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qcom,osm-clk-rate = <200000000>;
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qcom,xo-clk-rate = <19200000>;
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|
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qcom,l-val-base = <0x17916004 0x17816004>;
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qcom,apcs-itm-present = <0x179d143c 0x179d143c>;
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qcom,apcs-pll-user-ctl = <0x1791600c 0x1781600c>;
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qcom,apcs-cfg-rcgr = <0x17911054 0x17811054>;
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qcom,apcs-cmd-rcgr = <0x17911050 0x17811050>;
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qcom,apm-mode-ctl = <0x179d0004 0x179d0010>;
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qcom,apm-ctrl-status = <0x179d000c 0x179d0018>;
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|
|
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qcom,apm-threshold-voltage = <872000>;
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qcom,boost-fsm-en;
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qcom,safe-fsm-en;
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qcom,ps-fsm-en;
|
|
qcom,droop-fsm-en;
|
|
qcom,wfx-fsm-en;
|
|
qcom,pc-fsm-en;
|
|
|
|
clock-names = "aux_clk", "xo_a";
|
|
clocks = <&clock_gcc HMSS_GPLL0_CLK_SRC>,
|
|
<&clock_rpmcc RPM_XO_A_CLK_SRC>;
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|
|
|
#clock-cells = <1>;
|
|
};
|
|
|