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91 lines
2.8 KiB
91 lines
2.8 KiB
/*
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* arch/ppc/platforms/mvme5100.h
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*
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* Definitions for Motorola MVME5100.
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*
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* Author: Matt Porter <mporter@mvista.com>
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*
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* 2001 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifdef __KERNEL__
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#ifndef __ASM_MVME5100_H__
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#define __ASM_MVME5100_H__
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#define MVME5100_HAWK_SMC_BASE 0xfef80000
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#define MVME5100_PCI_CONFIG_ADDR 0xfe000cf8
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#define MVME5100_PCI_CONFIG_DATA 0xfe000cfc
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#define MVME5100_PCI_IO_BASE 0xfe000000
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#define MVME5100_PCI_MEM_BASE 0x80000000
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#define MVME5100_PCI_MEM_OFFSET 0x00000000
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#define MVME5100_PCI_DRAM_OFFSET 0x00000000
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#define MVME5100_ISA_MEM_BASE 0x00000000
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#define MVME5100_ISA_IO_BASE MVME5100_PCI_IO_BASE
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#define MVME5100_PCI_LOWER_MEM 0x80000000
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#define MVME5100_PCI_UPPER_MEM 0xf3f7ffff
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#define MVME5100_PCI_LOWER_IO 0x00000000
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#define MVME5100_PCI_UPPER_IO 0x0077ffff
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/* MVME5100 board register addresses. */
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#define MVME5100_BOARD_STATUS_REG 0xfef88080
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#define MVME5100_BOARD_MODFAIL_REG 0xfef88090
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#define MVME5100_BOARD_MODRST_REG 0xfef880a0
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#define MVME5100_BOARD_TBEN_REG 0xfef880c0
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#define MVME5100_BOARD_SW_READ_REG 0xfef880e0
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#define MVME5100_BOARD_GEO_ADDR_REG 0xfef880e8
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#define MVME5100_BOARD_EXT_FEATURE1_REG 0xfef880f0
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#define MVME5100_BOARD_EXT_FEATURE2_REG 0xfef88100
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/* Define the NVRAM/RTC address strobe & data registers */
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#define MVME5100_PHYS_NVRAM_AS0 0xfef880c8
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#define MVME5100_PHYS_NVRAM_AS1 0xfef880d0
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#define MVME5100_PHYS_NVRAM_DATA 0xfef880d8
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#define MVME5100_NVRAM_AS0 (MVME5100_PHYS_NVRAM_AS0 - MVME5100_ISA_IO_BASE)
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#define MVME5100_NVRAM_AS1 (MVME5100_PHYS_NVRAM_AS1 - MVME5100_ISA_IO_BASE)
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#define MVME5100_NVRAM_DATA (MVME5100_PHYS_NVRAM_DATA - MVME5100_ISA_IO_BASE)
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/* UART clock, addresses, and irq */
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#define MVME5100_BASE_BAUD 1843200
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#define MVME5100_SERIAL_1 0xfef88000
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#define MVME5100_SERIAL_2 0xfef88200
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#ifdef CONFIG_MVME5100_IPMC761_PRESENT
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#define MVME5100_SERIAL_IRQ 17
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#else
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#define MVME5100_SERIAL_IRQ 1
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#endif
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#define RS_TABLE_SIZE 4
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#define BASE_BAUD ( MVME5100_BASE_BAUD / 16 )
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#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
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/* All UART IRQ's are wire-OR'd to one MPIC IRQ */
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#define STD_SERIAL_PORT_DFNS \
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{ 0, BASE_BAUD, MVME5100_SERIAL_1, \
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MVME5100_SERIAL_IRQ, \
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STD_COM_FLAGS, /* ttyS0 */ \
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iomem_base: (unsigned char *)MVME5100_SERIAL_1, \
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iomem_reg_shift: 4, \
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io_type: SERIAL_IO_MEM }, \
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{ 0, BASE_BAUD, MVME5100_SERIAL_2, \
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MVME5100_SERIAL_IRQ, \
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STD_COM_FLAGS, /* ttyS1 */ \
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iomem_base: (unsigned char *)MVME5100_SERIAL_2, \
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iomem_reg_shift: 4, \
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io_type: SERIAL_IO_MEM },
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#define SERIAL_PORT_DFNS \
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STD_SERIAL_PORT_DFNS
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#endif /* __ASM_MVME5100_H__ */
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#endif /* __KERNEL__ */
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