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46 lines
1.5 KiB
46 lines
1.5 KiB
/*
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* drivers/net/gianfar_mii.h
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*
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* Gianfar Ethernet Driver -- MII Management Bus Implementation
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* Driver for the MDIO bus controller in the Gianfar register space
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*
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* Author: Andy Fleming
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* Maintainer: Kumar Gala
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*
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* Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef __GIANFAR_MII_H
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#define __GIANFAR_MII_H
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#define MIIMIND_BUSY 0x00000001
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#define MIIMIND_NOTVALID 0x00000004
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#define MII_READ_COMMAND 0x00000001
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#define GFAR_SUPPORTED (SUPPORTED_10baseT_Half \
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| SUPPORTED_10baseT_Full \
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| SUPPORTED_100baseT_Half \
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| SUPPORTED_100baseT_Full \
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| SUPPORTED_Autoneg \
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| SUPPORTED_MII)
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struct gfar_mii {
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u32 miimcfg; /* 0x.520 - MII Management Config Register */
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u32 miimcom; /* 0x.524 - MII Management Command Register */
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u32 miimadd; /* 0x.528 - MII Management Address Register */
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u32 miimcon; /* 0x.52c - MII Management Control Register */
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u32 miimstat; /* 0x.530 - MII Management Status Register */
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u32 miimind; /* 0x.534 - MII Management Indicator Register */
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};
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int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
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int gfar_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
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int __init gfar_mdio_init(void);
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void gfar_mdio_exit(void);
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#endif /* GIANFAR_PHY_H */
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