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897 lines
21 KiB
897 lines
21 KiB
/*
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* Copyright (c) 2007, 2008, 2009 QLogic Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/mm.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/dmapool.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/highmem.h>
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#include <linux/io.h>
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#include <linux/uio.h>
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#include <linux/rbtree.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include "qib.h"
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#include "qib_user_sdma.h"
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/* minimum size of header */
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#define QIB_USER_SDMA_MIN_HEADER_LENGTH 64
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/* expected size of headers (for dma_pool) */
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#define QIB_USER_SDMA_EXP_HEADER_LENGTH 64
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/* attempt to drain the queue for 5secs */
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#define QIB_USER_SDMA_DRAIN_TIMEOUT 500
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struct qib_user_sdma_pkt {
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u8 naddr; /* dimension of addr (1..3) ... */
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u32 counter; /* sdma pkts queued counter for this entry */
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u64 added; /* global descq number of entries */
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struct {
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u32 offset; /* offset for kvaddr, addr */
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u32 length; /* length in page */
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u8 put_page; /* should we put_page? */
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u8 dma_mapped; /* is page dma_mapped? */
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struct page *page; /* may be NULL (coherent mem) */
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void *kvaddr; /* FIXME: only for pio hack */
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dma_addr_t addr;
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} addr[4]; /* max pages, any more and we coalesce */
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struct list_head list; /* list element */
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};
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struct qib_user_sdma_queue {
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/*
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* pkts sent to dma engine are queued on this
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* list head. the type of the elements of this
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* list are struct qib_user_sdma_pkt...
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*/
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struct list_head sent;
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/* headers with expected length are allocated from here... */
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char header_cache_name[64];
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struct dma_pool *header_cache;
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/* packets are allocated from the slab cache... */
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char pkt_slab_name[64];
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struct kmem_cache *pkt_slab;
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/* as packets go on the queued queue, they are counted... */
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u32 counter;
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u32 sent_counter;
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/* dma page table */
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struct rb_root dma_pages_root;
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/* protect everything above... */
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struct mutex lock;
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};
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struct qib_user_sdma_queue *
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qib_user_sdma_queue_create(struct device *dev, int unit, int ctxt, int sctxt)
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{
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struct qib_user_sdma_queue *pq =
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kmalloc(sizeof(struct qib_user_sdma_queue), GFP_KERNEL);
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if (!pq)
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goto done;
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pq->counter = 0;
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pq->sent_counter = 0;
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INIT_LIST_HEAD(&pq->sent);
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mutex_init(&pq->lock);
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snprintf(pq->pkt_slab_name, sizeof(pq->pkt_slab_name),
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"qib-user-sdma-pkts-%u-%02u.%02u", unit, ctxt, sctxt);
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pq->pkt_slab = kmem_cache_create(pq->pkt_slab_name,
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sizeof(struct qib_user_sdma_pkt),
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0, 0, NULL);
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if (!pq->pkt_slab)
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goto err_kfree;
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snprintf(pq->header_cache_name, sizeof(pq->header_cache_name),
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"qib-user-sdma-headers-%u-%02u.%02u", unit, ctxt, sctxt);
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pq->header_cache = dma_pool_create(pq->header_cache_name,
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dev,
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QIB_USER_SDMA_EXP_HEADER_LENGTH,
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4, 0);
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if (!pq->header_cache)
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goto err_slab;
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pq->dma_pages_root = RB_ROOT;
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goto done;
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err_slab:
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kmem_cache_destroy(pq->pkt_slab);
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err_kfree:
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kfree(pq);
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pq = NULL;
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done:
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return pq;
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}
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static void qib_user_sdma_init_frag(struct qib_user_sdma_pkt *pkt,
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int i, size_t offset, size_t len,
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int put_page, int dma_mapped,
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struct page *page,
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void *kvaddr, dma_addr_t dma_addr)
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{
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pkt->addr[i].offset = offset;
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pkt->addr[i].length = len;
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pkt->addr[i].put_page = put_page;
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pkt->addr[i].dma_mapped = dma_mapped;
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pkt->addr[i].page = page;
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pkt->addr[i].kvaddr = kvaddr;
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pkt->addr[i].addr = dma_addr;
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}
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static void qib_user_sdma_init_header(struct qib_user_sdma_pkt *pkt,
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u32 counter, size_t offset,
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size_t len, int dma_mapped,
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struct page *page,
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void *kvaddr, dma_addr_t dma_addr)
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{
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pkt->naddr = 1;
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pkt->counter = counter;
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qib_user_sdma_init_frag(pkt, 0, offset, len, 0, dma_mapped, page,
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kvaddr, dma_addr);
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}
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/* we've too many pages in the iovec, coalesce to a single page */
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static int qib_user_sdma_coalesce(const struct qib_devdata *dd,
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struct qib_user_sdma_pkt *pkt,
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const struct iovec *iov,
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unsigned long niov)
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{
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int ret = 0;
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struct page *page = alloc_page(GFP_KERNEL);
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void *mpage_save;
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char *mpage;
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int i;
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int len = 0;
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dma_addr_t dma_addr;
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if (!page) {
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ret = -ENOMEM;
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goto done;
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}
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mpage = kmap(page);
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mpage_save = mpage;
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for (i = 0; i < niov; i++) {
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int cfur;
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cfur = copy_from_user(mpage,
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iov[i].iov_base, iov[i].iov_len);
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if (cfur) {
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ret = -EFAULT;
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goto free_unmap;
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}
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mpage += iov[i].iov_len;
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len += iov[i].iov_len;
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}
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dma_addr = dma_map_page(&dd->pcidev->dev, page, 0, len,
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DMA_TO_DEVICE);
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if (dma_mapping_error(&dd->pcidev->dev, dma_addr)) {
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ret = -ENOMEM;
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goto free_unmap;
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}
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qib_user_sdma_init_frag(pkt, 1, 0, len, 0, 1, page, mpage_save,
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dma_addr);
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pkt->naddr = 2;
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goto done;
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free_unmap:
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kunmap(page);
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__free_page(page);
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done:
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return ret;
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}
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/*
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* How many pages in this iovec element?
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*/
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static int qib_user_sdma_num_pages(const struct iovec *iov)
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{
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const unsigned long addr = (unsigned long) iov->iov_base;
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const unsigned long len = iov->iov_len;
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const unsigned long spage = addr & PAGE_MASK;
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const unsigned long epage = (addr + len - 1) & PAGE_MASK;
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return 1 + ((epage - spage) >> PAGE_SHIFT);
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}
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/*
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* Truncate length to page boundry.
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*/
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static int qib_user_sdma_page_length(unsigned long addr, unsigned long len)
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{
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const unsigned long offset = addr & ~PAGE_MASK;
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return ((offset + len) > PAGE_SIZE) ? (PAGE_SIZE - offset) : len;
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}
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static void qib_user_sdma_free_pkt_frag(struct device *dev,
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struct qib_user_sdma_queue *pq,
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struct qib_user_sdma_pkt *pkt,
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int frag)
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{
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const int i = frag;
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if (pkt->addr[i].page) {
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if (pkt->addr[i].dma_mapped)
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dma_unmap_page(dev,
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pkt->addr[i].addr,
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pkt->addr[i].length,
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DMA_TO_DEVICE);
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if (pkt->addr[i].kvaddr)
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kunmap(pkt->addr[i].page);
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if (pkt->addr[i].put_page)
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put_page(pkt->addr[i].page);
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else
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__free_page(pkt->addr[i].page);
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} else if (pkt->addr[i].kvaddr)
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/* free coherent mem from cache... */
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dma_pool_free(pq->header_cache,
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pkt->addr[i].kvaddr, pkt->addr[i].addr);
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}
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/* return number of pages pinned... */
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static int qib_user_sdma_pin_pages(const struct qib_devdata *dd,
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struct qib_user_sdma_pkt *pkt,
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unsigned long addr, int tlen, int npages)
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{
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struct page *pages[2];
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int j;
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int ret;
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ret = get_user_pages(current, current->mm, addr,
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npages, 0, 1, pages, NULL);
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if (ret != npages) {
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int i;
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for (i = 0; i < ret; i++)
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put_page(pages[i]);
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ret = -ENOMEM;
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goto done;
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}
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for (j = 0; j < npages; j++) {
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/* map the pages... */
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const int flen = qib_user_sdma_page_length(addr, tlen);
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dma_addr_t dma_addr =
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dma_map_page(&dd->pcidev->dev,
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pages[j], 0, flen, DMA_TO_DEVICE);
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unsigned long fofs = addr & ~PAGE_MASK;
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if (dma_mapping_error(&dd->pcidev->dev, dma_addr)) {
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ret = -ENOMEM;
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goto done;
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}
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qib_user_sdma_init_frag(pkt, pkt->naddr, fofs, flen, 1, 1,
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pages[j], kmap(pages[j]), dma_addr);
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pkt->naddr++;
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addr += flen;
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tlen -= flen;
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}
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done:
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return ret;
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}
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static int qib_user_sdma_pin_pkt(const struct qib_devdata *dd,
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struct qib_user_sdma_queue *pq,
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struct qib_user_sdma_pkt *pkt,
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const struct iovec *iov,
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unsigned long niov)
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{
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int ret = 0;
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unsigned long idx;
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for (idx = 0; idx < niov; idx++) {
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const int npages = qib_user_sdma_num_pages(iov + idx);
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const unsigned long addr = (unsigned long) iov[idx].iov_base;
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ret = qib_user_sdma_pin_pages(dd, pkt, addr,
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iov[idx].iov_len, npages);
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if (ret < 0)
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goto free_pkt;
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}
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goto done;
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free_pkt:
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for (idx = 0; idx < pkt->naddr; idx++)
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qib_user_sdma_free_pkt_frag(&dd->pcidev->dev, pq, pkt, idx);
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done:
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return ret;
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}
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static int qib_user_sdma_init_payload(const struct qib_devdata *dd,
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struct qib_user_sdma_queue *pq,
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struct qib_user_sdma_pkt *pkt,
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const struct iovec *iov,
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unsigned long niov, int npages)
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{
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int ret = 0;
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if (npages >= ARRAY_SIZE(pkt->addr))
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ret = qib_user_sdma_coalesce(dd, pkt, iov, niov);
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else
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ret = qib_user_sdma_pin_pkt(dd, pq, pkt, iov, niov);
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return ret;
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}
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/* free a packet list -- return counter value of last packet */
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static void qib_user_sdma_free_pkt_list(struct device *dev,
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struct qib_user_sdma_queue *pq,
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struct list_head *list)
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{
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struct qib_user_sdma_pkt *pkt, *pkt_next;
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list_for_each_entry_safe(pkt, pkt_next, list, list) {
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int i;
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for (i = 0; i < pkt->naddr; i++)
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qib_user_sdma_free_pkt_frag(dev, pq, pkt, i);
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kmem_cache_free(pq->pkt_slab, pkt);
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}
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}
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|
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/*
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* copy headers, coalesce etc -- pq->lock must be held
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*
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* we queue all the packets to list, returning the
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* number of bytes total. list must be empty initially,
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* as, if there is an error we clean it...
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*/
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static int qib_user_sdma_queue_pkts(const struct qib_devdata *dd,
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struct qib_user_sdma_queue *pq,
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struct list_head *list,
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const struct iovec *iov,
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unsigned long niov,
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int maxpkts)
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{
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unsigned long idx = 0;
|
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int ret = 0;
|
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int npkts = 0;
|
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struct page *page = NULL;
|
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__le32 *pbc;
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dma_addr_t dma_addr;
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struct qib_user_sdma_pkt *pkt = NULL;
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size_t len;
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size_t nw;
|
|
u32 counter = pq->counter;
|
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int dma_mapped = 0;
|
|
|
|
while (idx < niov && npkts < maxpkts) {
|
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const unsigned long addr = (unsigned long) iov[idx].iov_base;
|
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const unsigned long idx_save = idx;
|
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unsigned pktnw;
|
|
unsigned pktnwc;
|
|
int nfrags = 0;
|
|
int npages = 0;
|
|
int cfur;
|
|
|
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dma_mapped = 0;
|
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len = iov[idx].iov_len;
|
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nw = len >> 2;
|
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page = NULL;
|
|
|
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pkt = kmem_cache_alloc(pq->pkt_slab, GFP_KERNEL);
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if (!pkt) {
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ret = -ENOMEM;
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goto free_list;
|
|
}
|
|
|
|
if (len < QIB_USER_SDMA_MIN_HEADER_LENGTH ||
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len > PAGE_SIZE || len & 3 || addr & 3) {
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ret = -EINVAL;
|
|
goto free_pkt;
|
|
}
|
|
|
|
if (len == QIB_USER_SDMA_EXP_HEADER_LENGTH)
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|
pbc = dma_pool_alloc(pq->header_cache, GFP_KERNEL,
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&dma_addr);
|
|
else
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pbc = NULL;
|
|
|
|
if (!pbc) {
|
|
page = alloc_page(GFP_KERNEL);
|
|
if (!page) {
|
|
ret = -ENOMEM;
|
|
goto free_pkt;
|
|
}
|
|
pbc = kmap(page);
|
|
}
|
|
|
|
cfur = copy_from_user(pbc, iov[idx].iov_base, len);
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|
if (cfur) {
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|
ret = -EFAULT;
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|
goto free_pbc;
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|
}
|
|
|
|
/*
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|
* This assignment is a bit strange. it's because the
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|
* the pbc counts the number of 32 bit words in the full
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|
* packet _except_ the first word of the pbc itself...
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|
*/
|
|
pktnwc = nw - 1;
|
|
|
|
/*
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|
* pktnw computation yields the number of 32 bit words
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|
* that the caller has indicated in the PBC. note that
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|
* this is one less than the total number of words that
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|
* goes to the send DMA engine as the first 32 bit word
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|
* of the PBC itself is not counted. Armed with this count,
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|
* we can verify that the packet is consistent with the
|
|
* iovec lengths.
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|
*/
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|
pktnw = le32_to_cpu(*pbc) & QIB_PBC_LENGTH_MASK;
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if (pktnw < pktnwc || pktnw > pktnwc + (PAGE_SIZE >> 2)) {
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ret = -EINVAL;
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goto free_pbc;
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|
}
|
|
|
|
idx++;
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|
while (pktnwc < pktnw && idx < niov) {
|
|
const size_t slen = iov[idx].iov_len;
|
|
const unsigned long faddr =
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|
(unsigned long) iov[idx].iov_base;
|
|
|
|
if (slen & 3 || faddr & 3 || !slen ||
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slen > PAGE_SIZE) {
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ret = -EINVAL;
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|
goto free_pbc;
|
|
}
|
|
|
|
npages++;
|
|
if ((faddr & PAGE_MASK) !=
|
|
((faddr + slen - 1) & PAGE_MASK))
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|
npages++;
|
|
|
|
pktnwc += slen >> 2;
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|
idx++;
|
|
nfrags++;
|
|
}
|
|
|
|
if (pktnwc != pktnw) {
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|
ret = -EINVAL;
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|
goto free_pbc;
|
|
}
|
|
|
|
if (page) {
|
|
dma_addr = dma_map_page(&dd->pcidev->dev,
|
|
page, 0, len, DMA_TO_DEVICE);
|
|
if (dma_mapping_error(&dd->pcidev->dev, dma_addr)) {
|
|
ret = -ENOMEM;
|
|
goto free_pbc;
|
|
}
|
|
|
|
dma_mapped = 1;
|
|
}
|
|
|
|
qib_user_sdma_init_header(pkt, counter, 0, len, dma_mapped,
|
|
page, pbc, dma_addr);
|
|
|
|
if (nfrags) {
|
|
ret = qib_user_sdma_init_payload(dd, pq, pkt,
|
|
iov + idx_save + 1,
|
|
nfrags, npages);
|
|
if (ret < 0)
|
|
goto free_pbc_dma;
|
|
}
|
|
|
|
counter++;
|
|
npkts++;
|
|
|
|
list_add_tail(&pkt->list, list);
|
|
}
|
|
|
|
ret = idx;
|
|
goto done;
|
|
|
|
free_pbc_dma:
|
|
if (dma_mapped)
|
|
dma_unmap_page(&dd->pcidev->dev, dma_addr, len, DMA_TO_DEVICE);
|
|
free_pbc:
|
|
if (page) {
|
|
kunmap(page);
|
|
__free_page(page);
|
|
} else
|
|
dma_pool_free(pq->header_cache, pbc, dma_addr);
|
|
free_pkt:
|
|
kmem_cache_free(pq->pkt_slab, pkt);
|
|
free_list:
|
|
qib_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, list);
|
|
done:
|
|
return ret;
|
|
}
|
|
|
|
static void qib_user_sdma_set_complete_counter(struct qib_user_sdma_queue *pq,
|
|
u32 c)
|
|
{
|
|
pq->sent_counter = c;
|
|
}
|
|
|
|
/* try to clean out queue -- needs pq->lock */
|
|
static int qib_user_sdma_queue_clean(struct qib_pportdata *ppd,
|
|
struct qib_user_sdma_queue *pq)
|
|
{
|
|
struct qib_devdata *dd = ppd->dd;
|
|
struct list_head free_list;
|
|
struct qib_user_sdma_pkt *pkt;
|
|
struct qib_user_sdma_pkt *pkt_prev;
|
|
int ret = 0;
|
|
|
|
INIT_LIST_HEAD(&free_list);
|
|
|
|
list_for_each_entry_safe(pkt, pkt_prev, &pq->sent, list) {
|
|
s64 descd = ppd->sdma_descq_removed - pkt->added;
|
|
|
|
if (descd < 0)
|
|
break;
|
|
|
|
list_move_tail(&pkt->list, &free_list);
|
|
|
|
/* one more packet cleaned */
|
|
ret++;
|
|
}
|
|
|
|
if (!list_empty(&free_list)) {
|
|
u32 counter;
|
|
|
|
pkt = list_entry(free_list.prev,
|
|
struct qib_user_sdma_pkt, list);
|
|
counter = pkt->counter;
|
|
|
|
qib_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, &free_list);
|
|
qib_user_sdma_set_complete_counter(pq, counter);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
void qib_user_sdma_queue_destroy(struct qib_user_sdma_queue *pq)
|
|
{
|
|
if (!pq)
|
|
return;
|
|
|
|
kmem_cache_destroy(pq->pkt_slab);
|
|
dma_pool_destroy(pq->header_cache);
|
|
kfree(pq);
|
|
}
|
|
|
|
/* clean descriptor queue, returns > 0 if some elements cleaned */
|
|
static int qib_user_sdma_hwqueue_clean(struct qib_pportdata *ppd)
|
|
{
|
|
int ret;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&ppd->sdma_lock, flags);
|
|
ret = qib_sdma_make_progress(ppd);
|
|
spin_unlock_irqrestore(&ppd->sdma_lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* we're in close, drain packets so that we can cleanup successfully... */
|
|
void qib_user_sdma_queue_drain(struct qib_pportdata *ppd,
|
|
struct qib_user_sdma_queue *pq)
|
|
{
|
|
struct qib_devdata *dd = ppd->dd;
|
|
int i;
|
|
|
|
if (!pq)
|
|
return;
|
|
|
|
for (i = 0; i < QIB_USER_SDMA_DRAIN_TIMEOUT; i++) {
|
|
mutex_lock(&pq->lock);
|
|
if (list_empty(&pq->sent)) {
|
|
mutex_unlock(&pq->lock);
|
|
break;
|
|
}
|
|
qib_user_sdma_hwqueue_clean(ppd);
|
|
qib_user_sdma_queue_clean(ppd, pq);
|
|
mutex_unlock(&pq->lock);
|
|
msleep(10);
|
|
}
|
|
|
|
if (!list_empty(&pq->sent)) {
|
|
struct list_head free_list;
|
|
|
|
qib_dev_err(dd, "user sdma lists not empty: forcing!\n");
|
|
INIT_LIST_HEAD(&free_list);
|
|
mutex_lock(&pq->lock);
|
|
list_splice_init(&pq->sent, &free_list);
|
|
qib_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, &free_list);
|
|
mutex_unlock(&pq->lock);
|
|
}
|
|
}
|
|
|
|
static inline __le64 qib_sdma_make_desc0(struct qib_pportdata *ppd,
|
|
u64 addr, u64 dwlen, u64 dwoffset)
|
|
{
|
|
u8 tmpgen;
|
|
|
|
tmpgen = ppd->sdma_generation;
|
|
|
|
return cpu_to_le64(/* SDmaPhyAddr[31:0] */
|
|
((addr & 0xfffffffcULL) << 32) |
|
|
/* SDmaGeneration[1:0] */
|
|
((tmpgen & 3ULL) << 30) |
|
|
/* SDmaDwordCount[10:0] */
|
|
((dwlen & 0x7ffULL) << 16) |
|
|
/* SDmaBufOffset[12:2] */
|
|
(dwoffset & 0x7ffULL));
|
|
}
|
|
|
|
static inline __le64 qib_sdma_make_first_desc0(__le64 descq)
|
|
{
|
|
return descq | cpu_to_le64(1ULL << 12);
|
|
}
|
|
|
|
static inline __le64 qib_sdma_make_last_desc0(__le64 descq)
|
|
{
|
|
/* last */ /* dma head */
|
|
return descq | cpu_to_le64(1ULL << 11 | 1ULL << 13);
|
|
}
|
|
|
|
static inline __le64 qib_sdma_make_desc1(u64 addr)
|
|
{
|
|
/* SDmaPhyAddr[47:32] */
|
|
return cpu_to_le64(addr >> 32);
|
|
}
|
|
|
|
static void qib_user_sdma_send_frag(struct qib_pportdata *ppd,
|
|
struct qib_user_sdma_pkt *pkt, int idx,
|
|
unsigned ofs, u16 tail)
|
|
{
|
|
const u64 addr = (u64) pkt->addr[idx].addr +
|
|
(u64) pkt->addr[idx].offset;
|
|
const u64 dwlen = (u64) pkt->addr[idx].length / 4;
|
|
__le64 *descqp;
|
|
__le64 descq0;
|
|
|
|
descqp = &ppd->sdma_descq[tail].qw[0];
|
|
|
|
descq0 = qib_sdma_make_desc0(ppd, addr, dwlen, ofs);
|
|
if (idx == 0)
|
|
descq0 = qib_sdma_make_first_desc0(descq0);
|
|
if (idx == pkt->naddr - 1)
|
|
descq0 = qib_sdma_make_last_desc0(descq0);
|
|
|
|
descqp[0] = descq0;
|
|
descqp[1] = qib_sdma_make_desc1(addr);
|
|
}
|
|
|
|
/* pq->lock must be held, get packets on the wire... */
|
|
static int qib_user_sdma_push_pkts(struct qib_pportdata *ppd,
|
|
struct qib_user_sdma_queue *pq,
|
|
struct list_head *pktlist)
|
|
{
|
|
struct qib_devdata *dd = ppd->dd;
|
|
int ret = 0;
|
|
unsigned long flags;
|
|
u16 tail;
|
|
u8 generation;
|
|
u64 descq_added;
|
|
|
|
if (list_empty(pktlist))
|
|
return 0;
|
|
|
|
if (unlikely(!(ppd->lflags & QIBL_LINKACTIVE)))
|
|
return -ECOMM;
|
|
|
|
spin_lock_irqsave(&ppd->sdma_lock, flags);
|
|
|
|
/* keep a copy for restoring purposes in case of problems */
|
|
generation = ppd->sdma_generation;
|
|
descq_added = ppd->sdma_descq_added;
|
|
|
|
if (unlikely(!__qib_sdma_running(ppd))) {
|
|
ret = -ECOMM;
|
|
goto unlock;
|
|
}
|
|
|
|
tail = ppd->sdma_descq_tail;
|
|
while (!list_empty(pktlist)) {
|
|
struct qib_user_sdma_pkt *pkt =
|
|
list_entry(pktlist->next, struct qib_user_sdma_pkt,
|
|
list);
|
|
int i;
|
|
unsigned ofs = 0;
|
|
u16 dtail = tail;
|
|
|
|
if (pkt->naddr > qib_sdma_descq_freecnt(ppd))
|
|
goto unlock_check_tail;
|
|
|
|
for (i = 0; i < pkt->naddr; i++) {
|
|
qib_user_sdma_send_frag(ppd, pkt, i, ofs, tail);
|
|
ofs += pkt->addr[i].length >> 2;
|
|
|
|
if (++tail == ppd->sdma_descq_cnt) {
|
|
tail = 0;
|
|
++ppd->sdma_generation;
|
|
}
|
|
}
|
|
|
|
if ((ofs << 2) > ppd->ibmaxlen) {
|
|
ret = -EMSGSIZE;
|
|
goto unlock;
|
|
}
|
|
|
|
/*
|
|
* If the packet is >= 2KB mtu equivalent, we have to use
|
|
* the large buffers, and have to mark each descriptor as
|
|
* part of a large buffer packet.
|
|
*/
|
|
if (ofs > dd->piosize2kmax_dwords) {
|
|
for (i = 0; i < pkt->naddr; i++) {
|
|
ppd->sdma_descq[dtail].qw[0] |=
|
|
cpu_to_le64(1ULL << 14);
|
|
if (++dtail == ppd->sdma_descq_cnt)
|
|
dtail = 0;
|
|
}
|
|
}
|
|
|
|
ppd->sdma_descq_added += pkt->naddr;
|
|
pkt->added = ppd->sdma_descq_added;
|
|
list_move_tail(&pkt->list, &pq->sent);
|
|
ret++;
|
|
}
|
|
|
|
unlock_check_tail:
|
|
/* advance the tail on the chip if necessary */
|
|
if (ppd->sdma_descq_tail != tail)
|
|
dd->f_sdma_update_tail(ppd, tail);
|
|
|
|
unlock:
|
|
if (unlikely(ret < 0)) {
|
|
ppd->sdma_generation = generation;
|
|
ppd->sdma_descq_added = descq_added;
|
|
}
|
|
spin_unlock_irqrestore(&ppd->sdma_lock, flags);
|
|
|
|
return ret;
|
|
}
|
|
|
|
int qib_user_sdma_writev(struct qib_ctxtdata *rcd,
|
|
struct qib_user_sdma_queue *pq,
|
|
const struct iovec *iov,
|
|
unsigned long dim)
|
|
{
|
|
struct qib_devdata *dd = rcd->dd;
|
|
struct qib_pportdata *ppd = rcd->ppd;
|
|
int ret = 0;
|
|
struct list_head list;
|
|
int npkts = 0;
|
|
|
|
INIT_LIST_HEAD(&list);
|
|
|
|
mutex_lock(&pq->lock);
|
|
|
|
/* why not -ECOMM like qib_user_sdma_push_pkts() below? */
|
|
if (!qib_sdma_running(ppd))
|
|
goto done_unlock;
|
|
|
|
if (ppd->sdma_descq_added != ppd->sdma_descq_removed) {
|
|
qib_user_sdma_hwqueue_clean(ppd);
|
|
qib_user_sdma_queue_clean(ppd, pq);
|
|
}
|
|
|
|
while (dim) {
|
|
const int mxp = 8;
|
|
|
|
down_write(¤t->mm->mmap_sem);
|
|
ret = qib_user_sdma_queue_pkts(dd, pq, &list, iov, dim, mxp);
|
|
up_write(¤t->mm->mmap_sem);
|
|
|
|
if (ret <= 0)
|
|
goto done_unlock;
|
|
else {
|
|
dim -= ret;
|
|
iov += ret;
|
|
}
|
|
|
|
/* force packets onto the sdma hw queue... */
|
|
if (!list_empty(&list)) {
|
|
/*
|
|
* Lazily clean hw queue. the 4 is a guess of about
|
|
* how many sdma descriptors a packet will take (it
|
|
* doesn't have to be perfect).
|
|
*/
|
|
if (qib_sdma_descq_freecnt(ppd) < ret * 4) {
|
|
qib_user_sdma_hwqueue_clean(ppd);
|
|
qib_user_sdma_queue_clean(ppd, pq);
|
|
}
|
|
|
|
ret = qib_user_sdma_push_pkts(ppd, pq, &list);
|
|
if (ret < 0)
|
|
goto done_unlock;
|
|
else {
|
|
npkts += ret;
|
|
pq->counter += ret;
|
|
|
|
if (!list_empty(&list))
|
|
goto done_unlock;
|
|
}
|
|
}
|
|
}
|
|
|
|
done_unlock:
|
|
if (!list_empty(&list))
|
|
qib_user_sdma_free_pkt_list(&dd->pcidev->dev, pq, &list);
|
|
mutex_unlock(&pq->lock);
|
|
|
|
return (ret < 0) ? ret : npkts;
|
|
}
|
|
|
|
int qib_user_sdma_make_progress(struct qib_pportdata *ppd,
|
|
struct qib_user_sdma_queue *pq)
|
|
{
|
|
int ret = 0;
|
|
|
|
mutex_lock(&pq->lock);
|
|
qib_user_sdma_hwqueue_clean(ppd);
|
|
ret = qib_user_sdma_queue_clean(ppd, pq);
|
|
mutex_unlock(&pq->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
u32 qib_user_sdma_complete_counter(const struct qib_user_sdma_queue *pq)
|
|
{
|
|
return pq ? pq->sent_counter : 0;
|
|
}
|
|
|
|
u32 qib_user_sdma_inflight_counter(struct qib_user_sdma_queue *pq)
|
|
{
|
|
return pq ? pq->counter : 0;
|
|
}
|
|
|