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391 lines
8.8 KiB
391 lines
8.8 KiB
/*
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* misc.c
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*
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* This is a collection of several routines from gzip-1.0.3
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* adapted for Linux.
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*
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* malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
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* puts by Nick Holloway 1993, better puts by Martin Mares 1995
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* adaptation for Linux/CRIS Axis Communications AB, 1999
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*
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*/
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/* where the piggybacked kernel image expects itself to live.
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* it is the same address we use when we network load an uncompressed
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* image into DRAM, and it is the address the kernel is linked to live
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* at by vmlinux.lds.S
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*/
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#define KERNEL_LOAD_ADR 0x40004000
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#include <linux/types.h>
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#ifdef CONFIG_ETRAX_ARCH_V32
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#include <hwregs/reg_rdwr.h>
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#include <hwregs/reg_map.h>
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#include <hwregs/ser_defs.h>
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#include <hwregs/pinmux_defs.h>
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#ifdef CONFIG_CRIS_MACH_ARTPEC3
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#include <hwregs/clkgen_defs.h>
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#endif
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#else
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#include <arch/svinto.h>
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#endif
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/*
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* gzip declarations
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*/
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#define OF(args) args
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#define STATIC static
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void *memset(void *s, int c, size_t n);
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void *memcpy(void *__dest, __const void *__src, size_t __n);
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#define memzero(s, n) memset((s), 0, (n))
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typedef unsigned char uch;
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typedef unsigned short ush;
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typedef unsigned long ulg;
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#define WSIZE 0x8000 /* Window size must be at least 32k, */
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/* and a power of two */
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static uch *inbuf; /* input buffer */
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static uch window[WSIZE]; /* Sliding window buffer */
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unsigned inptr = 0; /* index of next byte to be processed in inbuf
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* After decompression it will contain the
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* compressed size, and head.S will read it.
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*/
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static unsigned outcnt = 0; /* bytes in output buffer */
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/* gzip flag byte */
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#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */
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#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
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#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
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#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
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#define COMMENT 0x10 /* bit 4 set: file comment present */
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#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
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#define RESERVED 0xC0 /* bit 6,7: reserved */
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#define get_byte() (inbuf[inptr++])
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/* Diagnostic functions */
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#ifdef DEBUG
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# define Assert(cond, msg) do { \
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if (!(cond)) \
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error(msg); \
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} while (0)
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# define Trace(x) fprintf x
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# define Tracev(x) do { \
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if (verbose) \
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fprintf x; \
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} while (0)
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# define Tracevv(x) do { \
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if (verbose > 1) \
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fprintf x; \
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} while (0)
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# define Tracec(c, x) do { \
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if (verbose && (c)) \
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fprintf x; \
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} while (0)
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# define Tracecv(c, x) do { \
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if (verbose > 1 && (c)) \
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fprintf x; \
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} while (0)
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#else
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# define Assert(cond, msg)
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# define Trace(x)
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# define Tracev(x)
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# define Tracevv(x)
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# define Tracec(c, x)
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# define Tracecv(c, x)
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#endif
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static void flush_window(void);
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static void error(char *m);
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static void puts(const char *);
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extern char *input_data; /* lives in head.S */
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static long bytes_out;
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static uch *output_data;
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static unsigned long output_ptr;
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/* the "heap" is put directly after the BSS ends, at end */
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extern int _end;
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static long free_mem_ptr = (long)&_end;
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static long free_mem_end_ptr;
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#include "../../../../../lib/inflate.c"
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/* decompressor info and error messages to serial console */
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#ifdef CONFIG_ETRAX_ARCH_V32
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static inline void serout(const char *s, reg_scope_instances regi_ser)
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{
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reg_ser_rs_stat_din rs;
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reg_ser_rw_dout dout = {.data = *s};
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do {
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rs = REG_RD(ser, regi_ser, rs_stat_din);
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}
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while (!rs.tr_rdy);/* Wait for transceiver. */
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REG_WR(ser, regi_ser, rw_dout, dout);
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}
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#endif
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static void puts(const char *s)
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{
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#ifndef CONFIG_ETRAX_DEBUG_PORT_NULL
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while (*s) {
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#ifdef CONFIG_ETRAX_DEBUG_PORT0
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#ifdef CONFIG_ETRAX_ARCH_V32
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serout(s, regi_ser0);
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#else
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while (!(*R_SERIAL0_STATUS & (1 << 5)))
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;
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*R_SERIAL0_TR_DATA = *s++;
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#endif
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT1
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#ifdef CONFIG_ETRAX_ARCH_V32
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serout(s, regi_ser1);
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#else
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while (!(*R_SERIAL1_STATUS & (1 << 5)))
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;
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*R_SERIAL1_TR_DATA = *s++;
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#endif
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT2
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#ifdef CONFIG_ETRAX_ARCH_V32
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serout(s, regi_ser2);
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#else
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while (!(*R_SERIAL2_STATUS & (1 << 5)))
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;
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*R_SERIAL2_TR_DATA = *s++;
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#endif
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT3
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#ifdef CONFIG_ETRAX_ARCH_V32
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serout(s, regi_ser3);
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#else
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while (!(*R_SERIAL3_STATUS & (1 << 5)))
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;
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*R_SERIAL3_TR_DATA = *s++;
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#endif
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#endif
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*s++;
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}
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/* CONFIG_ETRAX_DEBUG_PORT_NULL */
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#endif
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}
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void *memset(void *s, int c, size_t n)
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{
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int i;
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char *ss = (char*)s;
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for (i=0;i<n;i++) ss[i] = c;
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return s;
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}
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void *memcpy(void *__dest, __const void *__src, size_t __n)
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{
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int i;
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char *d = (char *)__dest, *s = (char *)__src;
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for (i = 0; i < __n; i++)
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d[i] = s[i];
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return __dest;
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}
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/* ===========================================================================
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* Write the output window window[0..outcnt-1] and update crc and bytes_out.
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* (Used for the decompressed data only.)
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*/
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static void flush_window(void)
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{
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ulg c = crc; /* temporary variable */
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unsigned n;
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uch *in, *out, ch;
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in = window;
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out = &output_data[output_ptr];
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for (n = 0; n < outcnt; n++) {
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ch = *out = *in;
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out++;
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in++;
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c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
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}
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crc = c;
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bytes_out += (ulg)outcnt;
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output_ptr += (ulg)outcnt;
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outcnt = 0;
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}
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static void error(char *x)
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{
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puts("\n\n");
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puts(x);
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puts("\n\n -- System halted\n");
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while(1); /* Halt */
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}
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void setup_normal_output_buffer(void)
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{
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output_data = (char *)KERNEL_LOAD_ADR;
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}
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#ifdef CONFIG_ETRAX_ARCH_V32
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static inline void serial_setup(reg_scope_instances regi_ser)
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{
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reg_ser_rw_xoff xoff;
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reg_ser_rw_tr_ctrl tr_ctrl;
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reg_ser_rw_rec_ctrl rec_ctrl;
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reg_ser_rw_tr_baud_div tr_baud;
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reg_ser_rw_rec_baud_div rec_baud;
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/* Turn off XOFF. */
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xoff = REG_RD(ser, regi_ser, rw_xoff);
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xoff.chr = 0;
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xoff.automatic = regk_ser_no;
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REG_WR(ser, regi_ser, rw_xoff, xoff);
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/* Set baudrate and stopbits. */
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tr_ctrl = REG_RD(ser, regi_ser, rw_tr_ctrl);
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rec_ctrl = REG_RD(ser, regi_ser, rw_rec_ctrl);
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tr_baud = REG_RD(ser, regi_ser, rw_tr_baud_div);
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rec_baud = REG_RD(ser, regi_ser, rw_rec_baud_div);
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tr_ctrl.stop_bits = 1; /* 2 stop bits. */
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tr_ctrl.en = 1; /* enable transmitter */
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rec_ctrl.en = 1; /* enabler receiver */
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/*
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* The baudrate setup used to be a bit fishy, but now transmitter and
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* receiver are both set to the intended baud rate, 115200.
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* The magic value is 29.493 MHz.
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*/
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tr_ctrl.base_freq = regk_ser_f29_493;
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rec_ctrl.base_freq = regk_ser_f29_493;
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tr_baud.div = (29493000 / 8) / 115200;
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rec_baud.div = (29493000 / 8) / 115200;
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REG_WR(ser, regi_ser, rw_tr_ctrl, tr_ctrl);
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REG_WR(ser, regi_ser, rw_tr_baud_div, tr_baud);
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REG_WR(ser, regi_ser, rw_rec_ctrl, rec_ctrl);
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REG_WR(ser, regi_ser, rw_rec_baud_div, rec_baud);
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}
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#endif
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void decompress_kernel(void)
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{
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char revision;
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char compile_rev;
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#ifdef CONFIG_ETRAX_ARCH_V32
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/* Need at least a CRISv32 to run. */
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compile_rev = 32;
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#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
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defined(CONFIG_ETRAX_DEBUG_PORT2) || \
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defined(CONFIG_ETRAX_DEBUG_PORT3)
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reg_pinmux_rw_hwprot hwprot;
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#ifdef CONFIG_CRIS_MACH_ARTPEC3
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reg_clkgen_rw_clk_ctrl clk_ctrl;
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/* Enable corresponding clock region when serial 1..3 selected */
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clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl);
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clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes;
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REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl);
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#endif
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/* pinmux setup for ports 1..3 */
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hwprot = REG_RD(pinmux, regi_pinmux, rw_hwprot);
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT0
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serial_setup(regi_ser0);
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT1
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hwprot.ser1 = regk_pinmux_yes;
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serial_setup(regi_ser1);
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT2
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hwprot.ser2 = regk_pinmux_yes;
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serial_setup(regi_ser2);
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT3
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hwprot.ser3 = regk_pinmux_yes;
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serial_setup(regi_ser3);
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#endif
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#if defined(CONFIG_ETRAX_DEBUG_PORT1) || \
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defined(CONFIG_ETRAX_DEBUG_PORT2) || \
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defined(CONFIG_ETRAX_DEBUG_PORT3)
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REG_WR(pinmux, regi_pinmux, rw_hwprot, hwprot);
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#endif
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/* input_data is set in head.S */
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inbuf = input_data;
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#else /* CRISv10 */
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/* Need at least a crisv10 to run. */
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compile_rev = 10;
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/* input_data is set in head.S */
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inbuf = input_data;
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#ifdef CONFIG_ETRAX_DEBUG_PORT0
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*R_SERIAL0_XOFF = 0;
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*R_SERIAL0_BAUD = 0x99;
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*R_SERIAL0_TR_CTRL = 0x40;
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT1
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*R_SERIAL1_XOFF = 0;
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*R_SERIAL1_BAUD = 0x99;
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*R_SERIAL1_TR_CTRL = 0x40;
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT2
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*R_GEN_CONFIG = 0x08;
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*R_SERIAL2_XOFF = 0;
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*R_SERIAL2_BAUD = 0x99;
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*R_SERIAL2_TR_CTRL = 0x40;
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#endif
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#ifdef CONFIG_ETRAX_DEBUG_PORT3
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*R_GEN_CONFIG = 0x100;
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*R_SERIAL3_XOFF = 0;
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*R_SERIAL3_BAUD = 0x99;
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*R_SERIAL3_TR_CTRL = 0x40;
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#endif
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#endif
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setup_normal_output_buffer();
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makecrc();
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__asm__ volatile ("move $vr,%0" : "=rm" (revision));
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if (revision < compile_rev) {
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#ifdef CONFIG_ETRAX_ARCH_V32
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puts("You need an ETRAX FS to run Linux 2.6/crisv32\n");
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#else
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puts("You need an ETRAX 100LX to run linux 2.6\n");
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#endif
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while(1);
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}
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puts("Uncompressing Linux...\n");
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gunzip();
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puts("Done. Now booting the kernel\n");
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}
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