kernel_samsung_sm7125

jenna

History

Linus Torvalds 18a8d49973 The clock framework changes for 3.20 contain the usual driver additions, enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based devices. Additionaly the framework core underwent a bit of surgery with two major changes. The boundary between the clock core and clock providers (e.g clock drivers) is now more well defined with dedicated provider helper functions. struct clk no longer maps 1:1 with the hardware clock but is a true per-user cookie which helps us tracker users of hardware clocks and debug bad behavior. The second major change is the addition of rate constraints for clocks. Rate ranges are now supported which are analogous to the voltage ranges in the regulator framework. Unfortunately these changes to the core created some breakeage. We think we fixed it all up but for this reason there are lots of last minute commits trying to undo the damage. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJU54D5AAoJEDqPOy9afJhJs6AQAK5YuUwjDchdpNZx9p7OnT1q +poehuUwE/gYjmdACqYFyaPrI/9f43iNCfFAgKGLQqmB5ZK4sm4ktzfBEhjWINR2 iiCx9QYMQVGiKwC8KU0ddeBciglE2b/DwxB45m9TsJEjowucUeBzwLEIj5DsGxf7 teXRoOWgXdz1MkQJ4pnA09Q3qEPQgmu8prhMfka/v75/yn7nb9VWiJ6seR2GqTKY sIKL9WbKjN4AzctggdqHnMSIqZoq6vew850bv2C1fPn7GiYFQfWW+jvMlVY40dp8 nNa2ixSQSIXVw4fCtZhTIZcIvZ8puc7WVLcl8fz3mUe3VJn1VaGs0E+Yd3GexpIV 7bwkTOIdS8gSRlsUaIPiMnUob5TUMmMqjF4KIh/AhP4dYrmVbU7Ie8ccvSxe31Ku lK7ww6BFv3KweTnW/58856ZXDlXLC6x3KT+Fw58L23VhPToFgYOdTxn8AVtE/LKP YR3UnY9BqFx6WHXVoNvg3Piyej7RH8fYmE9om8tyWc/Ab8Eo501SHs9l3b2J8snf w/5STd2CYxyKf1/9JLGnBvGo754O9NvdzBttRlygB14gCCtS/SDk/ELG2Ae+/a9P YgRk2+257h8PMD3qlp94dLidEZN4kYxP/J6oj0t1/TIkERWfZjzkg5tKn3/hEcU9 qM97ZBTplTm6FM+Dt/Vk =zCVK -----END PGP SIGNATURE----- Merge tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux Pull clock framework updates from Mike Turquette: "The clock framework changes contain the usual driver additions, enhancements and fixes mostly for ARM32, ARM64, MIPS and Power-based devices. Additionally the framework core underwent a bit of surgery with two major changes: - The boundary between the clock core and clock providers (e.g clock drivers) is now more well defined with dedicated provider helper functions. struct clk no longer maps 1:1 with the hardware clock but is a true per-user cookie which helps us tracker users of hardware clocks and debug bad behavior. - The addition of rate constraints for clocks. Rate ranges are now supported which are analogous to the voltage ranges in the regulator framework. Unfortunately these changes to the core created some breakeage. We think we fixed it all up but for this reason there are lots of last minute commits trying to undo the damage" * tag 'clk-for-linus-3.20' of git://git.linaro.org/people/mike.turquette/linux: (113 commits) clk: Only recalculate the rate if needed Revert "clk: mxs: Fix invalid 32-bit access to frac registers" clk: qoriq: Add support for the platform PLL powerpc/corenet: Enable CLK_QORIQ clk: Replace explicit clk assignment with __clk_hw_set_clk clk: Add __clk_hw_set_clk helper function clk: Don't dereference parent clock if is NULL MIPS: Alchemy: Remove bogus args from alchemy_clk_fgcs_detr clkdev: Always allocate a struct clk and call __clk_get() w/ CCF clk: shmobile: div6: Avoid division by zero in .round_rate() clk: mxs: Fix invalid 32-bit access to frac registers clk: omap: compile legacy omap3 clocks conditionally clkdev: Export clk_register_clkdev clk: Add rate constraints to clocks clk: remove clk-private.h pci: xgene: do not use clk-private.h arm: omap2+ remove dead clock code clk: Make clk API return per-user struct clk instances clk: tegra: Define PLLD_DSI and remove dsia(b)_mux clk: tegra: Add support for the Tegra132 CAR IP block ...		10 years ago
..
Kconfig	clocksource: Build Tegra timer on 32-bit ARM only	10 years ago
Makefile	ARM: tegra: Convert PMC to a driver	11 years ago
board-paz00.c	This is the bulk of GPIO changes for the v3.17 development	11 years ago
board.h	ARM: tegra: Convert PMC to a driver	11 years ago
common.h	…
cpuidle-tegra20.c	cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic	10 years ago
cpuidle-tegra30.c	cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic	10 years ago
cpuidle-tegra114.c	ACPI and power management updates for 3.19-rc1	10 years ago
cpuidle.c	ARM: tegra: Use a function to get the chip ID	11 years ago
cpuidle.h	ARM: tegra: disable LP2 cpuidle state if PCIe is enabled	12 years ago
flowctrl.c	ARM: tegra: Initialize flow controller from DT	11 years ago
flowctrl.h	ARM: tegra: Initialize flow controller from DT	11 years ago
headsmp.S	…
hotplug.c	ARM: tegra: Setup CPU hotplug in a pure initcall	11 years ago
io.c	ARM: tegra: Sort includes alphabetically	11 years ago
iomap.h	ARM: tegra: use section-sized static mappings for LPAE too	11 years ago
irammap.h	ARM: tegra: move resume vector define to irammap.h	12 years ago
irq.c	ARM: tegra: irq: fix buggy usage of irq_data irq field	10 years ago
irq.h	…
platsmp.c	ARM: tegra: Convert PMC to a driver	11 years ago
pm-tegra20.c	ARM: tegra: Sort includes alphabetically	11 years ago
pm-tegra30.c	ARM: tegra: Sort includes alphabetically	11 years ago
pm.c	ARM: tegra: Convert PMC to a driver	11 years ago
pm.h	ARM: tegra: Convert PMC to a driver	11 years ago
reset-handler.S	ARM: tegra: Re-add removed SoC id macro to tegra_resume()	10 years ago
reset.c	ARM: tegra: Always lock the CPU reset vector	11 years ago
reset.h	ARM: tegra: add common LP1 suspend support	12 years ago
sleep-tegra20.S	ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+	11 years ago
sleep-tegra30.S	ARM: SoC cleanups for 3.17	11 years ago
sleep.S	ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+	11 years ago
sleep.h	ARM: tegra: Setup CPU hotplug in a pure initcall	11 years ago
tegra.c	clk: tegra: make tegra_clocks_apply_init_table() arch_initcall	10 years ago