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201 lines
5.4 KiB
201 lines
5.4 KiB
/* Copyright (c) 2011-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MFD_WCD9XXX_PDATA_H__
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#define __MFD_WCD9XXX_PDATA_H__
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#include <linux/slimbus/slimbus.h>
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#include "msm-cdc-supply.h"
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#define MICBIAS_EXT_BYP_CAP 0x00
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#define MICBIAS_NO_EXT_BYP_CAP 0x01
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#define SITAR_LDOH_1P95_V 0x0
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#define SITAR_LDOH_2P35_V 0x1
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#define SITAR_LDOH_2P75_V 0x2
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#define SITAR_LDOH_2P85_V 0x3
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#define SITAR_CFILT1_SEL 0x0
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#define SITAR_CFILT2_SEL 0x1
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#define SITAR_CFILT3_SEL 0x2
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#define WCD9XXX_LDOH_1P95_V 0x0
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#define WCD9XXX_LDOH_2P35_V 0x1
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#define WCD9XXX_LDOH_2P75_V 0x2
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#define WCD9XXX_LDOH_2P85_V 0x3
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#define WCD9XXX_LDOH_3P0_V 0x3
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#define TABLA_LDOH_1P95_V 0x0
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#define TABLA_LDOH_2P35_V 0x1
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#define TABLA_LDOH_2P75_V 0x2
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#define TABLA_LDOH_2P85_V 0x3
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#define TABLA_CFILT1_SEL 0x0
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#define TABLA_CFILT2_SEL 0x1
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#define TABLA_CFILT3_SEL 0x2
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#define MAX_AMIC_CHANNEL 7
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#define TABLA_OCP_300_MA 0x0
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#define TABLA_OCP_350_MA 0x2
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#define TABLA_OCP_365_MA 0x3
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#define TABLA_OCP_150_MA 0x4
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#define TABLA_OCP_190_MA 0x6
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#define TABLA_OCP_220_MA 0x7
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#define TABLA_DCYCLE_255 0x0
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#define TABLA_DCYCLE_511 0x1
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#define TABLA_DCYCLE_767 0x2
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#define TABLA_DCYCLE_1023 0x3
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#define TABLA_DCYCLE_1279 0x4
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#define TABLA_DCYCLE_1535 0x5
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#define TABLA_DCYCLE_1791 0x6
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#define TABLA_DCYCLE_2047 0x7
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#define TABLA_DCYCLE_2303 0x8
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#define TABLA_DCYCLE_2559 0x9
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#define TABLA_DCYCLE_2815 0xA
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#define TABLA_DCYCLE_3071 0xB
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#define TABLA_DCYCLE_3327 0xC
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#define TABLA_DCYCLE_3583 0xD
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#define TABLA_DCYCLE_3839 0xE
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#define TABLA_DCYCLE_4095 0xF
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#define WCD9XXX_MCLK_CLK_12P288MHZ 12288000
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#define WCD9XXX_MCLK_CLK_9P6HZ 9600000
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/* Only valid for 9.6 MHz mclk */
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#define WCD9XXX_DMIC_SAMPLE_RATE_600KHZ 600000
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#define WCD9XXX_DMIC_SAMPLE_RATE_2P4MHZ 2400000
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#define WCD9XXX_DMIC_SAMPLE_RATE_3P2MHZ 3200000
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#define WCD9XXX_DMIC_SAMPLE_RATE_4P8MHZ 4800000
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/* Only valid for 12.288 MHz mclk */
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#define WCD9XXX_DMIC_SAMPLE_RATE_768KHZ 768000
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#define WCD9XXX_DMIC_SAMPLE_RATE_2P048MHZ 2048000
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#define WCD9XXX_DMIC_SAMPLE_RATE_3P072MHZ 3072000
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#define WCD9XXX_DMIC_SAMPLE_RATE_4P096MHZ 4096000
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#define WCD9XXX_DMIC_SAMPLE_RATE_6P144MHZ 6144000
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#define WCD9XXX_DMIC_SAMPLE_RATE_UNDEFINED 0
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#define WCD9XXX_DMIC_CLK_DRIVE_UNDEFINED 0
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struct wcd9xxx_amic {
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/*legacy mode, txfe_enable and txfe_buff take 7 input
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* each bit represent the channel / TXFE number
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* and numbered as below
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* bit 0 = channel 1 / TXFE1_ENABLE / TXFE1_BUFF
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* bit 1 = channel 2 / TXFE2_ENABLE / TXFE2_BUFF
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* ...
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* bit 7 = channel 7 / TXFE7_ENABLE / TXFE7_BUFF
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*/
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u8 legacy_mode:MAX_AMIC_CHANNEL;
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u8 txfe_enable:MAX_AMIC_CHANNEL;
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u8 txfe_buff:MAX_AMIC_CHANNEL;
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u8 use_pdata:MAX_AMIC_CHANNEL;
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};
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/* Each micbias can be assigned to one of three cfilters
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* Vbatt_min >= .15V + ldoh_v
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* ldoh_v >= .15v + cfiltx_mv
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* If ldoh_v = 1.95 160 mv < cfiltx_mv < 1800 mv
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* If ldoh_v = 2.35 200 mv < cfiltx_mv < 2200 mv
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* If ldoh_v = 2.75 240 mv < cfiltx_mv < 2600 mv
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* If ldoh_v = 2.85 250 mv < cfiltx_mv < 2700 mv
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*/
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struct wcd9xxx_micbias_setting {
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u8 ldoh_v;
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u32 cfilt1_mv; /* in mv */
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u32 cfilt2_mv; /* in mv */
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u32 cfilt3_mv; /* in mv */
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u32 micb1_mv;
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u32 micb2_mv;
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u32 micb3_mv;
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u32 micb4_mv;
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/* Different WCD9xxx series codecs may not
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* have 4 mic biases. If a codec has fewer
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* mic biases, some of these properties will
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* not be used.
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*/
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u8 bias1_cfilt_sel;
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u8 bias2_cfilt_sel;
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u8 bias3_cfilt_sel;
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u8 bias4_cfilt_sel;
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u8 bias1_cap_mode;
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u8 bias2_cap_mode;
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u8 bias3_cap_mode;
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u8 bias4_cap_mode;
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bool bias2_is_headset_only;
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};
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struct wcd9xxx_ocp_setting {
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unsigned int use_pdata:1; /* 0 - use sys default as recommended */
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unsigned int num_attempts:4; /* up to 15 attempts */
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unsigned int run_time:4; /* in duty cycle */
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unsigned int wait_time:4; /* in duty cycle */
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unsigned int hph_ocp_limit:3; /* Headphone OCP current limit */
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};
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#define WCD9XXX_MAX_REGULATOR 9
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/*
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* format : TABLA_<POWER_SUPPLY_PIN_NAME>_CUR_MAX
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*
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* <POWER_SUPPLY_PIN_NAME> from Tabla objective spec
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*/
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#define WCD9XXX_CDC_VDDA_CP_CUR_MAX 500000
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#define WCD9XXX_CDC_VDDA_RX_CUR_MAX 20000
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#define WCD9XXX_CDC_VDDA_TX_CUR_MAX 20000
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#define WCD9XXX_VDDIO_CDC_CUR_MAX 5000
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#define WCD9XXX_VDDD_CDC_D_CUR_MAX 5000
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#define WCD9XXX_VDDD_CDC_A_CUR_MAX 5000
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#define WCD9XXX_VDD_SPKDRV_NAME "cdc-vdd-spkdrv"
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#define WCD9XXX_VDD_SPKDRV2_NAME "cdc-vdd-spkdrv-2"
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struct wcd9xxx_regulator {
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const char *name;
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int min_uV;
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int max_uV;
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int optimum_uA;
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bool ondemand;
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struct regulator *regulator;
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};
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struct wcd9xxx_pdata {
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int irq;
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int irq_base;
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int num_irqs;
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int reset_gpio;
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bool has_buck_vsel_gpio;
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bool has_micb_supply_en_gpio;
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struct device_node *buck_vsel_ctl_np;
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struct device_node *micb_en_ctl;
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struct device_node *wcd_rst_np;
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struct wcd9xxx_amic amic_settings;
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struct slim_device slimbus_slave_device;
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struct wcd9xxx_micbias_setting micbias;
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struct wcd9xxx_ocp_setting ocp;
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struct cdc_regulator *regulator;
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int num_supplies;
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u32 mclk_rate;
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u32 dmic_sample_rate;
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u32 mad_dmic_sample_rate;
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u32 ecpp_dmic_sample_rate;
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u32 dmic_clk_drv;
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u16 use_pinctrl;
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};
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#endif
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