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348 lines
10 KiB
348 lines
10 KiB
/*
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This file is provided under a dual BSD/GPLv2 license. When using or
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redistributing this file, you may do so under either license.
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GPL LICENSE SUMMARY
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Copyright(c) 2014 Intel Corporation.
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This program is free software; you can redistribute it and/or modify
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it under the terms of version 2 of the GNU General Public License as
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published by the Free Software Foundation.
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This program is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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Contact Information:
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qat-linux@intel.com
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BSD LICENSE
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Copyright(c) 2014 Intel Corporation.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include "adf_accel_devices.h"
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#include "adf_common_drv.h"
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#include "adf_cfg.h"
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#include "adf_cfg_strings.h"
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#include "adf_cfg_common.h"
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#include "adf_transport_access_macros.h"
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#include "adf_transport_internal.h"
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static int adf_enable_msix(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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u32 msix_num_entries = 1;
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/* If SR-IOV is disabled, add entries for each bank */
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if (!accel_dev->pf.vf_info) {
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int i;
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msix_num_entries += hw_data->num_banks;
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for (i = 0; i < msix_num_entries; i++)
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pci_dev_info->msix_entries.entries[i].entry = i;
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} else {
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pci_dev_info->msix_entries.entries[0].entry =
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hw_data->num_banks;
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}
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if (pci_enable_msix_exact(pci_dev_info->pci_dev,
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pci_dev_info->msix_entries.entries,
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msix_num_entries)) {
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dev_err(&GET_DEV(accel_dev), "Failed to enable MSI-X IRQ(s)\n");
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return -EFAULT;
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}
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return 0;
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}
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static void adf_disable_msix(struct adf_accel_pci *pci_dev_info)
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{
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pci_disable_msix(pci_dev_info->pci_dev);
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}
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static irqreturn_t adf_msix_isr_bundle(int irq, void *bank_ptr)
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{
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struct adf_etr_bank_data *bank = bank_ptr;
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WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, 0);
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tasklet_hi_schedule(&bank->resp_handler);
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return IRQ_HANDLED;
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}
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static irqreturn_t adf_msix_isr_ae(int irq, void *dev_ptr)
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{
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struct adf_accel_dev *accel_dev = dev_ptr;
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#ifdef CONFIG_PCI_IOV
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/* If SR-IOV is enabled (vf_info is non-NULL), check for VF->PF ints */
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if (accel_dev->pf.vf_info) {
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct adf_bar *pmisc =
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&GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)];
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void __iomem *pmisc_bar_addr = pmisc->virt_addr;
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u32 vf_mask;
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/* Get the interrupt sources triggered by VFs */
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vf_mask = ((ADF_CSR_RD(pmisc_bar_addr, ADF_ERRSOU5) &
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0x0000FFFF) << 16) |
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((ADF_CSR_RD(pmisc_bar_addr, ADF_ERRSOU3) &
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0x01FFFE00) >> 9);
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if (vf_mask) {
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struct adf_accel_vf_info *vf_info;
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bool irq_handled = false;
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int i;
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/* Disable VF2PF interrupts for VFs with pending ints */
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adf_disable_vf2pf_interrupts(accel_dev, vf_mask);
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/*
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* Schedule tasklets to handle VF2PF interrupt BHs
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* unless the VF is malicious and is attempting to
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* flood the host OS with VF2PF interrupts.
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*/
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for_each_set_bit(i, (const unsigned long *)&vf_mask,
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(sizeof(vf_mask) * BITS_PER_BYTE)) {
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vf_info = accel_dev->pf.vf_info + i;
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if (!__ratelimit(&vf_info->vf2pf_ratelimit)) {
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dev_info(&GET_DEV(accel_dev),
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"Too many ints from VF%d\n",
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vf_info->vf_nr + 1);
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continue;
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}
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/* Tasklet will re-enable ints from this VF */
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tasklet_hi_schedule(&vf_info->vf2pf_bh_tasklet);
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irq_handled = true;
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}
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if (irq_handled)
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return IRQ_HANDLED;
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}
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}
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#endif /* CONFIG_PCI_IOV */
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dev_dbg(&GET_DEV(accel_dev), "qat_dev%d spurious AE interrupt\n",
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accel_dev->accel_id);
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return IRQ_NONE;
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}
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static int adf_request_irqs(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct msix_entry *msixe = pci_dev_info->msix_entries.entries;
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struct adf_etr_data *etr_data = accel_dev->transport;
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int ret, i = 0;
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char *name;
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/* Request msix irq for all banks unless SR-IOV enabled */
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if (!accel_dev->pf.vf_info) {
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for (i = 0; i < hw_data->num_banks; i++) {
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struct adf_etr_bank_data *bank = &etr_data->banks[i];
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unsigned int cpu, cpus = num_online_cpus();
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name = *(pci_dev_info->msix_entries.names + i);
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snprintf(name, ADF_MAX_MSIX_VECTOR_NAME,
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"qat%d-bundle%d", accel_dev->accel_id, i);
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ret = request_irq(msixe[i].vector,
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adf_msix_isr_bundle, 0, name, bank);
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if (ret) {
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dev_err(&GET_DEV(accel_dev),
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"failed to enable irq %d for %s\n",
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msixe[i].vector, name);
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return ret;
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}
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cpu = ((accel_dev->accel_id * hw_data->num_banks) +
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i) % cpus;
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irq_set_affinity_hint(msixe[i].vector,
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get_cpu_mask(cpu));
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}
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}
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/* Request msix irq for AE */
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name = *(pci_dev_info->msix_entries.names + i);
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snprintf(name, ADF_MAX_MSIX_VECTOR_NAME,
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"qat%d-ae-cluster", accel_dev->accel_id);
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ret = request_irq(msixe[i].vector, adf_msix_isr_ae, 0, name, accel_dev);
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if (ret) {
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dev_err(&GET_DEV(accel_dev),
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"failed to enable irq %d, for %s\n",
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msixe[i].vector, name);
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return ret;
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}
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return ret;
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}
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static void adf_free_irqs(struct adf_accel_dev *accel_dev)
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{
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struct adf_accel_pci *pci_dev_info = &accel_dev->accel_pci_dev;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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struct msix_entry *msixe = pci_dev_info->msix_entries.entries;
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struct adf_etr_data *etr_data = accel_dev->transport;
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int i = 0;
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if (pci_dev_info->msix_entries.num_entries > 1) {
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for (i = 0; i < hw_data->num_banks; i++) {
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irq_set_affinity_hint(msixe[i].vector, NULL);
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free_irq(msixe[i].vector, &etr_data->banks[i]);
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}
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}
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irq_set_affinity_hint(msixe[i].vector, NULL);
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free_irq(msixe[i].vector, accel_dev);
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}
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static int adf_isr_alloc_msix_entry_table(struct adf_accel_dev *accel_dev)
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{
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int i;
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char **names;
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struct msix_entry *entries;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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u32 msix_num_entries = 1;
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/* If SR-IOV is disabled (vf_info is NULL), add entries for each bank */
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if (!accel_dev->pf.vf_info)
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msix_num_entries += hw_data->num_banks;
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entries = kzalloc_node(msix_num_entries * sizeof(*entries),
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GFP_KERNEL, dev_to_node(&GET_DEV(accel_dev)));
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if (!entries)
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return -ENOMEM;
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names = kcalloc(msix_num_entries, sizeof(char *), GFP_KERNEL);
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if (!names) {
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kfree(entries);
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return -ENOMEM;
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}
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for (i = 0; i < msix_num_entries; i++) {
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*(names + i) = kzalloc(ADF_MAX_MSIX_VECTOR_NAME, GFP_KERNEL);
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if (!(*(names + i)))
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goto err;
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}
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accel_dev->accel_pci_dev.msix_entries.num_entries = msix_num_entries;
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accel_dev->accel_pci_dev.msix_entries.entries = entries;
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accel_dev->accel_pci_dev.msix_entries.names = names;
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return 0;
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err:
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for (i = 0; i < msix_num_entries; i++)
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kfree(*(names + i));
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kfree(entries);
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kfree(names);
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return -ENOMEM;
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}
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static void adf_isr_free_msix_entry_table(struct adf_accel_dev *accel_dev)
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{
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char **names = accel_dev->accel_pci_dev.msix_entries.names;
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int i;
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kfree(accel_dev->accel_pci_dev.msix_entries.entries);
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for (i = 0; i < accel_dev->accel_pci_dev.msix_entries.num_entries; i++)
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kfree(*(names + i));
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kfree(names);
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}
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static int adf_setup_bh(struct adf_accel_dev *accel_dev)
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{
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struct adf_etr_data *priv_data = accel_dev->transport;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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int i;
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for (i = 0; i < hw_data->num_banks; i++)
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tasklet_init(&priv_data->banks[i].resp_handler,
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adf_response_handler,
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(unsigned long)&priv_data->banks[i]);
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return 0;
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}
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static void adf_cleanup_bh(struct adf_accel_dev *accel_dev)
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{
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struct adf_etr_data *priv_data = accel_dev->transport;
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struct adf_hw_device_data *hw_data = accel_dev->hw_device;
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int i;
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for (i = 0; i < hw_data->num_banks; i++) {
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tasklet_disable(&priv_data->banks[i].resp_handler);
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tasklet_kill(&priv_data->banks[i].resp_handler);
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}
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}
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/**
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* adf_isr_resource_free() - Free IRQ for acceleration device
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* @accel_dev: Pointer to acceleration device.
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*
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* Function frees interrupts for acceleration device.
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*/
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void adf_isr_resource_free(struct adf_accel_dev *accel_dev)
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{
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adf_free_irqs(accel_dev);
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adf_cleanup_bh(accel_dev);
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adf_disable_msix(&accel_dev->accel_pci_dev);
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adf_isr_free_msix_entry_table(accel_dev);
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}
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EXPORT_SYMBOL_GPL(adf_isr_resource_free);
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/**
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* adf_isr_resource_alloc() - Allocate IRQ for acceleration device
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* @accel_dev: Pointer to acceleration device.
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*
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* Function allocates interrupts for acceleration device.
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*
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* Return: 0 on success, error code otherwise.
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*/
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int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev)
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{
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int ret;
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ret = adf_isr_alloc_msix_entry_table(accel_dev);
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if (ret)
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return ret;
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if (adf_enable_msix(accel_dev))
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goto err_out;
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if (adf_setup_bh(accel_dev))
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goto err_out;
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if (adf_request_irqs(accel_dev))
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goto err_out;
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return 0;
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err_out:
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adf_isr_resource_free(accel_dev);
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return -EFAULT;
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}
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EXPORT_SYMBOL_GPL(adf_isr_resource_alloc);
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