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771 lines
15 KiB
771 lines
15 KiB
/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include "sdmshrike-v2.dtsi"
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#include "sa8155-audio.dtsi"
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#include "sa8195-pmic.dtsi"
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#include "sa8195p-camera.dtsi"
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#include "sa8195p-camera-sensor.dtsi"
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#include "sa8195p-pcie.dtsi"
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#include "sm8150-npu.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. SA8195P";
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qcom,msm-name = "SA8195P";
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qcom,msm-id = <405 0x20000>;
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};
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&mdss_mdp {
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/* roi misr related hw block */
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qcom,sde-roi-misr-off = <0x82820 0x82880 0x828e0
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0x82940 0x829a0 0x82a00>;
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qcom,sde-roi-misr-size = <0x60>;
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qcom,sde-dspp-blocks {
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qcom,sde-dspp-roi-misr = <0x1200 0x00010000>;
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};
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};
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&soc {
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hsi2s: qcom,hsi2s {
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compatible = "qcom,sa8195-hsi2s", "qcom,hsi2s";
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number-of-interfaces = <3>;
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reg = <0x172C0000 0x28000>,
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<0x17080000 0xE000>;
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reg-names = "lpa_if", "lpass_tcsr";
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interrupts = <GIC_SPI 267 0>;
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number-of-rate-detectors = <2>;
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rate-detector-interfaces = <0 1>;
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iommus = <&apps_smmu 0x1B5C 0x1>,
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<&apps_smmu 0x1B5E 0x0>;
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qcom,smmu-s1-bypass;
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qcom,iova-mapping = <0x0 0xFFFFFFFF>;
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sdr0: qcom,hs0_i2s {
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compatible = "qcom,hsi2s-interface";
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minor-number = <0>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hs1_i2s_mclk_active &hs1_i2s_sck_active
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&hs1_i2s_ws_active &hs1_i2s_data0_active
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&hs1_i2s_data1_active>;
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pinctrl-1 = <&hs1_i2s_mclk_sleep &hs1_i2s_sck_sleep
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&hs1_i2s_ws_sleep &hs1_i2s_data0_sleep
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&hs1_i2s_data1_sleep>;
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bit-clock-hz = <12288000>;
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data-buffer-ms = <10>;
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bit-depth = <32>;
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spkr-channel-count = <2>;
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mic-channel-count = <2>;
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pcm-rate = <2>;
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pcm-sync-src = <0>;
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aux-mode = <0>;
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rpcm-width = <1>;
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tpcm-width = <1>;
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enable-tdm = <1>;
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tdm-rate = <32>;
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tdm-rpcm-width = <16>;
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tdm-tpcm-width = <16>;
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tdm-sync-delay = <2>;
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tdm-inv-sync = <0>;
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pcm-lane-config = <1>;
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};
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sdr1: qcom,hs1_i2s {
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compatible = "qcom,hsi2s-interface";
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minor-number = <1>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hs2_i2s_mclk_active &hs2_i2s_sck_active
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&hs2_i2s_ws_active &hs2_i2s_data0_active
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&hs2_i2s_data1_active>;
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pinctrl-1 = <&hs2_i2s_mclk_sleep &hs2_i2s_sck_sleep
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&hs2_i2s_ws_sleep &hs2_i2s_data0_sleep
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&hs2_i2s_data1_sleep>;
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bit-clock-hz = <12288000>;
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data-buffer-ms = <10>;
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bit-depth = <32>;
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spkr-channel-count = <2>;
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mic-channel-count = <2>;
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pcm-rate = <2>;
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pcm-sync-src = <0>;
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aux-mode = <0>;
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rpcm-width = <1>;
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tpcm-width = <1>;
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enable-tdm = <1>;
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tdm-rate = <32>;
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tdm-rpcm-width = <16>;
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tdm-tpcm-width = <16>;
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tdm-sync-delay = <2>;
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tdm-inv-sync = <0>;
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pcm-lane-config = <1>;
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};
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sdr2: qcom,hs2_i2s {
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compatible = "qcom,hsi2s-interface";
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minor-number = <2>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hs3_i2s_mclk_active &hs3_i2s_sck_active
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&hs3_i2s_ws_active &hs3_i2s_data0_active
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&hs3_i2s_data1_active>;
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pinctrl-1 = <&hs3_i2s_mclk_sleep &hs3_i2s_sck_sleep
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&hs3_i2s_ws_sleep &hs3_i2s_data0_sleep
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&hs3_i2s_data1_sleep>;
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bit-clock-hz = <12288000>;
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data-buffer-ms = <10>;
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bit-depth = <32>;
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spkr-channel-count = <2>;
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mic-channel-count = <2>;
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pcm-rate = <2>;
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pcm-sync-src = <0>;
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aux-mode = <0>;
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rpcm-width = <1>;
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tpcm-width = <1>;
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enable-tdm = <1>;
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tdm-rate = <32>;
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tdm-rpcm-width = <16>;
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tdm-tpcm-width = <16>;
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tdm-sync-delay = <2>;
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tdm-inv-sync = <0>;
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pcm-lane-config = <1>;
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};
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};
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emac_hw: qcom,emac@00020000 {
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compatible = "qcom,emac-dwc-eqos";
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qcom,arm-smmu;
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emac-core-version = <3>;
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reg = <0x20000 0x10000>,
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<0x36000 0x100>,
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<0x3D00000 0x300000>;
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reg-names = "emac-base", "rgmii-base", "tlmm-central-base";
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interrupts-extended = <&pdc 0 689 4>, <&pdc 0 700 4>,
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<&tlmm 124 2>, <&pdc 0 691 4>,
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<&pdc 0 692 4>, <&pdc 0 693 4>,
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<&pdc 0 694 4>, <&pdc 0 695 4>,
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<&pdc 0 696 4>, <&pdc 0 697 4>,
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<&pdc 0 698 4>, <&pdc 0 699 4>;
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interrupt-names = "sbd-intr", "lpi-intr",
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"phy-intr", "tx-ch0-intr",
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"tx-ch1-intr", "tx-ch2-intr",
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"tx-ch3-intr", "tx-ch4-intr",
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"rx-ch0-intr", "rx-ch1-intr",
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"rx-ch2-intr", "rx-ch3-intr";
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qcom,msm-bus,name = "emac";
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qcom,msm-bus,num-cases = <4>;
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qcom,msm-bus,num-paths = <2>;
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qcom,msm-bus,vectors-KBps =
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<98 512 0 0>, <1 781 0 0>, /* No vote */
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<98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */
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<98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */
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<98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */
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qcom,bus-vector-names = "0", "10", "100", "1000";
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clocks = <&clock_gcc GCC_EMAC_AXI_CLK>,
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<&clock_gcc GCC_EMAC_PTP_CLK>,
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<&clock_gcc GCC_EMAC_RGMII_CLK>,
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<&clock_gcc GCC_EMAC_SLV_AHB_CLK>;
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clock-names = "emac_axi_clk", "emac_ptp_clk",
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"emac_rgmii_clk", "emac_slv_ahb_clk";
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qcom,phy-reset = <&tlmm 79 GPIO_ACTIVE_HIGH>;
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qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;
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gdsc_emac-supply = <&emac_gdsc>;
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pinctrl-names = "dev-emac-mdc",
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"dev-emac-mdio",
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"dev-emac-rgmii_txd0_state",
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"dev-emac-rgmii_txd1_state",
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"dev-emac-rgmii_txd2_state",
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"dev-emac-rgmii_txd3_state",
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"dev-emac-rgmii_txc_state",
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"dev-emac-rgmii_tx_ctl_state",
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"dev-emac-rgmii_rxd0_state",
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"dev-emac-rgmii_rxd1_state",
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"dev-emac-rgmii_rxd2_state",
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"dev-emac-rgmii_rxd3_state",
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"dev-emac-rgmii_rxc_state",
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"dev-emac-rgmii_rx_ctl_state",
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"dev-emac-phy_intr",
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"dev-emac-phy_reset_state";
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pinctrl-0 = <&emac_mdc>;
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pinctrl-1 = <&emac_mdio>;
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pinctrl-2 = <&emac_rgmii_txd0>;
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pinctrl-3 = <&emac_rgmii_txd1>;
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pinctrl-4 = <&emac_rgmii_txd2>;
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pinctrl-5 = <&emac_rgmii_txd3>;
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pinctrl-6 = <&emac_rgmii_txc>;
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pinctrl-7 = <&emac_rgmii_tx_ctl>;
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pinctrl-8 = <&emac_rgmii_rxd0>;
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pinctrl-9 = <&emac_rgmii_rxd1>;
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pinctrl-10 = <&emac_rgmii_rxd2>;
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pinctrl-11 = <&emac_rgmii_rxd3>;
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pinctrl-12 = <&emac_rgmii_rxc>;
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pinctrl-13 = <&emac_rgmii_rx_ctl>;
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pinctrl-14 = <&emac_phy_intr>;
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pinctrl-15 = <&emac_phy_reset_state>;
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io-macro-info {
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io-macro-bypass-mode = <0>;
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io-interface = "rgmii";
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};
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emac_emb_smmu: emac_emb_smmu {
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compatible = "qcom,emac-smmu-embedded";
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iommus = <&apps_smmu 0x7C0 0x0>;
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qcom,iova-mapping = <0x80000000 0x40000000>;
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};
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};
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npu_npu_ddr_bw: qcom,npu-npu-ddr-bw {
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compatible = "qcom,devbw";
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governor = "performance";
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qcom,src-dst-ports = <MSM_BUS_MASTER_NPU MSM_BUS_SLAVE_EBI_CH0>;
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operating-points-v2 = <&suspendable_ddr_bw_opp_table>;
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};
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npu_npu_ddr_bwmon: qcom,npu-npu-ddr-bwmon@9960300 {
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compatible = "qcom,bimc-bwmon4";
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reg = <0x9960300 0x300>, <0x9960200 0x200>;
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reg-names = "base", "global_base";
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interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
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qcom,mport = <0>;
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qcom,hw-timer-hz = <19200000>;
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qcom,target-dev = <&npu_npu_ddr_bw>;
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qcom,count-unit = <0x10000>;
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};
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qmp_npu0: qcom,qmp-npu-low@9818000 {
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compatible = "qcom,qmp-mbox";
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reg = <0x9818000 0x8000>, <0x9901008 0x4>;
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reg-names = "msgram", "irq-reg-base";
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qcom,irq-mask = <0x12>;
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interrupts = <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>;
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label = "npu_qmp_low";
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priority = <0>;
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mbox-desc-offset = <0x0>;
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#mbox-cells = <1>;
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};
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qmp_npu1: qcom,qmp-npu-high@9818000 {
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compatible = "qcom,qmp-mbox";
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reg = <0x9818000 0x8000>, <0x9901008 0x4>;
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reg-names = "msgram", "irq-reg-base";
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qcom,irq-mask = <0x14>;
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interrupts = <GIC_SPI 370 IRQ_TYPE_EDGE_RISING>;
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label = "npu_qmp_high";
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priority = <1>;
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mbox-desc-offset = <0x2000>;
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#mbox-cells = <1>;
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};
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qfprom: qfprom@780130 {
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compatible = "qcom,qfprom";
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reg = <0x00780130 0x4>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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ranges;
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};
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};
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&usb0 {
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qcom,default-mode-none;
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qcom,ignore-wakeup-src-in-hostmode;
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};
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&usb1 {
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qcom,default-mode-host;
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qcom,ignore-wakeup-src-in-hostmode;
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status = "ok";
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};
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&usb2 {
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qcom,ignore-wakeup-src-in-hostmode;
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status = "ok";
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};
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&slpi_tlmm {
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status = "ok";
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};
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&pil_ssc {
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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vdd_mx-supply = <&VDD_MX_LEVEL>;
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status = "ok";
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};
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&ssc_sensors {
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status = "disabled";
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};
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&clock_rpmh {
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compatible = "qcom,rpmh-clk-sm8150";
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};
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&clock_scc {
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compatible = "qcom,scc-sa8195";
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};
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&ufsphy_mem {
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compatible = "qcom,ufs-phy-qmp-v4";
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vdda-phy-supply = <&pm8195_3_l5>;
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vdda-pll-supply = <&pm8195_1_l9>;
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vdda-phy-max-microamp = <138000>;
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vdda-pll-max-microamp = <65100>;
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status = "ok";
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};
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&ufshc_mem {
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vdd-hba-supply = <&ufs_phy_gdsc>;
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vdd-hba-fixed-regulator;
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vcc-supply = <&pm8195_3_l10>;
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vcc-voltage-level = <2894000 2904000>;
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vcc-low-voltage-sup;
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vccq-supply = <&pm8195_1_l11>;
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vccq2-supply = <&pm8195_3_l7>;
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vcc-max-microamp = <750000>;
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vccq-max-microamp = <750000>;
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vccq2-max-microamp = <750000>;
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status= "ok";
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};
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&ufs2phy_mem {
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compatible = "qcom,ufs-phy-qmp-v4";
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vdda-phy-supply = <&pm8195_3_l5>;
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vdda-pll-supply = <&pm8195_1_l9>;
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vdda-phy-max-microamp = <138000>;
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vdda-pll-max-microamp = <65100>;
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status = "disabled";
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};
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&ufshc2_mem {
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vdd-hba-supply = <&ufs_card_2_gdsc>;
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vdd-hba-fixed-regulator;
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vcc-supply = <&pm8195_1_l17>;
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vcc-voltage-level = <2894000 2904000>;
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vcc-low-voltage-sup;
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vccq-supply = <&pm8195_2_l5>;
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vccq2-supply = <&pm8195_s4>;
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vcc-max-microamp = <750000>;
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vccq-max-microamp = <750000>;
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vccq2-max-microamp = <750000>;
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status= "disabled";
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};
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&usb2_phy0 {
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vdd-supply = <&pm8195_3_l5>;
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vdda18-supply = <&pm8195_1_l12>;
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vdda33-supply = <&pm8195_3_l16>;
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};
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&usb2_phy1 {
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vdd-supply = <&pm8195_3_l5>;
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vdda18-supply = <&pm8195_1_l12>;
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vdda33-supply = <&pm8195_3_l16>;
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status = "ok";
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};
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&usb2_phy2 {
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vdd-supply = <&pm8195_3_l5>;
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vdda18-supply = <&pm8195_1_l12>;
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vdda33-supply = <&pm8195_3_l16>;
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status = "ok";
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};
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&usb_qmp_phy0 {
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vdd-supply = <&pm8195_3_l9>;
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core-supply = <&pm8195_1_l9>;
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status = "ok";
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};
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&usb2_phy3 {
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vdd-supply = <&pm8195_3_l5>;
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vdda18-supply = <&pm8195_1_l12>;
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vdda33-supply = <&pm8195_3_l16>;
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status = "ok";
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};
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&usb_qmp_phy1 {
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vdd-supply = <&pm8195_3_l9>;
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core-supply = <&pm8195_1_l9>;
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status = "ok";
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};
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&mdss_dsi_phy0 {
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vdda-0p9-supply = <&pm8195_3_l5>;
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};
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&mdss_dsi_phy1 {
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vdda-0p9-supply = <&pm8195_3_l5>;
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};
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&mdss_dsi0 {
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vdda-1p2-supply = <&pm8195_1_l9>;
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};
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&mdss_dsi1 {
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vdda-1p2-supply = <&pm8195_1_l9>;
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};
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&sde_dp0 {
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vdda-1p2-supply = <&pm8195_1_l9>;
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vdda-0p9-supply = <&pm8195_3_l5>;
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};
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&sde_dp1 {
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vdda-1p2-supply = <&pm8195_1_l9>;
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vdda-0p9-supply = <&pm8195_3_l5>;
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};
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&sde_edp {
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vdda-1p2-supply = <&pm8195_1_l9>;
|
|
vdda-0p9-supply = <&pm8195_3_l5>;
|
|
};
|
|
|
|
&pil_lpass {
|
|
vdd_cx-supply = <&VDD_CX_LEVEL>;
|
|
status = "ok";
|
|
};
|
|
|
|
&pil_spss {
|
|
status = "ok";
|
|
};
|
|
|
|
&clock_scc {
|
|
vdd_scc_cx-supply = <&pm8195_3_l8_level>;
|
|
status = "ok";
|
|
};
|
|
|
|
&thermal_zones {
|
|
/delete-node/ cpu-1-7-lowf;
|
|
/delete-node/ gpuss-0-lowf;
|
|
/delete-node/ camera-lowf;
|
|
/delete-node/ mdm-scl-lowf;
|
|
/delete-node/ pcie-lowf;
|
|
|
|
lmh-dcvs-01 {
|
|
trips {
|
|
active-config {
|
|
temperature = <105000>;
|
|
hysteresis = <40000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
lmh-dcvs-00 {
|
|
trips {
|
|
active-config {
|
|
temperature = <105000>;
|
|
hysteresis = <40000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
quad-gpuss-max-step {
|
|
trips {
|
|
gpu-trip0 {
|
|
temperature = <105000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-0-step {
|
|
trips {
|
|
cpu00-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-1-step {
|
|
trips {
|
|
cpu01-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-2-step {
|
|
trips {
|
|
cpu02-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-0-3-step {
|
|
trips {
|
|
cpu03-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-0-step {
|
|
trips {
|
|
cpu10-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-1-step {
|
|
trips {
|
|
cpu11-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-2-step {
|
|
trips {
|
|
cpu12-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-3-step {
|
|
trips {
|
|
cpu13-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-4-step {
|
|
trips {
|
|
cpu14-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-5-step {
|
|
trips {
|
|
cpu15-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-6-step {
|
|
trips {
|
|
cpu16-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-1-7-step {
|
|
trips {
|
|
cpu17-config {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
q6-hvx-step {
|
|
trips {
|
|
q6-hvx-trip0 {
|
|
temperature = <105000>;
|
|
};
|
|
|
|
q6-hvx-trip1 {
|
|
temperature = <115000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
npu-step {
|
|
polling-delay-passive = <10>;
|
|
polling-delay = <0>;
|
|
thermal-sensors = <&tsens1 8>;
|
|
thermal-governor = "step_wise";
|
|
wake-capable-sensor;
|
|
trips {
|
|
npu_trip0: npu-trip0 {
|
|
temperature = <105000>;
|
|
hysteresis = <0>;
|
|
type = "passive";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
npu_cdev {
|
|
trip = <&npu_trip0>;
|
|
cooling-device =
|
|
<&msm_npu THERMAL_NO_LIMIT
|
|
THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&msm_npu {
|
|
iommus = <&apps_smmu 0x1481 0x400>, <&apps_smmu 0x1081 0x400>;
|
|
qcom,npu-pwrlevels {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "qcom,npu-pwrlevels";
|
|
initial-pwrlevel = <5>;
|
|
qcom,npu-pwrlevel@0 {
|
|
reg = <0>;
|
|
vreg = <1>;
|
|
clk-freq = <0
|
|
0
|
|
0
|
|
100000000
|
|
300000000
|
|
300000000
|
|
19200000
|
|
150000000
|
|
100000000
|
|
37500000
|
|
19200000
|
|
60000000
|
|
100000000
|
|
19200000
|
|
19200000
|
|
0
|
|
19200000
|
|
300000000
|
|
19200000
|
|
19200000>;
|
|
};
|
|
qcom,npu-pwrlevel@1 {
|
|
reg = <1>;
|
|
vreg = <2>;
|
|
clk-freq = <0
|
|
0
|
|
0
|
|
150000000
|
|
400000000
|
|
400000000
|
|
37500000
|
|
200000000
|
|
150000000
|
|
75000000
|
|
19200000
|
|
120000000
|
|
150000000
|
|
19200000
|
|
19200000
|
|
0
|
|
19200000
|
|
400000000
|
|
19200000
|
|
19200000>;
|
|
};
|
|
qcom,npu-pwrlevel@2 {
|
|
reg = <2>;
|
|
vreg = <3>;
|
|
clk-freq = <0
|
|
0
|
|
0
|
|
200000000
|
|
487000000
|
|
487000000
|
|
37500000
|
|
300000000
|
|
200000000
|
|
150000000
|
|
19200000
|
|
240000000
|
|
200000000
|
|
19200000
|
|
19200000
|
|
0
|
|
19200000
|
|
487000000
|
|
19200000
|
|
19200000>;
|
|
};
|
|
qcom,npu-pwrlevel@3 {
|
|
reg = <3>;
|
|
vreg = <4>;
|
|
clk-freq = <0
|
|
0
|
|
0
|
|
300000000
|
|
652000000
|
|
652000000
|
|
75000000
|
|
403000000
|
|
300000000
|
|
150000000
|
|
19200000
|
|
240000000
|
|
300000000
|
|
19200000
|
|
19200000
|
|
0
|
|
19200000
|
|
652000000
|
|
19200000
|
|
19200000>;
|
|
};
|
|
qcom,npu-pwrlevel@4 {
|
|
reg = <4>;
|
|
vreg = <6>;
|
|
clk-freq = <0
|
|
0
|
|
0
|
|
400000000
|
|
811000000
|
|
811000000
|
|
75000000
|
|
533000000
|
|
400000000
|
|
150000000
|
|
19200000
|
|
300000000
|
|
400000000
|
|
19200000
|
|
19200000
|
|
0
|
|
19200000
|
|
811000000
|
|
19200000
|
|
19200000>;
|
|
};
|
|
qcom,npu-pwrlevel@5 {
|
|
reg = <5>;
|
|
vreg = <7>;
|
|
clk-freq = <0
|
|
0
|
|
0
|
|
400000000
|
|
908000000
|
|
908000000
|
|
75000000
|
|
533000000
|
|
400000000
|
|
150000000
|
|
19200000
|
|
300000000
|
|
400000000
|
|
19200000
|
|
19200000
|
|
0
|
|
19200000
|
|
908000000
|
|
19200000
|
|
19200000>;
|
|
};
|
|
};
|
|
};
|
|
|