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765 lines
17 KiB
765 lines
17 KiB
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* Remove regulator nodes specific to SA8155 */
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&soc {
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/delete-node/ regulator-pm8150-s4;
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/delete-node/ rpmh-regulator-msslvl;
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/delete-node/ rpmh-regulator-smpa2;
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/delete-node/ rpmh-regulator-ebilvl;
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/delete-node/ rpmh-regulator-smpa5;
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/delete-node/ rpmh-regulator-smpa6;
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/delete-node/ rpmh-regulator-ldoa1;
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/delete-node/ rpmh-regulator-ldoa2;
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/delete-node/ rpmh-regulator-ldoa3;
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/delete-node/ rpmh-regulator-lmxlvl;
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/delete-node/ rpmh-regulator-ldoa5;
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/delete-node/ rpmh-regulator-ldoa6;
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/delete-node/ rpmh-regulator-ldoa7;
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/delete-node/ rpmh-regulator-lcxlvl;
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/delete-node/ rpmh-regulator-ldoa9;
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/delete-node/ rpmh-regulator-ldoa10;
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/delete-node/ rpmh-regulator-ldoa11;
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/delete-node/ rpmh-regulator-ldoa12;
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/delete-node/ rpmh-regulator-ldoa13;
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/delete-node/ rpmh-regulator-ldoa14;
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/delete-node/ rpmh-regulator-ldoa15;
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/delete-node/ rpmh-regulator-ldoa16;
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/delete-node/ rpmh-regulator-ldoa17;
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/delete-node/ rpmh-regulator-smpc1;
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/delete-node/ rpmh-regulator-gfxlvl;
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/delete-node/ rpmh-regulator-mxlvl;
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/delete-node/ rpmh-regulator-mmcxlvl;
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/delete-node/ rpmh-regulator-cxlvl;
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/delete-node/ rpmh-regulator-smpc8;
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/delete-node/ rpmh-regulator-ldoc1;
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/delete-node/ rpmh-regulator-ldoc2;
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/delete-node/ rpmh-regulator-ldoc3;
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/delete-node/ rpmh-regulator-ldoc4;
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/delete-node/ rpmh-regulator-ldoc5;
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/delete-node/ rpmh-regulator-ldoc6;
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/delete-node/ rpmh-regulator-ldoc7;
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/delete-node/ rpmh-regulator-ldoc8;
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/delete-node/ rpmh-regulator-ldoc18;
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/delete-node/ rpmh-regulator-ldoc9;
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/delete-node/ rpmh-regulator-ldoc10;
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/delete-node/ rpmh-regulator-ldoc11;
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/delete-node/ rpmh-regulator-bobc1;
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/delete-node/ rpmh-regulator-smpf2;
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/delete-node/ rpmh-regulator-ldof2;
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/delete-node/ rpmh-regulator-ldof5;
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/delete-node/ rpmh-regulator-ldof6;
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};
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/* Add regulator nodes specific to SA8155 */
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#include "sa8155-regulator.dtsi"
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&slpi_tlmm {
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status = "ok";
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};
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&clock_gpucc {
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compatible = "qcom,gpucc-sa8155", "syscon";
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};
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&cam_csiphy0 {
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mipi-csi-vdd-supply = <&pm8150_2_l18>;
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mipi-csi-vdd1p2-supply = <&pm8150_2_l8>;
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regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";
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rgltr-cntrl-support;
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rgltr-min-voltage = <0 880000 1200000>;
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rgltr-max-voltage = <0 880000 1200000>;
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rgltr-load-current = <0 36000 21800>;
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};
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&cam_csiphy1 {
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mipi-csi-vdd-supply = <&pm8150_2_l18>;
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mipi-csi-vdd1p2-supply = <&pm8150_2_l8>;
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regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";
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rgltr-cntrl-support;
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rgltr-min-voltage = <0 880000 1200000>;
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rgltr-max-voltage = <0 880000 1200000>;
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rgltr-load-current = <0 36000 21800>;
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};
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&cam_csiphy2 {
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mipi-csi-vdd-supply = <&pm8150_2_l18>;
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mipi-csi-vdd1p2-supply = <&pm8150_2_l8>;
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regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";
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rgltr-cntrl-support;
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rgltr-min-voltage = <0 880000 1200000>;
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rgltr-max-voltage = <0 880000 1200000>;
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rgltr-load-current = <0 36000 21800>;
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};
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&cam_csiphy3 {
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mipi-csi-vdd-supply = <&pm8150_2_l18>;
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mipi-csi-vdd1p2-supply = <&pm8150_2_l8>;
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regulator-names = "gdscr", "mipi-csi-vdd", "mipi-csi-vdd1p2";
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rgltr-cntrl-support;
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rgltr-min-voltage = <0 880000 1200000>;
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rgltr-max-voltage = <0 880000 1200000>;
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rgltr-load-current = <0 36000 21800>;
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};
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&pcie0 {
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vreg-1.8-supply = <&pm8150_2_l8>;
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vreg-0.9-supply = <&pm8150_2_l18>;
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qcom,no-l1-supported;
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qcom,no-l1ss-supported;
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qcom,no-aux-clk-sync;
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qcom,core-preset = <0x77777777>;
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};
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&pcie1 {
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vreg-1.8-supply = <&pm8150_2_l8>;
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vreg-0.9-supply = <&pm8150_2_l18>;
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qcom,core-preset = <0x77777777>;
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};
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&pcie_ep {
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vreg-1.8-supply = <&pm8150_2_l8>;
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vreg-0.9-supply = <&pm8150_2_l18>;
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};
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&mdss_dsi_phy0 {
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vdda-0p9-supply = <&pm8150_2_l18>;
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};
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&mdss_dsi_phy1 {
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vdda-0p9-supply = <&pm8150_2_l18>;
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};
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&mdss_dsi0 {
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vdda-1p2-supply = <&pm8150_2_l8>;
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};
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&mdss_dsi1 {
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vdda-1p2-supply = <&pm8150_2_l8>;
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};
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&sde_dp {
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vdda-1p2-supply = <&pm8150_2_l8>;
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vdda-0p9-supply = <&pm8150_2_l18>;
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};
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&lmh_dcvs1 {
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isens_vref_0p8-supply = <&pm8150_1_l5_ao>;
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isens_vref_1p8-supply = <&pm8150_1_l12_ao>;
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};
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&usb2_phy0 {
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vdd-supply = <&pm8150_1_l5>;
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vdda18-supply = <&pm8150_1_l12>;
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vdda33-supply = <&pm8150_1_l2>;
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};
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&usb_qmp_dp_phy {
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vdd-supply = <&pm8150_1_l5>;
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core-supply = <&pm8150_2_l8>;
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};
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&usb2_phy1 {
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vdd-supply = <&pm8150_1_l5>;
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vdda18-supply = <&pm8150_1_l12>;
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vdda33-supply = <&pm8150_1_l2>;
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status = "ok";
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};
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&usb_qmp_phy {
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vdd-supply = <&pm8150_1_l5>;
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core-supply = <&pm8150_2_l8>;
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status = "ok";
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};
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&icnss {
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vdd-cx-mx-supply = <&pm8150_1_l1>;
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vdd-1.8-xo-supply = <&pm8150_1_l7>;
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vdd-1.3-rfa-supply = <&pm8150_2_l1>;
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/delete-property/ vdd-3.3-ch0-supply;
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};
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&pil_ssc {
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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vdd_mx-supply = <&VDD_MX_LEVEL>;
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};
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&pil_modem {
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vdd_mss-supply = <&pm8150_1_s8_level>;
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};
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&wil6210 {
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/delete-property/ vddio-supply;
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};
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&gpu_gx_gdsc {
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parent-supply = <&pm8150_2_s3_level>;
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vdd_parent-supply = <&pm8150_2_s3_level>;
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};
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&ufsphy_mem {
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vdda-phy-supply = <&pm8150_2_l18>;
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};
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&clock_scc {
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vdd_scc_cx-supply = <&VDD_CX_LEVEL>;
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status = "ok";
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};
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&msm_cdsp_rm {
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/delete-property/ qcom,compute-cx-limit-en;
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/delete-property/ qcom,compute-priority-mode;
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};
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&thermal_zones {
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/delete-node/ cpu-1-7-lowf;
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/delete-node/ gpuss-0-lowf;
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/delete-node/ camera-lowf;
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/delete-node/ mdm-scl-lowf;
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lmh-dcvs-01 {
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trips {
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active-config {
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temperature = <105000>;
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hysteresis = <40000>;
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};
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};
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};
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lmh-dcvs-00 {
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trips {
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active-config {
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temperature = <105000>;
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hysteresis = <40000>;
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};
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};
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};
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gpuss-max-step {
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trips {
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gpu-trip0 {
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temperature = <105000>;
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};
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};
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};
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pop-mem-step {
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status = "disabled";
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};
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pop-mem-test {
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status = "disabled";
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};
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npu-step {
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trips {
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npu-trip0 {
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temperature = <105000>;
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};
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};
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};
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cpu-0-0-step {
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trips {
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cpu00-config {
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temperature = <115000>;
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};
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};
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};
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cpu-0-1-step {
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trips {
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cpu01-config {
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temperature = <115000>;
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};
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};
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};
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cpu-0-2-step {
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trips {
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cpu02-config {
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temperature = <115000>;
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};
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};
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};
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cpu-0-3-step {
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trips {
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cpu03-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-0-step {
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trips {
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cpu10-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-1-step {
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trips {
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cpu11-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-2-step {
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trips {
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cpu12-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-3-step {
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trips {
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cpu13-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-4-step {
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trips {
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cpu14-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-5-step {
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trips {
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cpu15-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-6-step {
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trips {
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cpu16-config {
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temperature = <115000>;
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};
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};
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};
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cpu-1-7-step {
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trips {
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cpu17-config {
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temperature = <115000>;
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};
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};
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};
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q6-hvx-step {
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trips {
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q6-hvx-step0 {
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temperature = <105000>;
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};
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q6-hvx-step1 {
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temperature = <115000>;
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};
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};
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};
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};
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&mdss_dsi0_pll {
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/delete-property/ qcom,dsi-pll-ssc-en;
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};
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&mdss_dsi1_pll {
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/delete-property/ qcom,dsi-pll-ssc-en;
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};
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&mdss_mdp {
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qcom,sde-mixer-display-pref = "primary", "none", "none",
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"none", "none", "none";
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/delete-property/ qcom,sde-has-dest-scaler;
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/* roi misr related hw block */
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qcom,sde-roi-misr-off = <0x82820 0x82880 0x828e0
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0x82940 0x829a0 0x82a00>;
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qcom,sde-roi-misr-size = <0x60>;
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qcom,sde-dspp-blocks {
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qcom,sde-dspp-roi-misr = <0x1200 0x00010000>;
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};
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};
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#include <dt-bindings/gpio/gpio.h>
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&soc {
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hsi2s: qcom,hsi2s {
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compatible = "qcom,sa8155-hsi2s", "qcom,hsi2s";
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number-of-interfaces = <3>;
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reg = <0x172C0000 0x28000>,
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<0x17080000 0xE000>;
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reg-names = "lpa_if", "lpass_tcsr";
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interrupts = <GIC_SPI 267 0>;
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number-of-rate-detectors = <2>;
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rate-detector-interfaces = <0 1>;
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iommus = <&apps_smmu 0x1B5C 0x1>,
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<&apps_smmu 0x1B5E 0x0>;
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qcom,smmu-s1-bypass;
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qcom,iova-mapping = <0x0 0xFFFFFFFF>;
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sdr0: qcom,hs0_i2s {
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compatible = "qcom,hsi2s-interface";
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minor-number = <0>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hs1_i2s_mclk_active &hs1_i2s_sck_active
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&hs1_i2s_ws_active &hs1_i2s_data0_active
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&hs1_i2s_data1_active>;
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pinctrl-1 = <&hs1_i2s_mclk_sleep &hs1_i2s_sck_sleep
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&hs1_i2s_ws_sleep &hs1_i2s_data0_sleep
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&hs1_i2s_data1_sleep>;
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bit-clock-hz = <12288000>;
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data-buffer-ms = <10>;
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bit-depth = <32>;
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spkr-channel-count = <2>;
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mic-channel-count = <2>;
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pcm-rate = <2>;
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pcm-sync-src = <0>;
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aux-mode = <0>;
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rpcm-width = <1>;
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tpcm-width = <1>;
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enable-tdm = <1>;
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tdm-rate = <32>;
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tdm-rpcm-width = <16>;
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tdm-tpcm-width = <16>;
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tdm-sync-delay = <2>;
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tdm-inv-sync = <0>;
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pcm-lane-config = <1>;
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};
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sdr1: qcom,hs1_i2s {
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compatible = "qcom,hsi2s-interface";
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minor-number = <1>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hs2_i2s_mclk_active &hs2_i2s_sck_active
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&hs2_i2s_ws_active &hs2_i2s_data0_active
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&hs2_i2s_data1_active>;
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pinctrl-1 = <&hs2_i2s_mclk_sleep &hs2_i2s_sck_sleep
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&hs2_i2s_ws_sleep &hs2_i2s_data0_sleep
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&hs2_i2s_data1_sleep>;
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bit-clock-hz = <12288000>;
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data-buffer-ms = <10>;
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bit-depth = <32>;
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spkr-channel-count = <2>;
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mic-channel-count = <2>;
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pcm-rate = <2>;
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pcm-sync-src = <0>;
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aux-mode = <0>;
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rpcm-width = <1>;
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tpcm-width = <1>;
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enable-tdm = <1>;
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tdm-rate = <32>;
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tdm-rpcm-width = <16>;
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tdm-tpcm-width = <16>;
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tdm-sync-delay = <2>;
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tdm-inv-sync = <0>;
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pcm-lane-config = <1>;
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};
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sdr2: qcom,hs2_i2s {
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compatible = "qcom,hsi2s-interface";
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minor-number = <2>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&hs3_i2s_mclk_active &hs3_i2s_sck_active
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&hs3_i2s_ws_active &hs3_i2s_data0_active
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&hs3_i2s_data1_active>;
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pinctrl-1 = <&hs3_i2s_mclk_sleep &hs3_i2s_sck_sleep
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&hs3_i2s_ws_sleep &hs3_i2s_data0_sleep
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&hs3_i2s_data1_sleep>;
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bit-clock-hz = <12288000>;
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data-buffer-ms = <10>;
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bit-depth = <32>;
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spkr-channel-count = <2>;
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mic-channel-count = <2>;
|
|
pcm-rate = <2>;
|
|
pcm-sync-src = <0>;
|
|
aux-mode = <0>;
|
|
rpcm-width = <1>;
|
|
tpcm-width = <1>;
|
|
enable-tdm = <1>;
|
|
tdm-rate = <32>;
|
|
tdm-rpcm-width = <16>;
|
|
tdm-tpcm-width = <16>;
|
|
tdm-sync-delay = <2>;
|
|
tdm-inv-sync = <0>;
|
|
pcm-lane-config = <1>;
|
|
};
|
|
};
|
|
|
|
mtl_rx_setup: rx-queues-config {
|
|
snps,rx-queues-to-use = <4>;
|
|
snps,rx-sched-sp;
|
|
|
|
queue0 {
|
|
snps,dcb-algorithm;
|
|
snps,map-to-dma-channel = <0x0>;
|
|
snps,route-up;
|
|
snps,priority = <0x1>;
|
|
};
|
|
|
|
queue1 {
|
|
snps,dcb-algorithm;
|
|
snps,map-to-dma-channel = <0x1>;
|
|
snps,route-ptp;
|
|
};
|
|
|
|
queue2 {
|
|
snps,avb-algorithm;
|
|
snps,map-to-dma-channel = <0x2>;
|
|
snps,route-avcp;
|
|
};
|
|
|
|
queue3 {
|
|
snps,avb-algorithm;
|
|
snps,map-to-dma-channel = <0x3>;
|
|
snps,priority = <0xC>;
|
|
};
|
|
};
|
|
|
|
mtl_tx_setup: tx-queues-config {
|
|
snps,tx-queues-to-use = <5>;
|
|
snps,tx-sched-sp;
|
|
queue0 {
|
|
snps,dcb-algorithm;
|
|
};
|
|
|
|
queue1 {
|
|
snps,dcb-algorithm;
|
|
};
|
|
|
|
queue2 {
|
|
snps,avb-algorithm;
|
|
snps,send_slope = <0x1000>;
|
|
snps,idle_slope = <0x1000>;
|
|
snps,high_credit = <0x3E800>;
|
|
snps,low_credit = <0xFFC18000>;
|
|
};
|
|
|
|
queue3 {
|
|
snps,avb-algorithm;
|
|
snps,send_slope = <0x1000>;
|
|
snps,idle_slope = <0x1000>;
|
|
snps,high_credit = <0x3E800>;
|
|
snps,low_credit = <0xFFC18000>;
|
|
};
|
|
};
|
|
|
|
ethqos_hw: qcom,ethernet@00020000 {
|
|
compatible = "qcom,stmmac-ethqos";
|
|
qcom,arm-smmu;
|
|
reg = <0x20000 0x10000>,
|
|
<0x36000 0x100>,
|
|
<0x3D00000 0x300000>;
|
|
reg-names = "stmmaceth", "rgmii","tlmm-central-base";
|
|
clocks = <&clock_gcc GCC_EMAC_AXI_CLK>,
|
|
<&clock_gcc GCC_EMAC_SLV_AHB_CLK>,
|
|
<&clock_gcc GCC_EMAC_PTP_CLK>,
|
|
<&clock_gcc GCC_EMAC_RGMII_CLK>;
|
|
clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
|
|
snps,ptp-ref-clk-rate = <250000000>;
|
|
snps,ptp-req-clk-rate = <96000000>;
|
|
interrupts-extended = <&pdc 0 689 4>, <&pdc 0 699 4>,
|
|
<&tlmm 124 2>;
|
|
interrupt-names = "macirq", "eth_lpi",
|
|
"phy-intr";
|
|
qcom,msm-bus,name = "emac";
|
|
qcom,msm-bus,num-cases = <4>;
|
|
qcom,msm-bus,num-paths = <2>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<98 512 0 0>, <1 781 0 0>, /* No vote */
|
|
<98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */
|
|
<98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */
|
|
<98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */
|
|
qcom,bus-vector-names = "0", "10", "100", "1000";
|
|
snps,tso;
|
|
mac-address = [00 55 7B B5 7D f7];
|
|
rx-fifo-depth = <16384>;
|
|
tx-fifo-depth = <32768>;
|
|
snps,mtl-rx-config = <&mtl_rx_setup>;
|
|
snps,mtl-tx-config = <&mtl_tx_setup>;
|
|
snps,reset-gpio = <&tlmm 79 GPIO_ACTIVE_HIGH>;
|
|
qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;
|
|
gdsc_emac-supply = <&emac_gdsc>;
|
|
|
|
pinctrl-names = "dev-emac-mdc",
|
|
"dev-emac-mdio",
|
|
"dev-emac-rgmii_txd0_state",
|
|
"dev-emac-rgmii_txd1_state",
|
|
"dev-emac-rgmii_txd2_state",
|
|
"dev-emac-rgmii_txd3_state",
|
|
"dev-emac-rgmii_txc_state",
|
|
"dev-emac-rgmii_tx_ctl_state",
|
|
"dev-emac-rgmii_rxd0_state",
|
|
"dev-emac-rgmii_rxd1_state",
|
|
"dev-emac-rgmii_rxd2_state",
|
|
"dev-emac-rgmii_rxd3_state",
|
|
"dev-emac-rgmii_rxc_state",
|
|
"dev-emac-rgmii_rx_ctl_state",
|
|
"dev-emac-phy_intr",
|
|
"dev-emac-phy_reset_state",
|
|
"dev-emac_pin_pps_0";
|
|
|
|
pinctrl-0 = <&emac_mdc>;
|
|
pinctrl-1 = <&emac_mdio>;
|
|
|
|
pinctrl-2 = <&emac_rgmii_txd0>;
|
|
pinctrl-3 = <&emac_rgmii_txd1>;
|
|
pinctrl-4 = <&emac_rgmii_txd2>;
|
|
pinctrl-5 = <&emac_rgmii_txd3>;
|
|
pinctrl-6 = <&emac_rgmii_txc>;
|
|
pinctrl-7 = <&emac_rgmii_tx_ctl>;
|
|
|
|
pinctrl-8 = <&emac_rgmii_rxd0>;
|
|
pinctrl-9 = <&emac_rgmii_rxd1>;
|
|
pinctrl-10 = <&emac_rgmii_rxd2>;
|
|
pinctrl-11 = <&emac_rgmii_rxd3>;
|
|
pinctrl-12 = <&emac_rgmii_rxc>;
|
|
pinctrl-13 = <&emac_rgmii_rx_ctl>;
|
|
|
|
pinctrl-14 = <&emac_phy_intr>;
|
|
pinctrl-15 = <&emac_phy_reset_state>;
|
|
pinctrl-16 = <&emac_pin_pps_0>;
|
|
|
|
snps,reset-active-low;
|
|
snps,reset-delays-us = <0 11000 70000>;
|
|
phy-mode = "rgmii";
|
|
|
|
ethqos_emb_smmu: ethqos_emb_smmu {
|
|
compatible = "qcom,emac-smmu-embedded";
|
|
iommus = <&apps_smmu 0x3C0 0x0>;
|
|
qcom,iova-mapping = <0x80000000 0x40000000>;
|
|
};
|
|
};
|
|
|
|
emac_hw: qcom,emac@00020000 {
|
|
compatible = "qcom,emac-dwc-eqos";
|
|
qcom,arm-smmu;
|
|
emac-core-version = <2>;
|
|
emac-phy-addr = <7>;
|
|
reg = <0x20000 0x10000>,
|
|
<0x36000 0x100>,
|
|
<0x3D00000 0x300000>;
|
|
reg-names = "emac-base", "rgmii-base", "tlmm-central-base";
|
|
interrupts-extended = <&pdc 0 689 4>, <&pdc 0 699 4>,
|
|
<&tlmm 124 2>, <&pdc 0 691 4>,
|
|
<&pdc 0 692 4>, <&pdc 0 693 4>,
|
|
<&pdc 0 694 4>, <&pdc 0 695 4>,
|
|
<&pdc 0 696 4>, <&pdc 0 697 4>,
|
|
<&pdc 0 698 4>, <&pdc 0 699 4>;
|
|
interrupt-names = "sbd-intr", "lpi-intr",
|
|
"phy-intr", "tx-ch0-intr",
|
|
"tx-ch1-intr", "tx-ch2-intr",
|
|
"tx-ch3-intr", "tx-ch4-intr",
|
|
"rx-ch0-intr", "rx-ch1-intr",
|
|
"rx-ch2-intr", "rx-ch3-intr";
|
|
qcom,msm-bus,name = "emac";
|
|
qcom,msm-bus,num-cases = <4>;
|
|
qcom,msm-bus,num-paths = <2>;
|
|
qcom,msm-bus,vectors-KBps =
|
|
<98 512 0 0>, <1 781 0 0>, /* No vote */
|
|
<98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */
|
|
<98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */
|
|
<98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */
|
|
qcom,bus-vector-names = "0", "10", "100", "1000";
|
|
clocks = <&clock_gcc GCC_EMAC_AXI_CLK>,
|
|
<&clock_gcc GCC_EMAC_PTP_CLK>,
|
|
<&clock_gcc GCC_EMAC_RGMII_CLK>,
|
|
<&clock_gcc GCC_EMAC_SLV_AHB_CLK>;
|
|
clock-names = "emac_axi_clk", "emac_ptp_clk",
|
|
"emac_rgmii_clk", "emac_slv_ahb_clk";
|
|
qcom,phy-reset = <&tlmm 79 GPIO_ACTIVE_HIGH>;
|
|
qcom,phy-reset-delay-msecs = <10 50>;
|
|
qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;
|
|
gdsc_emac-supply = <&emac_gdsc>;
|
|
pinctrl-names = "dev-emac-mdc",
|
|
"dev-emac-mdio",
|
|
"dev-emac-rgmii_txd0_state",
|
|
"dev-emac-rgmii_txd1_state",
|
|
"dev-emac-rgmii_txd2_state",
|
|
"dev-emac-rgmii_txd3_state",
|
|
"dev-emac-rgmii_txc_state",
|
|
"dev-emac-rgmii_tx_ctl_state",
|
|
"dev-emac-rgmii_rxd0_state",
|
|
"dev-emac-rgmii_rxd1_state",
|
|
"dev-emac-rgmii_rxd2_state",
|
|
"dev-emac-rgmii_rxd3_state",
|
|
"dev-emac-rgmii_rxc_state",
|
|
"dev-emac-rgmii_rx_ctl_state",
|
|
"dev-emac-phy_intr",
|
|
"dev-emac-phy_reset_state",
|
|
"dev-emac_pin_pps_0";
|
|
|
|
pinctrl-0 = <&emac_mdc>;
|
|
pinctrl-1 = <&emac_mdio>;
|
|
|
|
pinctrl-2 = <&emac_rgmii_txd0>;
|
|
pinctrl-3 = <&emac_rgmii_txd1>;
|
|
pinctrl-4 = <&emac_rgmii_txd2>;
|
|
pinctrl-5 = <&emac_rgmii_txd3>;
|
|
pinctrl-6 = <&emac_rgmii_txc>;
|
|
pinctrl-7 = <&emac_rgmii_tx_ctl>;
|
|
|
|
pinctrl-8 = <&emac_rgmii_rxd0>;
|
|
pinctrl-9 = <&emac_rgmii_rxd1>;
|
|
pinctrl-10 = <&emac_rgmii_rxd2>;
|
|
pinctrl-11 = <&emac_rgmii_rxd3>;
|
|
pinctrl-12 = <&emac_rgmii_rxc>;
|
|
pinctrl-13 = <&emac_rgmii_rx_ctl>;
|
|
pinctrl-14 = <&emac_phy_intr>;
|
|
pinctrl-15 = <&emac_phy_reset_state>;
|
|
pinctrl-16 = <&emac_pin_pps_0>;
|
|
|
|
io-macro-info {
|
|
io-macro-bypass-mode = <0>;
|
|
io-interface = "rgmii";
|
|
};
|
|
emac_emb_smmu: emac_emb_smmu {
|
|
compatible = "qcom,emac-smmu-embedded";
|
|
iommus = <&apps_smmu 0x3C0 0x0>;
|
|
qcom,iova-mapping = <0x80000000 0x40000000>;
|
|
};
|
|
};
|
|
|
|
qcom,rmnet-ipa {
|
|
status="disabled";
|
|
};
|
|
|
|
qfprom: qfprom@780130 {
|
|
compatible = "qcom,qfprom";
|
|
reg = <0x00780130 0x4>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
read-only;
|
|
ranges;
|
|
};
|
|
};
|
|
|
|
&ipa_hw {
|
|
status="disabled";
|
|
};
|
|
|
|
&kgsl_msm_iommu {
|
|
qcom,secure-size = <0x20000000>; /* 512MB */
|
|
};
|
|
|
|
#include "sa8155-audio.dtsi"
|
|
#include "sa8155-camera.dtsi"
|
|
#include "sa8155-camera-sensor.dtsi"
|
|
|