51 lines
1.1 KiB
51 lines
1.1 KiB
NVMe Device Support on chipsets of Qualcomm Technologies, Inc.
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Required properties:
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- compatible : should be one of "qcom,nvme"
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If SMMU is present, also use:
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- qcom,smmu : if present, SMMU attach is performed
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- qcom,smmu-iova-base : SMMU IOVA start address the device can access
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- qcom,smmu-iova-size : SMMU IOVA size the device can access
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Optional Properties:
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- qcom,smmu-attr-s1-bypass : Bypasses SMMU S1 translation
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- qcom,smmu-attr-fastmap : Enables SMMU fastmap
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- qcom,smmu-attr-atomic : Enables DMA alloc using GFP_ATOMIC
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- qcom,smmu-attr-pt-coherent : Use if DMA coherency is available for SMMU page tables
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Example:
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&pcie_rc0 {
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nvme_x1: qcom,nvme@pcie_rc0 {
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compatible = "qcom,nvme";
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qcom,smmu;
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qcom,smmu-iova-base = /bits/ 64 <0x0>;
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qcom,smmu-iova-size = /bits/ 64 <0x100000000>;
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qcom,smmu-attr-s1-bypass;
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};
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};
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&pcie_rc1 {
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nvme_x4: qcom,nvme@pcie_rc1 {
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compatible = "qcom,nvme";
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qcom,smmu;
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qcom,smmu-iova-base = /bits/ 64 <0x0>;
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qcom,smmu-iova-size = /bits/ 64 <0x100000000>;
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qcom,smmu-attr-atomic;
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qcom,smmu-attr-fastmap;
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qcom,smmu-attr-pt-coherent;
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};
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};
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