You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
38 lines
1.5 KiB
38 lines
1.5 KiB
Marvell Armada 370, 375, 38x, XP Interrupt Controller
|
|
-----------------------------------------------------
|
|
|
|
Required properties:
|
|
- compatible: Should be "marvell,mpic"
|
|
- interrupt-controller: Identifies the node as an interrupt controller.
|
|
- msi-controller: Identifies the node as an PCI Message Signaled
|
|
Interrupt controller.
|
|
- #interrupt-cells: The number of cells to define the interrupts. Should be 1.
|
|
The cell is the IRQ number
|
|
|
|
- reg: Should contain PMIC registers location and length. First pair
|
|
for the main interrupt registers, second pair for the per-CPU
|
|
interrupt registers. For this last pair, to be compliant with SMP
|
|
support, the "virtual" must be use (For the record, these registers
|
|
automatically map to the interrupt controller registers of the
|
|
current CPU)
|
|
|
|
Optional properties:
|
|
|
|
- interrupts: If defined, then it indicates that this MPIC is
|
|
connected as a slave to another interrupt controller. This is
|
|
typically the case on Armada 375 and Armada 38x, where the MPIC is
|
|
connected as a slave to the Cortex-A9 GIC. The provided interrupt
|
|
indicate to which GIC interrupt the MPIC output is connected.
|
|
|
|
Example:
|
|
|
|
mpic: interrupt-controller@d0020000 {
|
|
compatible = "marvell,mpic";
|
|
#interrupt-cells = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-controller;
|
|
msi-controller;
|
|
reg = <0xd0020a00 0x1d0>,
|
|
<0xd0021070 0x58>;
|
|
};
|
|
|