/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <dt-bindings/soc/qcom,dcc_v2.h>


/* config_atoll_dcc_gemnoc() */
#define config_atoll_dcc_gemnoc	\
	\
		/* Gladiator */	\
		<DCC_READ 0x9680000 1 0>,	\
		<DCC_READ 0x9680004 1 0>,	\
		<DCC_LOOP 8 0 0>,	\
		<DCC_READ 0x9681000 1 0>,	\
		<DCC_LOOP 1 0 0>,	\
		<DCC_READ 0x9681004 1 0>,	\
		<DCC_READ 0x9681008 1 0>,	\
		<DCC_READ 0x968100c 1 0>,	\
		<DCC_READ 0x9681010 1 0>,	\
		<DCC_READ 0x9681014 1 0>,	\
		<DCC_READ 0x968101c 1 0>,	\
		<DCC_READ 0x9681020 1 0>,	\
		<DCC_READ 0x9681024 1 0>,	\
		<DCC_READ 0x9681028 1 0>,	\
		<DCC_READ 0x968102c 1 0>,	\
		<DCC_READ 0x9681030 1 0>,	\
		<DCC_READ 0x9681034 1 0>,	\
		<DCC_READ 0x968103c 1 0>,	\
		<DCC_READ 0x9698100 1 0>,	\
		<DCC_READ 0x9698104 1 0>,	\
		<DCC_READ 0x9698108 1 0>,	\
		<DCC_READ 0x9698110 1 0>,	\
		<DCC_READ 0x9698120 1 0>,	\
		<DCC_READ 0x9698124 1 0>,	\
		<DCC_READ 0x9698128 1 0>,	\
		<DCC_READ 0x969812c 1 0>,	\
		<DCC_READ 0x9698130 1 0>,	\
		<DCC_READ 0x9698134 1 0>,	\
		<DCC_READ 0x9698138 1 0>,	\
		<DCC_READ 0x969813c 1 0>,	\
	\
		/* GEMNOC Registers */	\
		<DCC_READ 0x9698500 1 0>,	\
		<DCC_READ 0x9698504 1 0>,	\
		<DCC_READ 0x9698508 1 0>,	\
		<DCC_READ 0x969850c 1 0>,	\
		<DCC_READ 0x9698510 1 0>,	\
		<DCC_READ 0x9698514 1 0>,	\
		<DCC_READ 0x9698518 1 0>,	\
		<DCC_READ 0x969851c 1 0>,	\
		<DCC_READ 0x9698700 1 0>,	\
		<DCC_READ 0x9698704 1 0>,	\
		<DCC_READ 0x9698708 1 0>,	\
		<DCC_READ 0x969870c 1 0>,	\
		<DCC_READ 0x9698714 1 0>,	\
		<DCC_READ 0x9698718 1 0>,	\
		<DCC_READ 0x969871c 1 0>

/* config_atoll_dcc_noc_err_regs() */
#define config_atoll_dcc_noc_err_regs	\
	\
		/* CNOC */	\
		/* <DCC_READ 0x1500204 1 0>, */	\
		/* <DCC_READ 0x1500240 1 0>, */	\
		/* <DCC_READ 0x1500244 1 0>, */	\
		/* <DCC_READ 0x1500248 1 0>, */	\
		/* <DCC_READ 0x150024C 1 0>, */	\
		/* <DCC_READ 0x1500250 1 0>, */	\
		/* <DCC_READ 0x1500258 1 0>, */	\
		/* <DCC_READ 0x1500288 1 0>, */	\
		/* <DCC_READ 0x150028C 1 0>, */	\
		/* <DCC_READ 0x1500290 1 0>, */	\
		/* <DCC_READ 0x1500294 1 0>, */	\
		/* <DCC_READ 0x15002A8 1 0>, */	\
		/* <DCC_READ 0x15002AC 1 0>, */	\
		/* <DCC_READ 0x15002B0 1 0>, */	\
		/* <DCC_READ 0x15002B4 1 0>, */	\
		/* <DCC_READ 0x1500300 1 0>, */	\
		/* <DCC_READ 0x1500304 1 0>, */	\
		/* <DCC_READ 0x1500010 1 0>, */	\
		/* <DCC_READ 0x1500020 1 0>, */	\
		/* <DCC_READ 0x1500024 1 0>, */	\
		/* <DCC_READ 0x1500028 1 0>, */	\
		/* <DCC_READ 0x150002C 1 0>, */	\
		/* <DCC_READ 0x1500030 1 0>, */	\
		/* <DCC_READ 0x1500034 1 0>, */	\
		/* <DCC_READ 0x1500038 1 0>, */	\
		/* <DCC_READ 0x150003C 1 0>, */	\
	\
		/* SNOC */	\
		<DCC_READ 0x1620204 1 0>,	\
		<DCC_READ 0x1620240 1 0>,	\
		<DCC_READ 0x1620248 1 0>,	\
		<DCC_READ 0x1620288 1 0>,	\
		<DCC_READ 0x162028C 1 0>,	\
		<DCC_READ 0x1620290 1 0>,	\
		<DCC_READ 0x1620294 1 0>,	\
		<DCC_READ 0x16202A8 1 0>,	\
		<DCC_READ 0x16202AC 1 0>,	\
		<DCC_READ 0x16202B0 1 0>,	\
		<DCC_READ 0x16202B4 1 0>,	\
		<DCC_READ 0x1620300 1 0>,	\
	\
		/* AGGNOC */	\
		<DCC_READ 0x16E0404 1 0>,	\
		<DCC_READ 0x16E0408 1 0>,	\
		<DCC_READ 0x16E0410 1 0>,	\
		<DCC_READ 0x16E0420 1 0>,	\
		<DCC_READ 0x16E0424 1 0>,	\
		<DCC_READ 0x16E0428 1 0>,	\
		<DCC_READ 0x16E042C 1 0>,	\
		<DCC_READ 0x16E0430 1 0>,	\
		<DCC_READ 0x16E0434 1 0>,	\
		<DCC_READ 0x16E0438 1 0>,	\
		<DCC_READ 0x16E043C 1 0>,	\
		<DCC_READ 0x16E0300 1 0>,	\
		<DCC_READ 0x16E0304 1 0>,	\
		<DCC_READ 0x16E0700 1 0>,	\
		<DCC_READ 0x16E0704 1 0>,	\
		<DCC_READ 0x1700C00 1 0>,	\
		<DCC_READ 0x1700C08 1 0>,	\
		<DCC_READ 0x1700C10 1 0>,	\
		<DCC_READ 0x1700C20 1 0>,	\
		<DCC_READ 0x1700C24 1 0>,	\
		<DCC_READ 0x1700C28 1 0>,	\
		<DCC_READ 0x1700C2C 1 0>,	\
		<DCC_READ 0x1700C30 1 0>,	\
		<DCC_READ 0x1700C34 1 0>,	\
		<DCC_READ 0x1700C38 1 0>,	\
		<DCC_READ 0x1700C3C 1 0>,	\
		<DCC_READ 0x1700300 1 0>,	\
		<DCC_READ 0x1700304 1 0>,	\
		<DCC_READ 0x1700308 1 0>,	\
		<DCC_READ 0x170030C 1 0>,	\
		<DCC_READ 0x1700310 1 0>,	\
		<DCC_READ 0x1700500 1 0>,	\
		<DCC_READ 0x1700504 1 0>,	\
		<DCC_READ 0x1700508 1 0>,	\
		<DCC_READ 0x170050C 1 0>,	\
		<DCC_READ 0x1700900 1 0>,	\
		<DCC_READ 0x1700904 1 0>,	\
		<DCC_READ 0x1700908 1 0>,	\
	\
		/* MNOC */	\
		<DCC_READ 0x1740004 1 0>,	\
		<DCC_READ 0x1740008 1 0>,	\
		<DCC_READ 0x1740010 1 0>,	\
		<DCC_READ 0x1740020 1 0>,	\
		<DCC_READ 0x1740024 1 0>,	\
		<DCC_READ 0x1740028 1 0>,	\
		<DCC_READ 0x174002C 1 0>,	\
		<DCC_READ 0x1740030 1 0>,	\
		<DCC_READ 0x1740034 1 0>,	\
		<DCC_READ 0x1740038 1 0>,	\
		<DCC_READ 0x174003C 1 0>,	\
		<DCC_READ 0x1740300 1 0>,	\
		<DCC_READ 0x1740304 1 0>,	\
		<DCC_READ 0x1740308 1 0>,	\
		<DCC_READ 0x174030C 1 0>,	\
		<DCC_READ 0x1740310 1 0>,	\
		<DCC_READ 0x1740314 1 0>,	\
	\
		/* GEM_NOC */	\
		<DCC_READ 0x9698204 1 0>,	\
		<DCC_READ 0x9698240 1 0>,	\
		<DCC_READ 0x9698244 1 0>,	\
		<DCC_READ 0x9698248 1 0>,	\
		<DCC_READ 0x969824C 1 0>,	\
		<DCC_READ 0x9681010 1 0>,	\
		<DCC_READ 0x9681014 1 0>,	\
		<DCC_READ 0x9681018 1 0>,	\
		<DCC_READ 0x968101C 1 0>,	\
		<DCC_READ 0x9681020 1 0>,	\
		<DCC_READ 0x9681024 1 0>,	\
		<DCC_READ 0x9681028 1 0>,	\
		<DCC_READ 0x968102C 1 0>,	\
		<DCC_READ 0x9681030 1 0>,	\
		<DCC_READ 0x9681034 1 0>,	\
		<DCC_READ 0x968103C 1 0>,	\
		<DCC_READ 0x9698100 1 0>,	\
		<DCC_READ 0x9698104 1 0>,	\
		<DCC_READ 0x9698108 1 0>,	\
		<DCC_READ 0x9698110 1 0>,	\
		<DCC_READ 0x9698120 1 0>,	\
		<DCC_READ 0x9698124 1 0>,	\
		<DCC_READ 0x9698128 1 0>,	\
		<DCC_READ 0x969812C 1 0>,	\
		<DCC_READ 0x9698130 1 0>,	\
		<DCC_READ 0x9698134 1 0>,	\
		<DCC_READ 0x9698138 1 0>,	\
		<DCC_READ 0x969813C 1 0>,	\
	\
		/* DC_NOC */	\
		<DCC_READ 0x9160204 1 0>,	\
		<DCC_READ 0x9160240 1 0>,	\
		<DCC_READ 0x9160248 1 0>,	\
		<DCC_READ 0x9160288 1 0>,	\
		<DCC_READ 0x9160290 1 0>,	\
		<DCC_READ 0x9160300 1 0>,	\
		<DCC_READ 0x9160304 1 0>,	\
		<DCC_READ 0x9160308 1 0>,	\
		<DCC_READ 0x916030C 1 0>,	\
		<DCC_READ 0x9160310 1 0>,	\
		<DCC_READ 0x9160314 1 0>,	\
		<DCC_READ 0x9160318 1 0>,	\
		<DCC_READ 0x9160008 1 0>,	\
		<DCC_READ 0x9160010 1 0>,	\
		<DCC_READ 0x9160020 1 0>,	\
		<DCC_READ 0x9160024 1 0>,	\
		<DCC_READ 0x9160028 1 0>,	\
		<DCC_READ 0x916002C 1 0>,	\
		<DCC_READ 0x9160030 1 0>,	\
		<DCC_READ 0x9160034 1 0>,	\
		<DCC_READ 0x9160038 1 0>,	\
		<DCC_READ 0x916003C 1 0>,	\
	\
		/* LPASS AGGNOC */	\
		<DCC_READ 0x63042680 1 0>,	\
		<DCC_READ 0x63042684 1 0>,	\
		<DCC_READ 0x63042688 1 0>,	\
		<DCC_READ 0x63042690 1 0>,	\
		<DCC_READ 0x630426A0 1 0>,	\
		<DCC_READ 0x630426A4 1 0>,	\
		<DCC_READ 0x630426A8 1 0>,	\
		<DCC_READ 0x630426AC 1 0>,	\
		<DCC_READ 0x630426B0 1 0>,	\
		<DCC_READ 0x630426B4 1 0>,	\
		<DCC_READ 0x630426B8 1 0>,	\
		<DCC_READ 0x630426BC 1 0>,	\
		<DCC_READ 0x63041900 1 0>,	\
		<DCC_READ 0x63041D00 1 0>,	\
	\
		/* SNOC_CENTER_NIU_STATUS_SBM0_SENSEIN */	\
		<DCC_READ 0x1620500 4 0>,	\
	\
		/* SNOC_CENTER_NIU_STATUS_SBM1_SENSEIN */	\
		<DCC_READ 0x1620700 4 0>,	\
	\
		/* SNOC_CENTER_SBM_SENSEIN */	\
		<DCC_READ 0x1620300 1 0>,	\
	\
		/* SNOC_MONAQ_NIU_STATUS_SBM_SENSEIN */	\
		<DCC_READ 0x1620F00 2 0>,	\
	\
		/* SNOC_WEST_NIU_STATUS_SBM_SENSEIN */	\
		<DCC_READ 0x1620B00 2 0>,	\
	\
		/* A1NOC_MONAQ_SBM_SENSEIN */	\
		<DCC_READ 0x1700B00 2 0>,	\
	\
		/* A1NOC_WEST_SBM_SENSEIN */	\
		<DCC_READ 0x1700700 3 0>,	\
	\
		/* CNOC_CENTER_STATUS_SBM_SENSEIN */	\
		/* <DCC_READ 0x1500500 7 0>, */	\
	\
		/* CNOC_MMNOC_STATUS_SBM_SENSEIN */	\
		/* <DCC_READ 0x1500D00 4 0>, */	\
	\
		/* CNOC_WEST_STATUS_SBM_SENSEIN */	\
		/* <DCC_READ 0x1501100 4 0>, */	\
	\
		/* DC_NOC_DISABLE_SBM_SENSEIN */	\
		<DCC_READ 0x9163100 1 0>,	\
	\
		/* GEM_NOC_SBM_MDSP_SAFE_SHAPING_SENSEIN */	\
		<DCC_READ 0x96AA100 1 0>,	\
	\
		/* LPASS_AG_NOC_SIDEBANDMANAGERSTATUS_MAIN_SIDEBANDMANAGER_SENSEIN */	\
		<DCC_READ 0x63041D00 1 0>,	\
	\
		/* NPU_SB_SENSEIN */	\
		<DCC_READ 0x9991500 8 0>

/* config_atoll_dcc_shrm() */
#define config_atoll_dcc_shrm	\
	\
		/* SHRM CSR */	\
		<DCC_READ 0x9050008 1 0>,	\
		/* <DCC_READ 0x9050068 1 0>, */	\
		<DCC_READ 0x9050078 1 0>

/* config_atoll_dcc_rscc_apps() */
#define config_atoll_dcc_rscc_apps	\
	\
		/* RSC */	\
		<DCC_READ 0x18200400 1 0>,	\
		<DCC_READ 0x18200404 1 0>,	\
		<DCC_READ 0x18200408 1 0>,	\
		<DCC_READ 0x18200038 1 0>,	\
		<DCC_READ 0x18200040 1 0>,	\
		<DCC_READ 0x18200048 1 0>,	\
		<DCC_READ 0x18220038 1 0>,	\
		<DCC_READ 0x18220040 1 0>,	\
		<DCC_READ 0x182200D0 1 0>,	\
		<DCC_READ 0x18200030 1 0>,	\
		<DCC_READ 0x18200010 1 0>,	\
	\
		/* RSC-TCS */	\
		<DCC_READ 0x1822000c 1 0>,	\
		<DCC_READ 0x18220d14 1 0>,	\
		<DCC_READ 0x18220fb4 1 0>,	\
		<DCC_READ 0x18221254 1 0>,	\
		<DCC_READ 0x182214f4 1 0>,	\
		<DCC_READ 0x18221794 1 0>,	\
		<DCC_READ 0x18221a34 1 0>,	\
		<DCC_READ 0x18221cd4 1 0>,	\
		<DCC_READ 0x18221f74 1 0>,	\
		<DCC_READ 0x18220d18 1 0>,	\
		<DCC_READ 0x18220fb8 1 0>,	\
		<DCC_READ 0x18221258 1 0>,	\
		<DCC_READ 0x182214f8 1 0>,	\
		<DCC_READ 0x18221798 1 0>,	\
		<DCC_READ 0x18221a38 1 0>,	\
		<DCC_READ 0x18221cd8 1 0>,	\
		<DCC_READ 0x18221f78 1 0>,	\
		<DCC_READ 0x18220d00 1 0>,	\
		<DCC_READ 0x18220d04 1 0>,	\
		<DCC_READ 0x18220d1c 1 0>,	\
		<DCC_READ 0x18220fbc 1 0>,	\
		<DCC_READ 0x1822125c 1 0>,	\
		<DCC_READ 0x182214fc 1 0>,	\
		<DCC_READ 0x1822179c 1 0>,	\
		<DCC_READ 0x18221a3c 1 0>,	\
		<DCC_READ 0x18221cdc 1 0>,	\
		<DCC_READ 0x18221f7c 1 0>,	\
		<DCC_READ 0x18221274 1 0>,	\
		<DCC_READ 0x18221288 1 0>,	\
		<DCC_READ 0x1822129c 1 0>,	\
		<DCC_READ 0x182212b0 1 0>,	\
		<DCC_READ 0x182212c4 1 0>,	\
		<DCC_READ 0x182212d8 1 0>,	\
		<DCC_READ 0x182212ec 1 0>,	\
		<DCC_READ 0x18221300 1 0>,	\
		<DCC_READ 0x18221314 1 0>,	\
		<DCC_READ 0x18221328 1 0>,	\
		<DCC_READ 0x1822133c 1 0>,	\
		<DCC_READ 0x18221350 1 0>,	\
		<DCC_READ 0x18221364 1 0>,	\
		<DCC_READ 0x18221378 1 0>,	\
		<DCC_READ 0x1822138c 1 0>,	\
		<DCC_READ 0x182213a0 1 0>,	\
		<DCC_READ 0x18221514 1 0>,	\
		<DCC_READ 0x18221528 1 0>,	\
		<DCC_READ 0x1822153c 1 0>,	\
		<DCC_READ 0x18221550 1 0>,	\
		<DCC_READ 0x18221564 1 0>,	\
		<DCC_READ 0x18221578 1 0>,	\
		<DCC_READ 0x1822158c 1 0>,	\
		<DCC_READ 0x182215a0 1 0>,	\
		<DCC_READ 0x182215b4 1 0>,	\
		<DCC_READ 0x182215c8 1 0>,	\
		<DCC_READ 0x182215dc 1 0>,	\
		<DCC_READ 0x182215f0 1 0>,	\
		<DCC_READ 0x18221604 1 0>,	\
		<DCC_READ 0x18221618 1 0>,	\
		<DCC_READ 0x1822162c 1 0>,	\
		<DCC_READ 0x18221640 1 0>,	\
		<DCC_READ 0x182217b4 1 0>,	\
		<DCC_READ 0x182217c8 1 0>,	\
		<DCC_READ 0x182217dc 1 0>,	\
		<DCC_READ 0x182217f0 1 0>,	\
		<DCC_READ 0x18221804 1 0>,	\
		<DCC_READ 0x18221818 1 0>,	\
		<DCC_READ 0x1822182c 1 0>,	\
		<DCC_READ 0x18221840 1 0>,	\
		<DCC_READ 0x18221854 1 0>,	\
		<DCC_READ 0x18221868 1 0>,	\
		<DCC_READ 0x1822187c 1 0>,	\
		<DCC_READ 0x18221890 1 0>,	\
		<DCC_READ 0x182218a4 1 0>,	\
		<DCC_READ 0x182218b8 1 0>,	\
		<DCC_READ 0x182218cc 1 0>,	\
		<DCC_READ 0x182218e0 1 0>,	\
		<DCC_READ 0x18221a54 1 0>,	\
		<DCC_READ 0x18221a68 1 0>,	\
		<DCC_READ 0x18221a7c 1 0>,	\
		<DCC_READ 0x18221a90 1 0>,	\
		<DCC_READ 0x18221aa4 1 0>,	\
		<DCC_READ 0x18221ab8 1 0>,	\
		<DCC_READ 0x18221acc 1 0>,	\
		<DCC_READ 0x18221ae0 1 0>,	\
		<DCC_READ 0x18221af4 1 0>,	\
		<DCC_READ 0x18221b08 1 0>,	\
		<DCC_READ 0x18221b1c 1 0>,	\
		<DCC_READ 0x18221b30 1 0>,	\
		<DCC_READ 0x18221b44 1 0>,	\
		<DCC_READ 0x18221b58 1 0>,	\
		<DCC_READ 0x18221b6c 1 0>,	\
		<DCC_READ 0x18221b80 1 0>,	\
		<DCC_READ 0x18221cf4 1 0>,	\
		<DCC_READ 0x18221d08 1 0>,	\
		<DCC_READ 0x18221d1c 1 0>,	\
		<DCC_READ 0x18221d30 1 0>,	\
		<DCC_READ 0x18221d44 1 0>,	\
		<DCC_READ 0x18221d58 1 0>,	\
		<DCC_READ 0x18221d6c 1 0>,	\
		<DCC_READ 0x18221d80 1 0>,	\
		<DCC_READ 0x18221d94 1 0>,	\
		<DCC_READ 0x18221da8 1 0>,	\
		<DCC_READ 0x18221dbc 1 0>,	\
		<DCC_READ 0x18221dd0 1 0>,	\
		<DCC_READ 0x18221de4 1 0>,	\
		<DCC_READ 0x18221df8 1 0>,	\
		<DCC_READ 0x18221e0c 1 0>,	\
		<DCC_READ 0x18221e20 1 0>,	\
		<DCC_READ 0x18221f94 1 0>,	\
		<DCC_READ 0x18221fa8 1 0>,	\
		<DCC_READ 0x18221fbc 1 0>,	\
		<DCC_READ 0x18221fd0 1 0>,	\
		<DCC_READ 0x18221fe4 1 0>,	\
		<DCC_READ 0x18221ff8 1 0>,	\
		<DCC_READ 0x1822200c 1 0>,	\
		<DCC_READ 0x18222020 1 0>,	\
		<DCC_READ 0x18222034 1 0>,	\
		<DCC_READ 0x18222048 1 0>,	\
		<DCC_READ 0x1822205c 1 0>,	\
		<DCC_READ 0x18222070 1 0>,	\
		<DCC_READ 0x18222084 1 0>,	\
		<DCC_READ 0x18222098 1 0>,	\
		<DCC_READ 0x182220ac 1 0>,	\
		<DCC_READ 0x182220c0 1 0>,	\
		<DCC_READ 0x18221278 1 0>,	\
		<DCC_READ 0x1822128c 1 0>,	\
		<DCC_READ 0x182212a0 1 0>,	\
		<DCC_READ 0x182212b4 1 0>,	\
		<DCC_READ 0x182212c8 1 0>,	\
		<DCC_READ 0x182212dc 1 0>,	\
		<DCC_READ 0x182212f0 1 0>,	\
		<DCC_READ 0x18221304 1 0>,	\
		<DCC_READ 0x18221318 1 0>,	\
		<DCC_READ 0x1822132c 1 0>,	\
		<DCC_READ 0x18221340 1 0>,	\
		<DCC_READ 0x18221354 1 0>,	\
		<DCC_READ 0x18221368 1 0>,	\
		<DCC_READ 0x1822137c 1 0>,	\
		<DCC_READ 0x18221390 1 0>,	\
		<DCC_READ 0x182213a4 1 0>,	\
		<DCC_READ 0x18221518 1 0>,	\
		<DCC_READ 0x1822152c 1 0>,	\
		<DCC_READ 0x18221540 1 0>,	\
		<DCC_READ 0x18221554 1 0>,	\
		<DCC_READ 0x18221568 1 0>,	\
		<DCC_READ 0x1822157c 1 0>,	\
		<DCC_READ 0x18221590 1 0>,	\
		<DCC_READ 0x182215a4 1 0>,	\
		<DCC_READ 0x182215b8 1 0>,	\
		<DCC_READ 0x182215cc 1 0>,	\
		<DCC_READ 0x182215e0 1 0>,	\
		<DCC_READ 0x182215f4 1 0>,	\
		<DCC_READ 0x18221608 1 0>,	\
		<DCC_READ 0x1822161c 1 0>,	\
		<DCC_READ 0x18221630 1 0>,	\
		<DCC_READ 0x18221644 1 0>,	\
		<DCC_READ 0x182217b8 1 0>,	\
		<DCC_READ 0x182217cc 1 0>,	\
		<DCC_READ 0x182217e0 1 0>,	\
		<DCC_READ 0x182217f4 1 0>,	\
		<DCC_READ 0x18221808 1 0>,	\
		<DCC_READ 0x1822181c 1 0>,	\
		<DCC_READ 0x18221830 1 0>,	\
		<DCC_READ 0x18221844 1 0>,	\
		<DCC_READ 0x18221858 1 0>,	\
		<DCC_READ 0x1822186c 1 0>,	\
		<DCC_READ 0x18221880 1 0>,	\
		<DCC_READ 0x18221894 1 0>,	\
		<DCC_READ 0x182218a8 1 0>,	\
		<DCC_READ 0x182218bc 1 0>,	\
		<DCC_READ 0x182218d0 1 0>,	\
		<DCC_READ 0x182218e4 1 0>,	\
		<DCC_READ 0x18221a58 1 0>,	\
		<DCC_READ 0x18221a6c 1 0>,	\
		<DCC_READ 0x18221a80 1 0>,	\
		<DCC_READ 0x18221a94 1 0>,	\
		<DCC_READ 0x18221aa8 1 0>,	\
		<DCC_READ 0x18221abc 1 0>,	\
		<DCC_READ 0x18221ad0 1 0>,	\
		<DCC_READ 0x18221ae4 1 0>,	\
		<DCC_READ 0x18221af8 1 0>,	\
		<DCC_READ 0x18221b0c 1 0>,	\
		<DCC_READ 0x18221b20 1 0>,	\
		<DCC_READ 0x18221b34 1 0>,	\
		<DCC_READ 0x18221b48 1 0>,	\
		<DCC_READ 0x18221b5c 1 0>,	\
		<DCC_READ 0x18221b70 1 0>,	\
		<DCC_READ 0x18221b84 1 0>,	\
		<DCC_READ 0x18221cf8 1 0>,	\
		<DCC_READ 0x18221d0c 1 0>,	\
		<DCC_READ 0x18221d20 1 0>,	\
		<DCC_READ 0x18221d34 1 0>,	\
		<DCC_READ 0x18221d48 1 0>,	\
		<DCC_READ 0x18221d5c 1 0>,	\
		<DCC_READ 0x18221d70 1 0>,	\
		<DCC_READ 0x18221d84 1 0>,	\
		<DCC_READ 0x18221d98 1 0>,	\
		<DCC_READ 0x18221dac 1 0>,	\
		<DCC_READ 0x18221dc0 1 0>,	\
		<DCC_READ 0x18221dd4 1 0>,	\
		<DCC_READ 0x18221de8 1 0>,	\
		<DCC_READ 0x18221dfc 1 0>,	\
		<DCC_READ 0x18221e10 1 0>,	\
		<DCC_READ 0x18221e24 1 0>,	\
		<DCC_READ 0x18221f98 1 0>,	\
		<DCC_READ 0x18221fac 1 0>,	\
		<DCC_READ 0x18221fc0 1 0>,	\
		<DCC_READ 0x18221fd4 1 0>,	\
		<DCC_READ 0x18221fe8 1 0>,	\
		<DCC_READ 0x18221ffc 1 0>,	\
		<DCC_READ 0x18222010 1 0>,	\
		<DCC_READ 0x18222024 1 0>,	\
		<DCC_READ 0x18222038 1 0>,	\
		<DCC_READ 0x1822204c 1 0>,	\
		<DCC_READ 0x18222060 1 0>,	\
		<DCC_READ 0x18222074 1 0>,	\
		<DCC_READ 0x18222088 1 0>,	\
		<DCC_READ 0x1822209c 1 0>,	\
		<DCC_READ 0x182220b0 1 0>,	\
		<DCC_READ 0x182220c4 1 0>

/* config_atoll_dcc_lpm() */
#define config_atoll_dcc_lpm	\
	\
		/* LPM_Registers */	\
		<DCC_READ 0x18000024 1 0>,	\
		<DCC_READ 0x18000040 1 0>,	\
		<DCC_READ 0x18010024 1 0>,	\
		<DCC_READ 0x18010040 1 0>,	\
		<DCC_READ 0x18020024 1 0>,	\
		<DCC_READ 0x18020040 1 0>,	\
		<DCC_READ 0x18030024 1 0>,	\
		<DCC_READ 0x18030040 1 0>,	\
		<DCC_READ 0x18040024 1 0>,	\
		<DCC_READ 0x18040040 1 0>,	\
		<DCC_READ 0x18050024 1 0>,	\
		<DCC_READ 0x18050040 1 0>,	\
		<DCC_READ 0x18060024 1 0>,	\
		<DCC_READ 0x18060040 1 0>,	\
		<DCC_READ 0x18070024 1 0>,	\
		<DCC_READ 0x18070040 1 0>,	\
		<DCC_READ 0x18080024 1 0>,	\
		<DCC_READ 0x18080040 1 0>,	\
		<DCC_READ 0x180800F8 1 0>,	\
		<DCC_READ 0x18080104 1 0>,	\
		<DCC_READ 0x1808011C 1 0>,	\
		<DCC_READ 0x18080128 1 0>

/* config_atoll_dcc_rscc_lpass() */
#define config_atoll_dcc_rscc_lpass	\
	\
		/* RSCp */	\
		<DCC_READ 0x62900010 1 0>,	\
		<DCC_READ 0x62900014 1 0>,	\
		<DCC_READ 0x62900018 1 0>,	\
		<DCC_READ 0x62900030 1 0>,	\
		<DCC_READ 0x62900038 1 0>,	\
		<DCC_READ 0x62900040 1 0>,	\
		<DCC_READ 0x62900048 1 0>,	\
		<DCC_READ 0x629000D0 1 0>,	\
		<DCC_READ 0x62900210 1 0>,	\
		<DCC_READ 0x62900230 1 0>,	\
		<DCC_READ 0x62900250 1 0>,	\
		<DCC_READ 0x62900270 1 0>,	\
		<DCC_READ 0x62900290 1 0>,	\
		<DCC_READ 0x629002B0 1 0>,	\
		<DCC_READ 0x62900208 1 0>,	\
		<DCC_READ 0x62900228 1 0>,	\
		<DCC_READ 0x62900248 1 0>,	\
		<DCC_READ 0x62900268 1 0>,	\
		<DCC_READ 0x62900288 1 0>,	\
		<DCC_READ 0x629002A8 1 0>,	\
		<DCC_READ 0x6290020C 1 0>,	\
		<DCC_READ 0x6290022C 1 0>,	\
		<DCC_READ 0x6290024C 1 0>,	\
		<DCC_READ 0x6290026C 1 0>,	\
		<DCC_READ 0x6290028C 1 0>,	\
		<DCC_READ 0x629002AC 1 0>,	\
		<DCC_READ 0x62900404 1 0>,	\
		<DCC_READ 0x62900408 1 0>,	\
		<DCC_READ 0x62900400 1 0>,	\
		<DCC_READ 0x62900D04 1 0>,	\
	\
		/* RSCc */	\
		<DCC_READ 0x624B0010 1 0>,	\
		<DCC_READ 0x624B0014 1 0>,	\
		<DCC_READ 0x624B0018 1 0>,	\
		<DCC_READ 0x624B0210 1 0>,	\
		<DCC_READ 0x624B0230 1 0>,	\
		<DCC_READ 0x624B0250 1 0>,	\
		<DCC_READ 0x624B0270 1 0>,	\
		<DCC_READ 0x624B0290 1 0>,	\
		<DCC_READ 0x624B02B0 1 0>,	\
		<DCC_READ 0x624B0208 1 0>,	\
		<DCC_READ 0x624B0228 1 0>,	\
		<DCC_READ 0x624B0248 1 0>,	\
		<DCC_READ 0x624B0268 1 0>,	\
		<DCC_READ 0x624B0288 1 0>,	\
		<DCC_READ 0x624B02A8 1 0>,	\
		<DCC_READ 0x624B020C 1 0>,	\
		<DCC_READ 0x624B022C 1 0>,	\
		<DCC_READ 0x624B024C 1 0>,	\
		<DCC_READ 0x624B026C 1 0>,	\
		<DCC_READ 0x624B028C 1 0>,	\
		<DCC_READ 0x624B02AC 1 0>,	\
		<DCC_READ 0x624B0400 1 0>,	\
		<DCC_READ 0x624B0404 1 0>,	\
		<DCC_READ 0x624B0408 1 0>,	\
	\
		/* Q6_Status */	\
		<DCC_READ 0x62402028 1 0>,	\
	\
		/* PDC registers */	\
		<DCC_READ 0xB254520 1 0>,	\
		<DCC_READ 0xB251020 1 0>,	\
		<DCC_READ 0xB251024 1 0>,	\
		<DCC_READ 0xB251030 1 0>,	\
		<DCC_READ 0xB251200 1 0>,	\
		<DCC_READ 0xB251214 1 0>,	\
		<DCC_READ 0xB251228 1 0>,	\
		<DCC_READ 0xB25123C 1 0>,	\
		<DCC_READ 0xB251250 1 0>,	\
		<DCC_READ 0xB251204 1 0>,	\
		<DCC_READ 0xB251218 1 0>,	\
		<DCC_READ 0xB25122C 1 0>,	\
		<DCC_READ 0xB251240 1 0>,	\
		<DCC_READ 0xB251254 1 0>,	\
		<DCC_READ 0xB251208 1 0>,	\
		<DCC_READ 0xB25121C 1 0>,	\
		<DCC_READ 0xB251230 1 0>,	\
		<DCC_READ 0xB251244 1 0>,	\
		<DCC_READ 0xB251258 1 0>,	\
		<DCC_READ 0xB254510 1 0>,	\
		<DCC_READ 0xB254514 1 0>,	\
		<DCC_READ 0xB250010 1 0>,	\
		<DCC_READ 0xB250014 1 0>,	\
		<DCC_READ 0xB250900 1 0>,	\
		<DCC_READ 0xB250904 1 0>

/* config_atoll_dcc_rscc_modem() */
#define config_atoll_dcc_rscc_modem	\
	\
		/* RSCp */	\
		<DCC_READ 0x4200010 1 0>,	\
		<DCC_READ 0x4200014 1 0>,	\
		<DCC_READ 0x4200018 1 0>,	\
		<DCC_READ 0x4200030 1 0>,	\
		<DCC_READ 0x4200038 1 0>,	\
		<DCC_READ 0x4200040 1 0>,	\
		<DCC_READ 0x4200048 1 0>,	\
		<DCC_READ 0x42000D0 1 0>,	\
		<DCC_READ 0x4200210 1 0>,	\
		<DCC_READ 0x4200230 1 0>,	\
		<DCC_READ 0x4200250 1 0>,	\
		<DCC_READ 0x4200270 1 0>,	\
		<DCC_READ 0x4200290 1 0>,	\
		<DCC_READ 0x42002B0 1 0>,	\
		<DCC_READ 0x4200208 1 0>,	\
		<DCC_READ 0x4200228 1 0>,	\
		<DCC_READ 0x4200248 1 0>,	\
		<DCC_READ 0x4200268 1 0>,	\
		<DCC_READ 0x4200288 1 0>,	\
		<DCC_READ 0x42002A8 1 0>,	\
		<DCC_READ 0x420020C 1 0>,	\
		<DCC_READ 0x420022C 1 0>,	\
		<DCC_READ 0x420024C 1 0>,	\
		<DCC_READ 0x420026C 1 0>,	\
		<DCC_READ 0x420028C 1 0>,	\
		<DCC_READ 0x42002AC 1 0>,	\
		<DCC_READ 0x4200404 1 0>,	\
		<DCC_READ 0x4200408 1 0>,	\
		<DCC_READ 0x4200400 1 0>,	\
		<DCC_READ 0x4200D04 1 0>,	\
	\
		/* RSCc */	\
		<DCC_READ 0x4130010 1 0>,	\
		<DCC_READ 0x4130014 1 0>,	\
		<DCC_READ 0x4130018 1 0>,	\
		<DCC_READ 0x4130210 1 0>,	\
		<DCC_READ 0x4130230 1 0>,	\
		<DCC_READ 0x4130250 1 0>,	\
		<DCC_READ 0x4130270 1 0>,	\
		<DCC_READ 0x4130290 1 0>,	\
		<DCC_READ 0x41302B0 1 0>,	\
		<DCC_READ 0x4130208 1 0>,	\
		<DCC_READ 0x4130228 1 0>,	\
		<DCC_READ 0x4130248 1 0>,	\
		<DCC_READ 0x4130268 1 0>,	\
		<DCC_READ 0x4130288 1 0>,	\
		<DCC_READ 0x41302A8 1 0>,	\
		<DCC_READ 0x413020C 1 0>,	\
		<DCC_READ 0x413022C 1 0>,	\
		<DCC_READ 0x413024C 1 0>,	\
		<DCC_READ 0x413026C 1 0>,	\
		<DCC_READ 0x413028C 1 0>,	\
		<DCC_READ 0x41302AC 1 0>,	\
		<DCC_READ 0x4130400 1 0>,	\
		<DCC_READ 0x4130404 1 0>,	\
		<DCC_READ 0x4130408 1 0>,	\
	\
		/* Q6 status */	\
		<DCC_READ 0x4082028 1 0>,	\
		<DCC_READ 0x0018A008 1 0>,	\
	\
		/* PDC registers */	\
		<DCC_READ 0xB2C4520 1 0>,	\
		<DCC_READ 0xB2C1020 1 0>,	\
		<DCC_READ 0xB2C1024 1 0>,	\
		<DCC_READ 0xB2C1030 1 0>,	\
		<DCC_READ 0xB2C1200 1 0>,	\
		<DCC_READ 0xB2C1214 1 0>,	\
		<DCC_READ 0xB2C1228 1 0>,	\
		<DCC_READ 0xB2C123C 1 0>,	\
		<DCC_READ 0xB2C1250 1 0>,	\
		<DCC_READ 0xB2C1204 1 0>,	\
		<DCC_READ 0xB2C1218 1 0>,	\
		<DCC_READ 0xB2C122C 1 0>,	\
		<DCC_READ 0xB2C1240 1 0>,	\
		<DCC_READ 0xB2C1254 1 0>,	\
		<DCC_READ 0xB2C1208 1 0>,	\
		<DCC_READ 0xB2C121C 1 0>,	\
		<DCC_READ 0xB2C1230 1 0>,	\
		<DCC_READ 0xB2C1244 1 0>,	\
		<DCC_READ 0xB2C1258 1 0>,	\
		<DCC_READ 0xB2C4510 1 0>,	\
		<DCC_READ 0xB2C4514 1 0>,	\
		<DCC_READ 0xB2C0010 1 0>,	\
		<DCC_READ 0xB2C0014 1 0>,	\
		<DCC_READ 0xB2C0900 1 0>,	\
		<DCC_READ 0xB2C0904 1 0>

/* config_atoll_dcc_rscc_cdsp() */
#define config_atoll_dcc_rscc_cdsp	\
	\
		/* RSCp */	\
		<DCC_READ 0x80A4010 1 0>,	\
		<DCC_READ 0x80A4014 1 0>,	\
		<DCC_READ 0x80A4018 1 0>,	\
		<DCC_READ 0x80A4030 1 0>,	\
		<DCC_READ 0x80A4038 1 0>,	\
		<DCC_READ 0x80A4040 1 0>,	\
		<DCC_READ 0x80A4048 1 0>,	\
		<DCC_READ 0x80A40D0 1 0>,	\
		<DCC_READ 0x80A4210 1 0>,	\
		<DCC_READ 0x80A4230 1 0>,	\
		<DCC_READ 0x80A4250 1 0>,	\
		<DCC_READ 0x80A4270 1 0>,	\
		<DCC_READ 0x80A4290 1 0>,	\
		<DCC_READ 0x80A42B0 1 0>,	\
		<DCC_READ 0x80A4208 1 0>,	\
		<DCC_READ 0x80A4228 1 0>,	\
		<DCC_READ 0x80A4248 1 0>,	\
		<DCC_READ 0x80A4268 1 0>,	\
		<DCC_READ 0x80A4288 1 0>,	\
		<DCC_READ 0x80A42A8 1 0>,	\
		<DCC_READ 0x80A420C 1 0>,	\
		<DCC_READ 0x80A422C 1 0>,	\
		<DCC_READ 0x80A424C 1 0>,	\
		<DCC_READ 0x80A426C 1 0>,	\
		<DCC_READ 0x80A428C 1 0>,	\
		<DCC_READ 0x80A42AC 1 0>,	\
		<DCC_READ 0x80A4404 1 0>,	\
		<DCC_READ 0x80A4408 1 0>,	\
		<DCC_READ 0x80A4400 1 0>,	\
		<DCC_READ 0x80A4D04 1 0>,	\
	\
		/* RSCc_CDSP */	\
		<DCC_READ 0x83B0010 1 0>,	\
		<DCC_READ 0x83B0014 1 0>,	\
		<DCC_READ 0x83B0018 1 0>,	\
		<DCC_READ 0x83B0210 1 0>,	\
		<DCC_READ 0x83B0230 1 0>,	\
		<DCC_READ 0x83B0250 1 0>,	\
		<DCC_READ 0x83B0270 1 0>,	\
		<DCC_READ 0x83B0290 1 0>,	\
		<DCC_READ 0x83B02B0 1 0>,	\
		<DCC_READ 0x83B0208 1 0>,	\
		<DCC_READ 0x83B0228 1 0>,	\
		<DCC_READ 0x83B0248 1 0>,	\
		<DCC_READ 0x83B0268 1 0>,	\
		<DCC_READ 0x83B0288 1 0>,	\
		<DCC_READ 0x83B02A8 1 0>,	\
		<DCC_READ 0x83B020C 1 0>,	\
		<DCC_READ 0x83B022C 1 0>,	\
		<DCC_READ 0x83B024C 1 0>,	\
		<DCC_READ 0x83B026C 1 0>,	\
		<DCC_READ 0x83B028C 1 0>,	\
		<DCC_READ 0x83B02AC 1 0>,	\
		<DCC_READ 0x83B0400 1 0>,	\
		<DCC_READ 0x83B0404 1 0>,	\
		<DCC_READ 0x83B0408 1 0>,	\
	\
		/* Q6 Status */	\
		<DCC_READ 0x8302028 1 0>,	\
	\
		/* PDC */	\
		<DCC_READ 0xB2B4520 1 0>,	\
		<DCC_READ 0xB2B1020 1 0>,	\
		<DCC_READ 0xB2B1024 1 0>,	\
		<DCC_READ 0xB2B1030 1 0>,	\
		<DCC_READ 0xB2B1200 1 0>,	\
		<DCC_READ 0xB2B1214 1 0>,	\
		<DCC_READ 0xB2B1228 1 0>,	\
		<DCC_READ 0xB2B123C 1 0>,	\
		<DCC_READ 0xB2B1250 1 0>,	\
		<DCC_READ 0xB2B1204 1 0>,	\
		<DCC_READ 0xB2B1218 1 0>,	\
		<DCC_READ 0xB2B122C 1 0>,	\
		<DCC_READ 0xB2B1240 1 0>,	\
		<DCC_READ 0xB2B1254 1 0>,	\
		<DCC_READ 0xB2B1208 1 0>,	\
		<DCC_READ 0xB2B121C 1 0>,	\
		<DCC_READ 0xB2B1230 1 0>,	\
		<DCC_READ 0xB2B1244 1 0>,	\
		<DCC_READ 0xB2B1258 1 0>,	\
		<DCC_READ 0xB2B4510 1 0>,	\
		<DCC_READ 0xB2B4514 1 0>,	\
		<DCC_READ 0xB2B0010 1 0>,	\
		<DCC_READ 0xB2B0014 1 0>,	\
		<DCC_READ 0xB2B0900 1 0>,	\
		<DCC_READ 0xB2B0904 1 0>

/* config_atoll_dcc_memnoc_mccc() */
#define config_atoll_dcc_memnoc_mccc	\
	\
		/* MCCC */	\
		<DCC_READ 0x90b0280 1 0>,	\
		<DCC_READ 0x90b0288 1 0>,	\
		<DCC_READ 0x90b028c 1 0>,	\
		<DCC_READ 0x90b0290 1 0>,	\
		<DCC_READ 0x90b0294 1 0>,	\
		<DCC_READ 0x90b0298 1 0>,	\
		<DCC_READ 0x90b029c 1 0>,	\
		<DCC_READ 0x90b02a0 1 0>,	\
		<DCC_READ 0x90b02a0 4 0>,	\
		<DCC_READ 0x92d0110 4 0>

/* config_atoll_dcc_osm() */
#define config_atoll_dcc_osm	\
	\
		/* APSS_OSM */	\
		<DCC_READ 0x18321700 1 0>,	\
		<DCC_READ 0x18322C18 1 0>,	\
		<DCC_READ 0x18323700 1 0>,	\
		<DCC_READ 0x18324C18 1 0>,	\
		<DCC_READ 0x18325F00 1 0>,	\
		<DCC_READ 0x18327418 1 0>,	\
		<DCC_READ 0x18321818 1 0>,	\
		<DCC_READ 0x18323818 1 0>,	\
		<DCC_READ 0x18326018 1 0>,	\
		<DCC_READ 0x18321920 1 0>,	\
		<DCC_READ 0x1832102C 1 0>,	\
		<DCC_READ 0x18321044 1 0>,	\
		<DCC_READ 0x18321710 1 0>,	\
		<DCC_READ 0x1832176C 1 0>,	\
		<DCC_READ 0x18322C18 1 0>,	\
		<DCC_READ 0x18323700 1 0>,	\
		<DCC_READ 0x18323920 1 0>,	\
		<DCC_READ 0x1832302C 1 0>,	\
		<DCC_READ 0x18323044 1 0>,	\
		<DCC_READ 0x18323710 1 0>,	\
		<DCC_READ 0x1832376C 1 0>,	\
		<DCC_READ 0x18324C18 1 0>,	\
		<DCC_READ 0x18326120 1 0>,	\
		<DCC_READ 0x1832582C 1 0>,	\
		<DCC_READ 0x18325844 1 0>,	\
		<DCC_READ 0x18325F10 1 0>,	\
		<DCC_READ 0x18325F6C 1 0>,	\
		<DCC_READ 0x18327418 1 0>,	\
		<DCC_READ 0x1832582C 1 0>,	\
		<DCC_READ 0x18280000 2 0>,	\
		<DCC_READ 0x18282000 2 0>,	\
		<DCC_READ 0x18284000 2 0>

/* config_atoll_dcc_ddr() */
#define config_atoll_dcc_ddr	\
	\
		/* DDR GEMNOC TR PEnding status */	\
		<DCC_READ 0x90c012c 1 0>,	\
	\
		/* LLCC Registers */	\
		<DCC_READ 0x9222408 1 0>,	\
		<DCC_READ 0x9220344 2 0>,	\
		<DCC_READ 0x9220480 1 0>,	\
		<DCC_READ 0x922358c 1 0>,	\
		<DCC_READ 0x9222398 1 0>,	\
		<DCC_READ 0x92223a4 1 0>,	\
		<DCC_READ 0x92223a4 1 0>,	\
		<DCC_READ 0x92223a4 1 0>,	\
		<DCC_READ 0x92223a4 1 0>,	\
		<DCC_READ 0x92223a4 1 0>,	\
		<DCC_READ 0x92223a4 1 0>,	\
		<DCC_READ 0x923201c 5 0>,	\
		<DCC_READ 0x9232050 1 0>,	\
	\
		/* LLCC0_LLCC_FEWC_FIFO_STATUS */	\
		<DCC_READ 0x9232100 1 0>,	\
	\
		/* DDR CLK registers */	\
		<DCC_READ 0x9186048 1 0>,	\
		<DCC_READ 0x9186054 1 0>,	\
		<DCC_READ 0x9186164 1 0>,	\
		<DCC_READ 0x9186170 1 0>

/* config_atoll_dcc_cabo_llcc_shrm() */
#define config_atoll_dcc_cabo_llcc_shrm	\
	\
		/* LLCC/CABO */	\
		<DCC_READ 0x9236028 1 0>,	\
		<DCC_READ 0x923602C 1 0>,	\
		<DCC_READ 0x9236030 1 0>,	\
		<DCC_READ 0x9236034 1 0>,	\
		<DCC_READ 0x9236038 1 0>,	\
		<DCC_READ 0x9232100 1 0>,	\
		<DCC_READ 0x92360b0 1 0>,	\
		<DCC_READ 0x9236044 1 0>,	\
		<DCC_READ 0x9236048 1 0>,	\
		<DCC_READ 0x923604c 1 0>,	\
		<DCC_READ 0x9236050 1 0>,	\
		<DCC_READ 0x923e030 1 0>,	\
		<DCC_READ 0x923e034 1 0>,	\
		<DCC_READ 0x9241000 1 0>,	\
		<DCC_READ 0x9248058 1 0>,	\
		<DCC_READ 0x924805c 1 0>,	\
		<DCC_READ 0x9248060 1 0>,	\
		<DCC_READ 0x9248064 1 0>,	\
		<DCC_READ 0x9260410 1 0>,	\
		<DCC_READ 0x92e0410 1 0>,	\
		<DCC_READ 0x9260414 1 0>,	\
		<DCC_READ 0x92e0414 1 0>,	\
		<DCC_READ 0x9260418 1 0>,	\
		<DCC_READ 0x92e0418 1 0>,	\
		<DCC_READ 0x9260420 1 0>,	\
		<DCC_READ 0x9260424 1 0>,	\
		<DCC_READ 0x9260430 1 0>,	\
		<DCC_READ 0x9260440 1 0>,	\
		<DCC_READ 0x9260448 1 0>,	\
		<DCC_READ 0x92604a0 1 0>,	\
		<DCC_READ 0x92604b0 1 0>,	\
		<DCC_READ 0x92604d0 2 0>,	\
		<DCC_READ 0x9261440 1 0>,	\
		<DCC_READ 0x92e0420 1 0>,	\
		<DCC_READ 0x92e0424 1 0>,	\
		<DCC_READ 0x92e0430 1 0>,	\
		<DCC_READ 0x92e0440 1 0>,	\
		<DCC_READ 0x92e0448 1 0>,	\
		<DCC_READ 0x92e04a0 1 0>,	\
		<DCC_READ 0x92e04b0 1 0>,	\
		<DCC_READ 0x92e04d0 2 0>,	\
	\
		/* LLCC Broadcast */	\
		<DCC_READ 0x9600000 1 0>,	\
		<DCC_READ 0x9601000 1 0>,	\
		<DCC_READ 0x9602000 1 0>,	\
		<DCC_READ 0x9603000 1 0>,	\
		<DCC_READ 0x9604000 1 0>,	\
		<DCC_READ 0x9605000 1 0>,	\
		<DCC_READ 0x9606000 1 0>,	\
		<DCC_READ 0x9607000 1 0>,	\
		<DCC_READ 0x9608000 1 0>,	\
		<DCC_READ 0x9609000 1 0>,	\
		<DCC_READ 0x960a000 1 0>,	\
		<DCC_READ 0x960b000 1 0>,	\
		<DCC_READ 0x960c000 1 0>,	\
		<DCC_READ 0x960d000 1 0>,	\
		<DCC_READ 0x960e000 1 0>,	\
		<DCC_READ 0x960f000 1 0>,	\
		<DCC_READ 0x9610000 1 0>,	\
		<DCC_READ 0x9611000 1 0>,	\
		<DCC_READ 0x9612000 1 0>,	\
		<DCC_READ 0x9613000 1 0>,	\
		<DCC_READ 0x9614000 1 0>,	\
		<DCC_READ 0x9615000 1 0>,	\
		<DCC_READ 0x9616000 1 0>,	\
		<DCC_READ 0x9617000 1 0>,	\
		<DCC_READ 0x9618000 1 0>,	\
		<DCC_READ 0x9619000 1 0>,	\
		<DCC_READ 0x961a000 1 0>,	\
		<DCC_READ 0x961b000 1 0>,	\
		<DCC_READ 0x961c000 1 0>,	\
		<DCC_READ 0x961d000 1 0>,	\
		<DCC_READ 0x961e000 1 0>,	\
		<DCC_READ 0x961f000 1 0>,	\
		<DCC_READ 0x9600004 1 0>,	\
		<DCC_READ 0x9601004 1 0>,	\
		<DCC_READ 0x9602004 1 0>,	\
		<DCC_READ 0x9603004 1 0>,	\
		<DCC_READ 0x9604004 1 0>,	\
		<DCC_READ 0x9605004 1 0>,	\
		<DCC_READ 0x9606004 1 0>,	\
		<DCC_READ 0x9607004 1 0>,	\
		<DCC_READ 0x9608004 1 0>,	\
		<DCC_READ 0x9609004 1 0>,	\
		<DCC_READ 0x960a004 1 0>,	\
		<DCC_READ 0x960b004 1 0>,	\
		<DCC_READ 0x960c004 1 0>,	\
		<DCC_READ 0x960d004 1 0>,	\
		<DCC_READ 0x960e004 1 0>,	\
		<DCC_READ 0x960f004 1 0>,	\
		<DCC_READ 0x9610004 1 0>,	\
		<DCC_READ 0x9611004 1 0>,	\
		<DCC_READ 0x9612004 1 0>,	\
		<DCC_READ 0x9613004 1 0>,	\
		<DCC_READ 0x9614004 1 0>,	\
		<DCC_READ 0x9615004 1 0>,	\
		<DCC_READ 0x9616004 1 0>,	\
		<DCC_READ 0x9617004 1 0>,	\
		<DCC_READ 0x9618004 1 0>,	\
		<DCC_READ 0x9619004 1 0>,	\
		<DCC_READ 0x961a004 1 0>,	\
		<DCC_READ 0x961b004 1 0>,	\
		<DCC_READ 0x961c004 1 0>,	\
		<DCC_READ 0x961d004 1 0>,	\
		<DCC_READ 0x961e004 1 0>,	\
		<DCC_READ 0x961f004 1 0>,	\
		<DCC_READ 0x9266418 1 0>,	\
		<DCC_READ 0x92e6418 1 0>,	\
		<DCC_READ 0x9265804 1 0>,	\
		<DCC_READ 0x92e5804 1 0>,	\
		<DCC_READ 0x92604b8 1 0>,	\
		<DCC_READ 0x92e04b8 1 0>

/* config_atoll_dcc_cx_mx() */
#define config_atoll_dcc_cx_mx	\
	\
		/* CX_MX */	\
		<DCC_READ 0x0C201244 1 0>,	\
		<DCC_READ 0x0C202244 1 0>,	\
	\
		/* APC Voltage */	\
		<DCC_READ 0x18100C18 1 0>,	\
		<DCC_READ 0x18101C18 1 0>,	\
	\
		/* APC / MX CORNER */	\
		<DCC_READ 0x18300000 1 0>,	\
	\
		/* CPRH */	\
		<DCC_READ 0x183A3A84 2 0>,	\
		<DCC_READ 0x18393A84 1 0>

/* config_atoll_dcc_gcc_regs() */
#define config_atoll_dcc_gcc_regs	\
	\
		/* GCC */	\
		<DCC_READ 0x00100000 1 0>,	\
		<DCC_READ 0x00100004 1 0>,	\
		<DCC_READ 0x00100008 1 0>,	\
		<DCC_READ 0x0010000C 1 0>,	\
		<DCC_READ 0x00100010 1 0>,	\
		<DCC_READ 0x00100014 1 0>,	\
		<DCC_READ 0x00100018 1 0>,	\
		<DCC_READ 0x0010001C 1 0>,	\
		<DCC_READ 0x00100020 1 0>,	\
		<DCC_READ 0x00100024 1 0>,	\
		<DCC_READ 0x00100028 1 0>,	\
		<DCC_READ 0x0010002C 1 0>,	\
		<DCC_READ 0x00100030 1 0>,	\
		<DCC_READ 0x00100034 1 0>,	\
		<DCC_READ 0x00100100 1 0>,	\
		<DCC_READ 0x00100104 1 0>,	\
		<DCC_READ 0x00100108 1 0>,	\
		<DCC_READ 0x0010010C 1 0>,	\
		<DCC_READ 0x00101000 1 0>,	\
		<DCC_READ 0x00101004 1 0>,	\
		<DCC_READ 0x00101008 1 0>,	\
		<DCC_READ 0x0010100C 1 0>,	\
		<DCC_READ 0x00101010 1 0>,	\
		<DCC_READ 0x00101014 1 0>,	\
		<DCC_READ 0x00101018 1 0>,	\
		<DCC_READ 0x0010101C 1 0>,	\
		<DCC_READ 0x00101020 1 0>,	\
		<DCC_READ 0x00101024 1 0>,	\
		<DCC_READ 0x00101028 1 0>,	\
		<DCC_READ 0x0010102C 1 0>,	\
		<DCC_READ 0x00101030 1 0>,	\
		<DCC_READ 0x00101034 1 0>,	\
		<DCC_READ 0x00102000 1 0>,	\
		<DCC_READ 0x00102004 1 0>,	\
		<DCC_READ 0x00102008 1 0>,	\
		<DCC_READ 0x0010200C 1 0>,	\
		<DCC_READ 0x00102010 1 0>,	\
		<DCC_READ 0x00102014 1 0>,	\
		<DCC_READ 0x00102018 1 0>,	\
		<DCC_READ 0x0010201C 1 0>,	\
		<DCC_READ 0x00102020 1 0>,	\
		<DCC_READ 0x00102024 1 0>,	\
		<DCC_READ 0x00102028 1 0>,	\
		<DCC_READ 0x0010202C 1 0>,	\
		<DCC_READ 0x00102030 1 0>,	\
		<DCC_READ 0x00102034 1 0>,	\
		<DCC_READ 0x00103000 1 0>,	\
		<DCC_READ 0x00103004 1 0>,	\
		<DCC_READ 0x00103008 1 0>,	\
		<DCC_READ 0x0010300C 1 0>,	\
		<DCC_READ 0x00103010 1 0>,	\
		<DCC_READ 0x00103014 1 0>,	\
		<DCC_READ 0x00103018 1 0>,	\
		<DCC_READ 0x0010301C 1 0>,	\
		<DCC_READ 0x00103020 1 0>,	\
		<DCC_READ 0x00103024 1 0>,	\
		<DCC_READ 0x00103028 1 0>,	\
		<DCC_READ 0x0010302C 1 0>,	\
		<DCC_READ 0x00103030 1 0>,	\
		<DCC_READ 0x00103034 1 0>,	\
		<DCC_READ 0x00113000 1 0>,	\
		<DCC_READ 0x00113004 1 0>,	\
		<DCC_READ 0x00113008 1 0>,	\
		<DCC_READ 0x0011300C 1 0>,	\
		<DCC_READ 0x00113010 1 0>,	\
		<DCC_READ 0x00113014 1 0>,	\
		<DCC_READ 0x00113018 1 0>,	\
		<DCC_READ 0x0011301C 1 0>,	\
		<DCC_READ 0x00113020 1 0>,	\
		<DCC_READ 0x00113024 1 0>,	\
		<DCC_READ 0x00113028 1 0>,	\
		<DCC_READ 0x0011302C 1 0>,	\
		<DCC_READ 0x00113030 1 0>,	\
		<DCC_READ 0x00113034 1 0>,	\
		<DCC_READ 0x0011A000 1 0>,	\
		<DCC_READ 0x0011A004 1 0>,	\
		<DCC_READ 0x0011A008 1 0>,	\
		<DCC_READ 0x0011A00C 1 0>,	\
		<DCC_READ 0x0011A010 1 0>,	\
		<DCC_READ 0x0011A014 1 0>,	\
		<DCC_READ 0x0011A018 1 0>,	\
		<DCC_READ 0x0011A01C 1 0>,	\
		<DCC_READ 0x0011A020 1 0>,	\
		<DCC_READ 0x0011A024 1 0>,	\
		<DCC_READ 0x0011A028 1 0>,	\
		<DCC_READ 0x0011A02C 1 0>,	\
		<DCC_READ 0x0011A030 1 0>,	\
		<DCC_READ 0x0011A034 1 0>,	\
		<DCC_READ 0x0011B000 1 0>,	\
		<DCC_READ 0x0011B004 1 0>,	\
		<DCC_READ 0x0011B008 1 0>,	\
		<DCC_READ 0x0011B00C 1 0>,	\
		<DCC_READ 0x0011B010 1 0>,	\
		<DCC_READ 0x0011B014 1 0>,	\
		<DCC_READ 0x0011B018 1 0>,	\
		<DCC_READ 0x0011B01C 1 0>,	\
		<DCC_READ 0x0011B020 1 0>,	\
		<DCC_READ 0x0011B024 1 0>,	\
		<DCC_READ 0x0011B028 1 0>,	\
		<DCC_READ 0x0011B02C 1 0>,	\
		<DCC_READ 0x0011B030 1 0>,	\
		<DCC_READ 0x0011B034 1 0>,	\
		<DCC_READ 0x00174000 1 0>,	\
		<DCC_READ 0x00174004 1 0>,	\
		<DCC_READ 0x00174008 1 0>,	\
		<DCC_READ 0x0017400C 1 0>,	\
		<DCC_READ 0x00174010 1 0>,	\
		<DCC_READ 0x00174014 1 0>,	\
		<DCC_READ 0x00174018 1 0>,	\
		<DCC_READ 0x0017401C 1 0>,	\
		<DCC_READ 0x00174020 1 0>,	\
		<DCC_READ 0x00174024 1 0>,	\
		<DCC_READ 0x00174028 1 0>,	\
		<DCC_READ 0x0017402C 1 0>,	\
		<DCC_READ 0x00174030 1 0>,	\
		<DCC_READ 0x00174034 1 0>,	\
		<DCC_READ 0x00176000 1 0>,	\
		<DCC_READ 0x00176004 1 0>,	\
		<DCC_READ 0x00176008 1 0>,	\
		<DCC_READ 0x0017600C 1 0>,	\
		<DCC_READ 0x00176010 1 0>,	\
		<DCC_READ 0x00176014 1 0>,	\
		<DCC_READ 0x00176018 1 0>,	\
		<DCC_READ 0x0017601C 1 0>,	\
		<DCC_READ 0x00176020 1 0>,	\
		<DCC_READ 0x00176024 1 0>,	\
		<DCC_READ 0x00176028 1 0>,	\
		<DCC_READ 0x0017602C 1 0>,	\
		<DCC_READ 0x00176030 1 0>,	\
		<DCC_READ 0x00176034 1 0>,	\
		<DCC_READ 0x0010401C 1 0>,	\
		<DCC_READ 0x00183024 1 0>,	\
		<DCC_READ 0x00144168 1 0>,	\
		<DCC_READ 0x0011702C 1 0>,	\
		<DCC_READ 0x0010904C 1 0>,	\
		<DCC_READ 0x00189038 1 0>,	\
		<DCC_READ 0x001443E8 1 0>,	\
		<DCC_READ 0x001442B8 1 0>,	\
		<DCC_READ 0x00105060 1 0>,	\
		<DCC_READ 0x00141024 1 0>,	\
		<DCC_READ 0x00145038 1 0>,	\
		<DCC_READ 0x00109004 1 0>,	\
		<DCC_READ 0x00189004 1 0>,	\
		<DCC_READ 0x00190004 1 0>,	\
	\
		/* AOSS_CC */	\
		<DCC_READ 0x0C2A0000 1 0>,	\
		<DCC_READ 0x0C2A0004 1 0>,	\
		<DCC_READ 0x0C2A0008 1 0>,	\
		<DCC_READ 0x0C2A000C 1 0>,	\
		<DCC_READ 0x0C2A0010 1 0>,	\
		<DCC_READ 0x0C2A0014 1 0>,	\
		<DCC_READ 0x0C2A0018 1 0>,	\
		<DCC_READ 0x0C2A001C 1 0>,	\
		<DCC_READ 0x0C2A0020 1 0>,	\
		<DCC_READ 0x0C2A0024 1 0>,	\
		<DCC_READ 0x0C2A0028 1 0>,	\
		<DCC_READ 0x0C2A002C 1 0>,	\
		<DCC_READ 0x0C2A0030 1 0>,	\
		<DCC_READ 0x0C2A0034 1 0>,	\
		<DCC_READ 0x0C2A1000 1 0>,	\
		<DCC_READ 0x0C2A1004 1 0>,	\
		<DCC_READ 0x0C2A1008 1 0>,	\
		<DCC_READ 0x0C2A100C 1 0>,	\
		<DCC_READ 0x0C2A1010 1 0>,	\
		<DCC_READ 0x0C2A1014 1 0>,	\
		<DCC_READ 0x0C2A1018 1 0>,	\
		<DCC_READ 0x0C2A101C 1 0>,	\
		<DCC_READ 0x0C2A1020 1 0>,	\
		<DCC_READ 0x0C2A1024 1 0>,	\
		<DCC_READ 0x0C2A1028 1 0>,	\
		<DCC_READ 0x0C2A102C 1 0>,	\
		<DCC_READ 0x0C2A1030 1 0>,	\
		<DCC_READ 0x0C2A2260 1 0>,	\
		<DCC_READ 0x0C2A2264 1 0>,	\
		<DCC_READ 0x0C2A3008 1 0>,	\
		<DCC_READ 0x0C2A300C 1 0>,	\
		<DCC_READ 0x0C2A3010 1 0>,	\
		<DCC_READ 0x0C2A3014 1 0>,	\
		<DCC_READ 0x0C2A3024 1 0>,	\
		<DCC_READ 0x0C2A2034 1 0>,	\
		<DCC_READ 0x0C2A214C 1 0>,	\
		<DCC_READ 0x0C2A2150 1 0>,	\
		<DCC_READ 0x0C2A2154 1 0>

/* config_atoll_dcc_bcm_seq_hang() */
#define config_atoll_dcc_bcm_seq_hang	\
	\
		/* GOLD */	\
		<DCC_READ 0x28206C 1 0>

/* config_atoll_dcc_pll() */
#define config_atoll_dcc_pll	\
		<DCC_READ 0x18282004 1 0>,	\
		<DCC_READ 0x18325F6C 1 0>,	\
		<DCC_READ 0x1808012C 1 0>,	\
		<DCC_READ 0x1832582C 1 0>,	\
		<DCC_READ 0x18280004 1 0>,	\
		<DCC_READ 0x18284038 1 0>,	\
		<DCC_READ 0x18284000 2 0>

/* config_atoll_dcc_tsens_regs() */
#define config_atoll_dcc_tsens_regs	\
		<DCC_READ 0x0C2630A0 4 0>,	\
		<DCC_READ 0x0C2630B0 4 0>,	\
		<DCC_READ 0x0C2630C0 4 0>,	\
		<DCC_READ 0x0C2630D0 4 0>

/* config_atoll_dcc_gpu() */
#define config_atoll_dcc_gpu	\
	\
		/* GCC */	\
		<DCC_READ 0x105050 1 0>,	\
		<DCC_READ 0x171004 1 0>,	\
		<DCC_READ 0x171154 1 0>,	\
		<DCC_READ 0x17100C 1 0>,	\
		<DCC_READ 0x171018 1 0>,	\
	\
		/* GPUCC */	\
		<DCC_READ 0x5091004 1 0>,	\
		<DCC_READ 0x509100c 1 0>,	\
		<DCC_READ 0x5091010 1 0>,	\
		<DCC_READ 0x5091014 1 0>,	\
		<DCC_READ 0x5091054 1 0>,	\
		<DCC_READ 0x5091060 1 0>,	\
		<DCC_READ 0x509106c 1 0>,	\
		<DCC_READ 0x5091070 1 0>,	\
		<DCC_READ 0x5091074 1 0>,	\
		<DCC_READ 0x5091078 1 0>,	\
		<DCC_READ 0x509107c 1 0>,	\
		<DCC_READ 0x509108c 1 0>,	\
		<DCC_READ 0x5091098 1 0>,	\
		<DCC_READ 0x509109c 1 0>,	\
		<DCC_READ 0x1800005C 1 0>,	\
		<DCC_READ 0x1801005C 1 0>,	\
		<DCC_READ 0x1802005C 1 0>,	\
		<DCC_READ 0x1803005C 1 0>,	\
		<DCC_READ 0x1804005C 1 0>,	\
		<DCC_READ 0x1805005C 1 0>,	\
		<DCC_READ 0x1806005C 1 0>,	\
		<DCC_READ 0x1807005C 1 0>,	\
		<DCC_READ 0x17C0003C 1 0>,	\
		<DCC_WRITE 0x06004FB0 0xc5acce55 0>,	\
		<DCC_WRITE 0x0600408c 0xff 0>,	\
		<DCC_WRITE 0x06004FB0 0x0 0>

/* config_atoll_dcc_gic() */
#define config_atoll_dcc_gic	\
		<DCC_READ 0x17A00204 29 0>

&dcc {
	dcc_curr_link@3 {
		qcom,curr-link-list = <3>;
		qcom,data-sink = "sram";
		qcom,link-list =
			config_atoll_dcc_lpm,
			config_atoll_dcc_osm,
			config_atoll_dcc_gemnoc,
			config_atoll_dcc_noc_err_regs,
			config_atoll_dcc_shrm,
			config_atoll_dcc_cabo_llcc_shrm,
			/* config_atoll_dcc_memnoc_mccc, */
			config_atoll_dcc_cx_mx,
			config_atoll_dcc_gcc_regs,
			config_atoll_dcc_bcm_seq_hang,
			config_atoll_dcc_pll,
			config_atoll_dcc_ddr,
			config_atoll_dcc_tsens_regs,
			config_atoll_dcc_rscc_apps,
			config_atoll_dcc_gpu,
			config_atoll_dcc_rscc_lpass,
			config_atoll_dcc_rscc_modem,
			config_atoll_dcc_rscc_cdsp,
			config_atoll_dcc_gic;
	};

};